[04/21] Add RVV intrinsic enable #pragma riscv intrinsic "vector" and introduce RVV header "riscv_vector.h"

diff --git a/gcc/config.gcc b/gcc/config.gcc
index bdda82ae576..042a7a17737 100644
--- a/gcc/config.gcc
+++ b/gcc/config.gcc
@@ -517,6 +517,7 @@  pru-*-*)
 	;;
 riscv*)
 	cpu_type=riscv
+	extra_headers="riscv_vector.h"
 	extra_objs="riscv-builtins.o riscv-c.o riscv-sr.o riscv-shorten-memrefs.o riscv-vector.o riscv-vector-builtins-functions.o riscv-vector-builtins.o"
 	d_target_objs="riscv-d.o"
 	target_gtfiles="$target_gtfiles \$(srcdir)/config/riscv/riscv-builtins.cc \$(srcdir)/config/riscv/riscv-vector-builtins.cc"
diff --git a/gcc/config/riscv/riscv-c.cc b/gcc/config/riscv/riscv-c.cc
index eb7ef09297e..5839e849092 100644
--- a/gcc/config/riscv/riscv-c.cc
+++ b/gcc/config/riscv/riscv-c.cc
@@ -25,9 +25,17 @@  along with GCC; see the file COPYING3.  If not see
 #include "system.h"
 #include "coretypes.h"
 #include "tm.h"
+#include "input.h"
+#include "memmodel.h"
+#include "tm_p.h"
+#include "flags.h"
 #include "c-family/c-common.h"
 #include "cpplib.h"
+#include "c-family/c-pragma.h"
+#include "langhooks.h"
+#include "target.h"
 #include "riscv-subset.h"
+#include "riscv-vector-builtins.h"
 
 #define builtin_define(TXT) cpp_define (pfile, TXT)
 
@@ -155,3 +163,60 @@  riscv_cpu_cpp_builtins (cpp_reader *pfile)
       builtin_define_with_int_value (buf, version_value);
     }
 }
+
+/* Implement "#pragma riscv intrinsic".  */
+static void
+riscv_pragma_intrinsic (cpp_reader *)
+{
+  tree x;
+
+  if (pragma_lex (&x) != CPP_STRING)
+    {
+      error ("%<#pragma riscv intrinsic%> requires a string parameter");
+      return;
+    }
+
+  const char *name = TREE_STRING_POINTER (x);
+
+  if (strcmp (name, "vector") == 0)
+    {
+      if (!TARGET_VECTOR)
+	error ("%<#pragma riscv intrinsic%> option %qs needs 'V' extension enabled", name);
+
+      riscv_vector::handle_pragma_vector ();
+    }
+  else
+    error ("unknown %<#pragma riscv intrinsic%> option %qs", name);
+}
+
+/* Implement TARGET_CHECK_BUILTIN_CALL.  */
+
+static bool
+riscv_check_builtin_call (location_t loc, vec<location_t> arg_loc,
+			  tree fndecl, tree orig_fndecl,
+			  unsigned int nargs, tree *args)
+{
+  unsigned int code = DECL_MD_FUNCTION_CODE (fndecl);
+  unsigned int subcode = code >> RISCV_BUILTIN_SHIFT;
+
+  switch (code & RISCV_BUILTIN_CLASS)
+    {
+    case RISCV_BUILTIN_GENERAL:
+      return true;
+
+    case RISCV_BUILTIN_VECTOR:
+      return riscv_vector::check_builtin_call (loc, arg_loc, subcode,
+					       orig_fndecl, nargs, args);
+    }
+
+  gcc_unreachable ();
+}
+
+/* Implement REGISTER_TARGET_PRAGMAS.  */
+
+void
+riscv_register_pragmas (void)
+{
+  targetm.check_builtin_call = riscv_check_builtin_call;
+  c_register_pragma ("riscv", "intrinsic", riscv_pragma_intrinsic);
+}
\ No newline at end of file
diff --git a/gcc/config/riscv/riscv-protos.h b/gcc/config/riscv/riscv-protos.h
index 1cb3586d1f1..4a4ac645f55 100644
--- a/gcc/config/riscv/riscv-protos.h
+++ b/gcc/config/riscv/riscv-protos.h
@@ -116,6 +116,7 @@  extern bool rvv_legitimate_poly_int_p (rtx);
 extern unsigned int rvv_offset_temporaries (bool, poly_int64);
 extern enum vlmul_field_enum riscv_classify_vlmul_field (machine_mode);
 extern int rvv_regsize (machine_mode);
+extern void riscv_register_pragmas (void);
 
 /* We classify builtin types into two classes:
    1. General builtin class which is using the
diff --git a/gcc/config/riscv/riscv.h b/gcc/config/riscv/riscv.h
index 8f56a5a4746..cb4cfc0f73e 100644
--- a/gcc/config/riscv/riscv.h
+++ b/gcc/config/riscv/riscv.h
@@ -1067,4 +1067,6 @@  extern void riscv_remove_unneeded_save_restore_calls (void);
 
 #define TARGET_SUPPORTS_WIDE_INT 1
 
+#define REGISTER_TARGET_PRAGMAS() riscv_register_pragmas ()
+
 #endif /* ! GCC_RISCV_H */
diff --git a/gcc/config/riscv/riscv_vector.h b/gcc/config/riscv/riscv_vector.h
new file mode 100644
index 00000000000..ef1820a07cb
--- /dev/null
+++ b/gcc/config/riscv/riscv_vector.h
@@ -0,0 +1,41 @@ 
+/* Header of intrinsics for RISC-V 'V' Extension for GNU compiler.
+   Copyright (C) 2021-2021 Free Software Foundation, Inc.
+   Contributed by Juzhe Zhong (juzhe.zhong@rivai.ai).
+   Based on MIPS target for GNU compiler.
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 3, or (at your option)
+any later version.
+
+GCC is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with GCC; see the file COPYING3.  If not see
+<http://www.gnu.org/licenses/>.  */
+
+#ifndef __RISCV_VECTOR_H
+#define __RISCV_VECTOR_H
+
+#include <stdint.h>
+#include <stddef.h>
+
+typedef float float32_t;
+typedef double float64_t;
+
+typedef float __float32_t;
+typedef double __float64_t;
+
+/* NOTE: This implementation of riscv_vector.h is intentionally short.  It does
+   not define the RVV types and intrinsic functions directly in C and C++
+   code, but instead uses the following pragma to tell GCC to insert the
+   necessary type and function definitions itself.  The net effect is the
+   same, and the file is a complete implementation of riscv_vector.h.  */
+#pragma riscv intrinsic "vector"
+
+#endif // __RISCV_VECTOR_H
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