From patchwork Fri May 6 08:00:56 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Jiang, Haochen" X-Patchwork-Id: 53545 Return-Path: X-Original-To: patchwork@sourceware.org Delivered-To: patchwork@sourceware.org Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id 24CE73856DD6 for ; Fri, 6 May 2022 08:01:30 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org 24CE73856DD6 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gcc.gnu.org; s=default; t=1651824090; bh=ze1rtIUjQD/rRF3oUb20iEoZXDI34xBAr1UJFX5b3Xk=; h=To:Subject:Date:List-Id:List-Unsubscribe:List-Archive:List-Post: List-Help:List-Subscribe:From:Reply-To:Cc:From; b=BSxab1ubDgRB2XunQlsGqKdydAn5czcKAzB2zAx4MtVZ8MSsmpCwunPVE7vre/rPg vGioLPAzXb13jFBRfr8Qok+VEhT78TmppYW+oCg1kl11xHm7jlPDgaZzms2zm8LLaa MF0j+1io8vvx68H+CHSwUzkpI8DvlMb9lU7X63Rk= X-Original-To: gcc-patches@gcc.gnu.org Delivered-To: gcc-patches@gcc.gnu.org Received: from mga02.intel.com (mga02.intel.com [134.134.136.20]) by sourceware.org (Postfix) with ESMTPS id 424E9385736C for ; Fri, 6 May 2022 08:00:59 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.1 sourceware.org 424E9385736C X-IronPort-AV: E=McAfee;i="6400,9594,10338"; a="255869591" X-IronPort-AV: E=Sophos;i="5.91,203,1647327600"; d="scan'208";a="255869591" Received: from orsmga004.jf.intel.com ([10.7.209.38]) by orsmga101.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 06 May 2022 01:00:58 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.91,203,1647327600"; d="scan'208";a="695052146" Received: from scymds02.sc.intel.com ([10.82.73.244]) by orsmga004.jf.intel.com with ESMTP; 06 May 2022 01:00:58 -0700 Received: from shliclel320.sh.intel.com (shliclel320.sh.intel.com [10.239.236.50]) by scymds02.sc.intel.com with ESMTP id 24680uAD020625; Fri, 6 May 2022 01:00:57 -0700 To: gcc-patches@gcc.gnu.org Subject: [PATCH] [i386]Add combine splitter to transform pxor/pcmpeqb/pmovmskb/cmp 0xffff to ptest. Date: Fri, 6 May 2022 16:00:56 +0800 Message-Id: <20220506080056.84313-1-haochen.jiang@intel.com> X-Mailer: git-send-email 2.18.1 X-Spam-Status: No, score=-12.6 required=5.0 tests=BAYES_00, DKIMWL_WL_HIGH, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, DKIM_VALID_EF, GIT_PATCH_0, KAM_SHORT, RCVD_IN_MSPIKE_H3, RCVD_IN_MSPIKE_WL, SPF_HELO_NONE, SPF_NONE, TXREP, T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.4 X-Spam-Checker-Version: SpamAssassin 3.4.4 (2020-01-24) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-Patchwork-Original-From: Haochen Jiang via Gcc-patches From: "Jiang, Haochen" Reply-To: Haochen Jiang Cc: hongtao.liu@intel.com Errors-To: gcc-patches-bounces+patchwork=sourceware.org@gcc.gnu.org Sender: "Gcc-patches" Hi all, This patch aims to add a combine splitter to transform pxor/pcmpeqb/pmovmskb/cmp 0xffff to ptest. Regtested on x86_64-pc-linux-gnu. Ok for trunk? BRs, Haochen gcc/ChangeLog: PR target/104371 * config/i386/sse.md: Add new define_mode_attr and define_split. gcc/testsuite/ChangeLog: PR target/104371 * gcc.target/i386/pr104371-1.c: New test. * gcc.target/i386/pr104371-2.c: Ditto. --- gcc/config/i386/sse.md | 19 +++++++++++++++++++ gcc/testsuite/gcc.target/i386/pr104371-1.c | 14 ++++++++++++++ gcc/testsuite/gcc.target/i386/pr104371-2.c | 14 ++++++++++++++ 3 files changed, 47 insertions(+) create mode 100644 gcc/testsuite/gcc.target/i386/pr104371-1.c create mode 100755 gcc/testsuite/gcc.target/i386/pr104371-2.c diff --git a/gcc/config/i386/sse.md b/gcc/config/i386/sse.md index 7b791def542..71afda73c8f 100644 --- a/gcc/config/i386/sse.md +++ b/gcc/config/i386/sse.md @@ -20083,6 +20083,25 @@ (set_attr "prefix" "maybe_vex") (set_attr "mode" "SI")]) +;; Optimize pxor/pcmpeqb/pmovmskb/cmp 0xffff to ptest. +(define_mode_attr vi1avx2const + [(V32QI "0xffffffff") (V16QI "0xffff")]) + +(define_split + [(set (reg:CCZ FLAGS_REG) + (compare:CCZ (unspec:SI + [(eq:VI1_AVX2 + (match_operand:VI1_AVX2 0 "vector_operand") + (match_operand:VI1_AVX2 1 "const0_operand"))] + UNSPEC_MOVMSK) + (match_operand 2 "const_int_operand")))] + "TARGET_SSE4_1 && ix86_match_ccmode (insn, CCmode) + && (INTVAL (operands[2]) == (int) ())" + [(set (reg:CC FLAGS_REG) + (unspec:CC [(match_dup 0) + (match_dup 0)] + UNSPEC_PTEST))]) + (define_expand "sse2_maskmovdqu" [(set (match_operand:V16QI 0 "memory_operand") (unspec:V16QI [(match_operand:V16QI 1 "register_operand") diff --git a/gcc/testsuite/gcc.target/i386/pr104371-1.c b/gcc/testsuite/gcc.target/i386/pr104371-1.c new file mode 100644 index 00000000000..df7c0b074e3 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/pr104371-1.c @@ -0,0 +1,14 @@ +/* { dg-do compile } */ +/* { dg-options "-O2 -msse4" } */ +/* { dg-final { scan-assembler "ptest\[ \\t\]" } } */ +/* { dg-final { scan-assembler-not "pxor\[ \\t\]" } } */ +/* { dg-final { scan-assembler-not "pcmpeqb\[ \\t\]" } } */ +/* { dg-final { scan-assembler-not "pmovmskb\[ \\t\]" } } */ + +#include +#include + +bool is_zero(__m128i x) +{ + return _mm_movemask_epi8(_mm_cmpeq_epi8(x, _mm_setzero_si128())) == 0xffff; +} diff --git a/gcc/testsuite/gcc.target/i386/pr104371-2.c b/gcc/testsuite/gcc.target/i386/pr104371-2.c new file mode 100755 index 00000000000..f0d0afd5897 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/pr104371-2.c @@ -0,0 +1,14 @@ +/* { dg-do compile } */ +/* { dg-options "-O2 -mavx2" } */ +/* { dg-final { scan-assembler "vptest\[ \\t\]" } } */ +/* { dg-final { scan-assembler-not "vpxor\[ \\t\]" } } */ +/* { dg-final { scan-assembler-not "vpcmpeqb\[ \\t\]" } } */ +/* { dg-final { scan-assembler-not "vpmovmskb\[ \\t\]" } } */ + +#include +#include + +bool is_zero256(__m256i x) +{ + return _mm256_movemask_epi8(_mm256_cmpeq_epi8(x, _mm256_setzero_si256())) == 0xffffffff; +}