From patchwork Tue Mar 29 15:32:11 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Earnshaw X-Patchwork-Id: 52451 Return-Path: X-Original-To: patchwork@sourceware.org Delivered-To: patchwork@sourceware.org Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id 312AA3888832 for ; Tue, 29 Mar 2022 15:33:48 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org 312AA3888832 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gcc.gnu.org; s=default; t=1648568028; bh=vEWQRy7pagzFl138+e0hJIVP5dkK0L2lxUk07ZVFEnI=; h=To:Subject:Date:In-Reply-To:References:List-Id:List-Unsubscribe: List-Archive:List-Post:List-Help:List-Subscribe:From:Reply-To:Cc: From; b=VRlTm7XEw5SNis0/c0h8T1mMzBXcp3YHZ3MxEz/wt5zPllDasjpTBpBPCz0fwFCC6 90+wnT6nM5uLR4Xj2cvfGMl2yjF7C9Xx/AtuV7R130wcp9piqTUbK3Oq0VloPsiNU4 VHDfo1IrQul4NKzJbIfDaL+v3FtHS+UaJKXM3Y6c= X-Original-To: gcc-patches@gcc.gnu.org Delivered-To: gcc-patches@gcc.gnu.org Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by sourceware.org (Postfix) with ESMTP id F0654386549C for ; Tue, 29 Mar 2022 15:32:22 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.1 sourceware.org F0654386549C Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 958B61477; Tue, 29 Mar 2022 08:32:22 -0700 (PDT) Received: from e126323.arm.com (unknown [10.57.40.209]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id CDE533F73B; Tue, 29 Mar 2022 08:32:21 -0700 (PDT) To: gcc-patches@gcc.gnu.org Subject: [PATCH 2/2] aarch64: correctly handle zero-sized bit-fields in AAPCS64 [PR102024] Date: Tue, 29 Mar 2022 16:32:11 +0100 Message-Id: <20220329153211.110702-2-rearnsha@arm.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220329153211.110702-1-rearnsha@arm.com> References: <20220329153211.110702-1-rearnsha@arm.com> MIME-Version: 1.0 X-Spam-Status: No, score=-13.7 required=5.0 tests=BAYES_00, GIT_PATCH_0, KAM_DMARC_STATUS, KAM_SHORT, SPF_HELO_NONE, SPF_PASS, TXREP, T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.4 X-Spam-Checker-Version: SpamAssassin 3.4.4 (2020-01-24) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-Patchwork-Original-From: Richard Earnshaw via Gcc-patches From: Richard Earnshaw Reply-To: Richard Earnshaw Cc: jakub@redhat.com, Richard Earnshaw Errors-To: gcc-patches-bounces+patchwork=sourceware.org@gcc.gnu.org Sender: "Gcc-patches" On aarch64 the AAPCS64 states that an HFA is determined by the 'shape' of the object after layout has been completed, so anything that adds no members and does not cause the layout to be modified should be ignored for the purposes of determining which registers are used for parameter passing. A zero-sized bit-field falls into this category. This was not handled correctly for C structs and in G++-11 only handled correctly because such fields were eliminated early by the front end. gcc/ChangeLog: PR target/102024 * config/aarch64/aarch64.cc (aapcs_vfp_sub_candidate): Handle zero-sized bit-fields. Detect cases where a warning may be needed. (aarch64_vfp_is_call_or_return_candidate): Emit a note if a zero-sized bit-field has caused parameter passing to change. gcc/testsuite/ChangeLog: * gcc.target/aarch64/aapcs64/test_28.c: New test. --- gcc/config/aarch64/aarch64.cc | 35 +++++++++++++++++-- .../gcc.target/aarch64/aapcs64/test_28.c | 28 +++++++++++++++ 2 files changed, 60 insertions(+), 3 deletions(-) create mode 100644 gcc/testsuite/gcc.target/aarch64/aapcs64/test_28.c diff --git a/gcc/config/aarch64/aarch64.cc b/gcc/config/aarch64/aarch64.cc index dbeaaf484db..296f393cf39 100644 --- a/gcc/config/aarch64/aarch64.cc +++ b/gcc/config/aarch64/aarch64.cc @@ -19355,6 +19355,7 @@ aarch64_member_type_forces_blk (const_tree field_or_array, machine_mode mode) a HFA or HVA. */ const unsigned int WARN_PSABI_EMPTY_CXX17_BASE = 1U << 0; const unsigned int WARN_PSABI_NO_UNIQUE_ADDRESS = 1U << 1; +const unsigned int WARN_PSABI_ZERO_WIDTH_BITFIELD = 1U << 2; /* Walk down the type tree of TYPE counting consecutive base elements. If *MODEP is VOIDmode, then set it to the first valid floating point @@ -19511,6 +19512,28 @@ aapcs_vfp_sub_candidate (const_tree type, machine_mode *modep, continue; } } + /* A zero-width bitfield may affect layout in some + circumstances, but adds no members. The determination + of whether or not a type is an HFA is performed after + layout is complete, so if the type still looks like an + HFA afterwards, it is still classed as one. This is + potentially an ABI break for the hard-float ABI. */ + else if (DECL_BIT_FIELD (field) + && integer_zerop (DECL_SIZE (field))) + { + /* Prior to GCC-12 these fields were striped early, + hiding them from the back-end entirely and + resulting in the correct behaviour for argument + passing. Simulate that old behaviour without + generating a warning. */ + if (DECL_FIELD_CXX_ZERO_WIDTH_BIT_FIELD (field)) + continue; + if (warn_psabi_flags) + { + *warn_psabi_flags |= WARN_PSABI_ZERO_WIDTH_BITFIELD; + continue; + } + } sub_count = aapcs_vfp_sub_candidate (TREE_TYPE (field), modep, warn_psabi_flags); @@ -19711,8 +19734,10 @@ aarch64_vfp_is_call_or_return_candidate (machine_mode mode, && ((alt = aapcs_vfp_sub_candidate (type, &new_mode, NULL)) != ag_count)) { - const char *url + const char *url10 = CHANGES_ROOT_URL "gcc-10/changes.html#empty_base"; + const char *url12 + = CHANGES_ROOT_URL "gcc-12/changes.html#empty_base"; gcc_assert (alt == -1); last_reported_type_uid = uid; /* Use TYPE_MAIN_VARIANT to strip any redundant const @@ -19721,12 +19746,16 @@ aarch64_vfp_is_call_or_return_candidate (machine_mode mode, inform (input_location, "parameter passing for argument of " "type %qT with %<[[no_unique_address]]%> members " "changed %{in GCC 10.1%}", - TYPE_MAIN_VARIANT (type), url); + TYPE_MAIN_VARIANT (type), url10); else if (warn_psabi_flags & WARN_PSABI_EMPTY_CXX17_BASE) inform (input_location, "parameter passing for argument of " "type %qT when C++17 is enabled changed to match " "C++14 %{in GCC 10.1%}", - TYPE_MAIN_VARIANT (type), url); + TYPE_MAIN_VARIANT (type), url10); + else if (warn_psabi_flags & WARN_PSABI_ZERO_WIDTH_BITFIELD) + inform (input_location, "parameter passing for argument of " + "type %qT changed %{in GCC 12.1%}", + TYPE_MAIN_VARIANT (type), url12); } if (is_ha != NULL) *is_ha = true; diff --git a/gcc/testsuite/gcc.target/aarch64/aapcs64/test_28.c b/gcc/testsuite/gcc.target/aarch64/aapcs64/test_28.c new file mode 100644 index 00000000000..951057b3509 --- /dev/null +++ b/gcc/testsuite/gcc.target/aarch64/aapcs64/test_28.c @@ -0,0 +1,28 @@ +/* Test AAPCS64 layout for HFA with zero-sized bit-field. */ + +/* { dg-do run { target aarch64*-*-* } } */ + +#ifndef IN_FRAMEWORK +#define VFP +#define TESTFILE "test_28.c" + +/* Anonymous bitfields do not add members; if they do not change the layout + then the end result may still be an HFA. */ +struct z +{ + float a; + int :0; + float b; +}; + +struct z a = { 5.0f, 6.0f }; +struct z b = { 9.0f, 10.0f }; + +#define MYFUNCTYPE struct z + +#include "abitest.h" +#else + ARG(int, 7, W0) + ARG(struct z, a, S0) + LAST_ARG(struct z, b, S2) +#endif