From patchwork Thu Feb 10 09:18:00 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tom de Vries X-Patchwork-Id: 50995 Return-Path: X-Original-To: patchwork@sourceware.org Delivered-To: patchwork@sourceware.org Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id 162D13858410 for ; Thu, 10 Feb 2022 09:18:35 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org 162D13858410 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gcc.gnu.org; s=default; t=1644484715; bh=dmdDBuGTQQM+T5OdOGCzwAMK9H5TYFnQnuELGCr4v9k=; h=Date:To:Subject:List-Id:List-Unsubscribe:List-Archive:List-Post: List-Help:List-Subscribe:From:Reply-To:Cc:From; b=lAwKGe9mw80eqfe+UIc9FXIVC0sabd/m1raKRA/QIe7YL6i+FjhX5sbOIctvEmtrY 5P2OJLDq0QBDbyXBljxnmvCb/pF0Q95AbqW42wX0tyueJVjrAO2BR+DAjol+hBtjwH Qfs2TOgi4t7jU7Jz2HWVeGe1eUTIz9eOdqIPWXsU= X-Original-To: gcc-patches@gcc.gnu.org Delivered-To: gcc-patches@gcc.gnu.org Received: from smtp-out2.suse.de (smtp-out2.suse.de [195.135.220.29]) by sourceware.org (Postfix) with ESMTPS id D65823858D28 for ; Thu, 10 Feb 2022 09:18:02 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.1 sourceware.org D65823858D28 Received: from imap2.suse-dmz.suse.de (imap2.suse-dmz.suse.de [192.168.254.74]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature ECDSA (P-521) server-digest SHA512) (No client certificate requested) by smtp-out2.suse.de (Postfix) with ESMTPS id 132C31F391; Thu, 10 Feb 2022 09:18:02 +0000 (UTC) Received: from imap2.suse-dmz.suse.de (imap2.suse-dmz.suse.de [192.168.254.74]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature ECDSA (P-521) server-digest SHA512) (No client certificate requested) by imap2.suse-dmz.suse.de (Postfix) with ESMTPS id ED0ED13B31; Thu, 10 Feb 2022 09:18:01 +0000 (UTC) Received: from dovecot-director2.suse.de ([192.168.254.65]) by imap2.suse-dmz.suse.de with ESMTPSA id 2aDJOEnYBGKERwAAMHmgww (envelope-from ); Thu, 10 Feb 2022 09:18:01 +0000 Date: Thu, 10 Feb 2022 10:18:00 +0100 To: gcc-patches@gcc.gnu.org Subject: [PATCH][libgomp, nvptx] Add spinlock test-cases Message-ID: <20220210091758.GA21003@delia.home> MIME-Version: 1.0 Content-Disposition: inline User-Agent: Mutt/1.10.1 (2018-07-13) X-Spam-Status: No, score=-12.9 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, DKIM_VALID_EF, GIT_PATCH_0, RCVD_IN_DNSWL_LOW, SPF_HELO_NONE, SPF_PASS, TXREP, T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.4 X-Spam-Checker-Version: SpamAssassin 3.4.4 (2020-01-24) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-Patchwork-Original-From: Tom de Vries via Gcc-patches From: Tom de Vries Reply-To: Tom de Vries Cc: Thomas Schwinge Errors-To: gcc-patches-bounces+patchwork=sourceware.org@gcc.gnu.org Sender: "Gcc-patches" Hi, Add spinlock test-cases for nvptx. Strictly speaking, these are invalid openACC, because they're not guaranteed to terminate. But I've tested these without problems on cards from nvidia architectures Kepler, Maxwell, Pascal and Turing (though on Turing, that's what you expect given that it's explicitly supported). These have been submitted separately, to make reverting easy in case of problems. Tested on x86_64 with nvptx accelerator. Thomas, OK for the unusual openACC aspect of it? Thanks, - Tom [libgomp, nvptx] Add spinlock test-cases libgomp/ChangeLog: 2022-02-02 Tom de Vries * testsuite/libgomp.oacc-c/spin-lock-global-2.c: New test. * testsuite/libgomp.oacc-c/spin-lock-global-3.c: New test. * testsuite/libgomp.oacc-c/spin-lock-shared-2.c: New test. * testsuite/libgomp.oacc-c/spin-lock-shared-3.c: New test. --- libgomp/testsuite/libgomp.oacc-c/spin-lock-global-2.c | 8 ++++++++ libgomp/testsuite/libgomp.oacc-c/spin-lock-global-3.c | 7 +++++++ libgomp/testsuite/libgomp.oacc-c/spin-lock-shared-2.c | 8 ++++++++ libgomp/testsuite/libgomp.oacc-c/spin-lock-shared-3.c | 7 +++++++ 4 files changed, 30 insertions(+) diff --git a/libgomp/testsuite/libgomp.oacc-c/spin-lock-global-2.c b/libgomp/testsuite/libgomp.oacc-c/spin-lock-global-2.c new file mode 100644 index 00000000000..b6a8728cb42 --- /dev/null +++ b/libgomp/testsuite/libgomp.oacc-c/spin-lock-global-2.c @@ -0,0 +1,8 @@ +/* { dg-do run { target openacc_nvidia_accel_selected } } */ + +/* Define to 0 to have a regular spinlock. + Makes the test-case invalid OpenACC: there's nothing that guarantees that + the program will terminate. So, we only do this for nvptx. */ +#define SPIN_CNT_MAX 0 + +#include "spin-lock-global.c" diff --git a/libgomp/testsuite/libgomp.oacc-c/spin-lock-global-3.c b/libgomp/testsuite/libgomp.oacc-c/spin-lock-global-3.c new file mode 100644 index 00000000000..157384e4cb4 --- /dev/null +++ b/libgomp/testsuite/libgomp.oacc-c/spin-lock-global-3.c @@ -0,0 +1,7 @@ +/* As in spin-lock-global-2.c. */ +/* { dg-do run { target openacc_nvidia_accel_selected } } */ + +/* Also test without JIT optimization. */ +/* { dg-set-target-env-var GOMP_NVPTX_JIT "-O0" } */ + +#include "spin-lock-global-2.c" diff --git a/libgomp/testsuite/libgomp.oacc-c/spin-lock-shared-2.c b/libgomp/testsuite/libgomp.oacc-c/spin-lock-shared-2.c new file mode 100644 index 00000000000..43e4686b841 --- /dev/null +++ b/libgomp/testsuite/libgomp.oacc-c/spin-lock-shared-2.c @@ -0,0 +1,8 @@ +/* { dg-do run { target openacc_nvidia_accel_selected } } */ + +/* Define to 0 to have a regular spinlock. + Makes the test-case invalid OpenACC: there's nothing that guarantees that + the program will terminate. So, we only do this for nvptx. */ +#define SPIN_CNT_MAX 0 + +#include "spin-lock-shared.c" diff --git a/libgomp/testsuite/libgomp.oacc-c/spin-lock-shared-3.c b/libgomp/testsuite/libgomp.oacc-c/spin-lock-shared-3.c new file mode 100644 index 00000000000..79f22f7ec4e --- /dev/null +++ b/libgomp/testsuite/libgomp.oacc-c/spin-lock-shared-3.c @@ -0,0 +1,7 @@ +/* As in spin-lock-global-2.c. */ +/* { dg-do run { target openacc_nvidia_accel_selected } } */ + +/* Also test without JIT optimization. */ +/* { dg-set-target-env-var GOMP_NVPTX_JIT "-O0" } */ + +#include "spin-lock-shared-2.c"