diff mbox series

[committed,nvptx] Improve gcc.target/nvptx/atomic_fetch-*.c test-cases

Message ID 20220112145706.GA5174@delia.home
State Committed
Commit d62e14e24cdc6de11b1367916cdd613cc7bd3ed7
Headers
Series [committed,nvptx] Improve gcc.target/nvptx/atomic_fetch-*.c test-cases |

Commit Message

Tom de Vries Jan. 12, 2022, 2:57 p.m. UTC 
  Hi,

Fix a few issues in test-cases gcc.target/nvptx/atomic_fetch-*.c:
- atomic_fetch-1.c uses scan-assembler instead of scan-assembler-times,
  which is less accurate
- atomic_fetch-2.c only contains negative testing using
  scan-assembler-not
- the test-cases use stack variables to generate generic addresses,
  while stack atomics are not natively supported
- the test-cases only test (64-bit) x (generic), instead of
  (32-bit, 64-bit) x (generic, global, shared)
- the test-cases use a hardcoded '0' instead of the clearer
  MEMMODEL_RELAXED

Tested on nvptx.

Committed to trunk.

Thanks,
- Tom

[nvptx] Improve gcc.target/nvptx/atomic_fetch-*.c test-cases

gcc/testsuite/ChangeLog:

2022-01-12  Tom de Vries  <tdevries@suse.de>

	* gcc.target/nvptx/atomic_fetch-1.c: Rewrite.
	* gcc.target/nvptx/atomic_fetch-2.c: Rewrite.

---
 gcc/testsuite/gcc.target/nvptx/atomic_fetch-1.c | 98 ++++++++++++++++++++++---
 gcc/testsuite/gcc.target/nvptx/atomic_fetch-2.c | 92 ++++++++++++++++++++---
 2 files changed, 168 insertions(+), 22 deletions(-)
diff mbox series

Patch

diff --git a/gcc/testsuite/gcc.target/nvptx/atomic_fetch-1.c b/gcc/testsuite/gcc.target/nvptx/atomic_fetch-1.c
index c637caa79a0..941cf3a2ab4 100644
--- a/gcc/testsuite/gcc.target/nvptx/atomic_fetch-1.c
+++ b/gcc/testsuite/gcc.target/nvptx/atomic_fetch-1.c
@@ -4,21 +4,97 @@ 
 /* { dg-do compile } */
 /* { dg-options "-O2 -misa=sm_35" } */
 
+enum memmodel
+{
+  MEMMODEL_RELAXED = 0
+};
+
+unsigned long long int *p64;
+unsigned int *p32;
+
+unsigned long long int g64;
+unsigned int g32;
+
+unsigned int s32 __attribute__((shared));
+unsigned long long int s64 __attribute__((shared));
+
+unsigned long long int v64;
+unsigned int v32;
+
 int
 main()
 {
-  unsigned long long a = ~0;
-  unsigned b = 0xa;
+  /* Generic.  */
 
-  __atomic_fetch_add (&a, b, 0);
-  __atomic_fetch_and (&a, b, 0);
-  __atomic_fetch_or (&a, b, 0);
-  __atomic_fetch_xor (&a, b, 0);
+  __atomic_fetch_add (p64, v64, MEMMODEL_RELAXED);
+  __atomic_fetch_and (p64, v64, MEMMODEL_RELAXED);
+  __atomic_fetch_or (p64, v64, MEMMODEL_RELAXED);
+  __atomic_fetch_xor (p64, v64, MEMMODEL_RELAXED);
   
-  return a;
+  __atomic_fetch_add (p32, v32, MEMMODEL_RELAXED);
+  __atomic_fetch_and (p32, v32, MEMMODEL_RELAXED);
+  __atomic_fetch_or (p32, v32, MEMMODEL_RELAXED);
+  __atomic_fetch_xor (p32, v32, MEMMODEL_RELAXED);
+
+  /* Global.  */
+
+  __atomic_fetch_add (&g64, v64, MEMMODEL_RELAXED);
+  __atomic_fetch_and (&g64, v64, MEMMODEL_RELAXED);
+  __atomic_fetch_or (&g64, v64, MEMMODEL_RELAXED);
+  __atomic_fetch_xor (&g64, v64, MEMMODEL_RELAXED);
+  
+  __atomic_fetch_add (&g32, v32, MEMMODEL_RELAXED);
+  __atomic_fetch_and (&g32, v32, MEMMODEL_RELAXED);
+  __atomic_fetch_or (&g32, v32, MEMMODEL_RELAXED);
+  __atomic_fetch_xor (&g32, v32, MEMMODEL_RELAXED);
+
+  /* Shared.  */
+
+  __atomic_fetch_add (&s64, v64, MEMMODEL_RELAXED);
+  __atomic_fetch_and (&s64, v64, MEMMODEL_RELAXED);
+  __atomic_fetch_or (&s64, v64, MEMMODEL_RELAXED);
+  __atomic_fetch_xor (&s64, v64, MEMMODEL_RELAXED);
+  
+  __atomic_fetch_add (&s32, v32, MEMMODEL_RELAXED);
+  __atomic_fetch_and (&s32, v32, MEMMODEL_RELAXED);
+  __atomic_fetch_or (&s32, v32, MEMMODEL_RELAXED);
+  __atomic_fetch_xor (&s32, v32, MEMMODEL_RELAXED);
+
+  return 0;
 }
 
-/* { dg-final { scan-assembler "atom.add.u64" } } */
-/* { dg-final { scan-assembler "atom.b64.and" } } */
-/* { dg-final { scan-assembler "atom.b64.or" } } */
-/* { dg-final { scan-assembler "atom.b64.xor" } } */
+/* Generic.  */
+
+/* { dg-final { scan-assembler-times "atom.add.u64" 1 } } */
+/* { dg-final { scan-assembler-times "atom.b64.and" 1 } } */
+/* { dg-final { scan-assembler-times "atom.b64.or" 1 } } */
+/* { dg-final { scan-assembler-times "atom.b64.xor" 1 } } */
+
+/* { dg-final { scan-assembler-times "atom.add.u32" 1 } } */
+/* { dg-final { scan-assembler-times "atom.b32.and" 1 } } */
+/* { dg-final { scan-assembler-times "atom.b32.or" 1 } } */
+/* { dg-final { scan-assembler-times "atom.b32.xor" 1 } } */
+
+/* Global.  */
+
+/* { dg-final { scan-assembler-times "atom.global.add.u64" 1 } } */
+/* { dg-final { scan-assembler-times "atom.global.b64.and" 1 } } */
+/* { dg-final { scan-assembler-times "atom.global.b64.or" 1 } } */
+/* { dg-final { scan-assembler-times "atom.global.b64.xor" 1 } } */
+
+/* { dg-final { scan-assembler-times "atom.global.add.u32" 1 } } */
+/* { dg-final { scan-assembler-times "atom.global.b32.and" 1 } } */
+/* { dg-final { scan-assembler-times "atom.global.b32.or" 1 } } */
+/* { dg-final { scan-assembler-times "atom.global.b32.xor" 1 } } */
+
+/* Shared.  */
+
+/* { dg-final { scan-assembler-times "atom.shared.add.u64" 1 } } */
+/* { dg-final { scan-assembler-times "atom.shared.b64.and" 1 } } */
+/* { dg-final { scan-assembler-times "atom.shared.b64.or" 1 } } */
+/* { dg-final { scan-assembler-times "atom.shared.b64.xor" 1 } } */
+
+/* { dg-final { scan-assembler-times "atom.shared.add.u32" 1 } } */
+/* { dg-final { scan-assembler-times "atom.shared.b32.and" 1 } } */
+/* { dg-final { scan-assembler-times "atom.shared.b32.or" 1 } } */
+/* { dg-final { scan-assembler-times "atom.shared.b32.xor" 1 } } */
diff --git a/gcc/testsuite/gcc.target/nvptx/atomic_fetch-2.c b/gcc/testsuite/gcc.target/nvptx/atomic_fetch-2.c
index 1d35a176a62..f5131fc4984 100644
--- a/gcc/testsuite/gcc.target/nvptx/atomic_fetch-2.c
+++ b/gcc/testsuite/gcc.target/nvptx/atomic_fetch-2.c
@@ -4,21 +4,91 @@ 
 /* { dg-do compile } */
 /* { dg-options "-O2 -misa=sm_30" } */
 
+enum memmodel
+{
+  MEMMODEL_RELAXED = 0
+};
+
+unsigned long long int *p64;
+unsigned int *p32;
+
+unsigned long long int g64;
+unsigned int g32;
+
+unsigned int s32 __attribute__((shared));
+unsigned long long int s64 __attribute__((shared));
+
+unsigned long long int v64;
+unsigned int v32;
+
 int
 main()
 {
-  unsigned long long a = ~0;
-  unsigned b = 0xa;
+  /* Generic.  */
 
-  __atomic_fetch_add (&a, b, 0);
-  __atomic_fetch_and (&a, b, 0);
-  __atomic_fetch_or (&a, b, 0);
-  __atomic_fetch_xor (&a, b, 0);
+  __atomic_fetch_add (p64, v64, MEMMODEL_RELAXED);
+  __atomic_fetch_and (p64, v64, MEMMODEL_RELAXED);
+  __atomic_fetch_or (p64, v64, MEMMODEL_RELAXED);
+  __atomic_fetch_xor (p64, v64, MEMMODEL_RELAXED);
   
-  return a;
+  __atomic_fetch_add (p32, v32, MEMMODEL_RELAXED);
+  __atomic_fetch_and (p32, v32, MEMMODEL_RELAXED);
+  __atomic_fetch_or (p32, v32, MEMMODEL_RELAXED);
+  __atomic_fetch_xor (p32, v32, MEMMODEL_RELAXED);
+
+  /* Global.  */
+
+  __atomic_fetch_add (&g64, v64, MEMMODEL_RELAXED);
+  __atomic_fetch_and (&g64, v64, MEMMODEL_RELAXED);
+  __atomic_fetch_or (&g64, v64, MEMMODEL_RELAXED);
+  __atomic_fetch_xor (&g64, v64, MEMMODEL_RELAXED);
+  
+  __atomic_fetch_add (&g32, v32, MEMMODEL_RELAXED);
+  __atomic_fetch_and (&g32, v32, MEMMODEL_RELAXED);
+  __atomic_fetch_or (&g32, v32, MEMMODEL_RELAXED);
+  __atomic_fetch_xor (&g32, v32, MEMMODEL_RELAXED);
+
+  /* Shared.  */
+
+  __atomic_fetch_add (&s64, v64, MEMMODEL_RELAXED);
+  __atomic_fetch_and (&s64, v64, MEMMODEL_RELAXED);
+  __atomic_fetch_or (&s64, v64, MEMMODEL_RELAXED);
+  __atomic_fetch_xor (&s64, v64, MEMMODEL_RELAXED);
+  
+  __atomic_fetch_add (&s32, v32, MEMMODEL_RELAXED);
+  __atomic_fetch_and (&s32, v32, MEMMODEL_RELAXED);
+  __atomic_fetch_or (&s32, v32, MEMMODEL_RELAXED);
+  __atomic_fetch_xor (&s32, v32, MEMMODEL_RELAXED);
+
+  return 0;
 }
 
-/* { dg-final { scan-assembler-not "atom.b64.add" } } */
-/* { dg-final { scan-assembler-not "atom.b64.and" } } */
-/* { dg-final { scan-assembler-not "atom.b64.or" } } */
-/* { dg-final { scan-assembler-not "atom.b64.xor" } } */
+/* Generic.  */
+
+/* { dg-final { scan-assembler-times "atom.add.u64" 1 } } */
+/* { dg-final { scan-assembler-times "atom.cas.b64" 3 } } */
+
+/* { dg-final { scan-assembler-times "atom.add.u32" 1 } } */
+/* { dg-final { scan-assembler-times "atom.b32.and" 1 } } */
+/* { dg-final { scan-assembler-times "atom.b32.or" 1 } } */
+/* { dg-final { scan-assembler-times "atom.b32.xor" 1 } } */
+
+/* Global.  */
+
+/* { dg-final { scan-assembler-times "atom.global.add.u64" 1 } } */
+/* { dg-final { scan-assembler-times "atom.global.cas.b64" 3 } } */
+
+/* { dg-final { scan-assembler-times "atom.global.add.u32" 1 } } */
+/* { dg-final { scan-assembler-times "atom.global.b32.and" 1 } } */
+/* { dg-final { scan-assembler-times "atom.global.b32.or" 1 } } */
+/* { dg-final { scan-assembler-times "atom.global.b32.xor" 1 } } */
+
+/* Shared.  */
+
+/* { dg-final { scan-assembler-times "atom.shared.add.u64" 1 } } */
+/* { dg-final { scan-assembler-times "atom.shared.cas.b64" 3 } } */
+
+/* { dg-final { scan-assembler-times "atom.shared.add.u32" 1 } } */
+/* { dg-final { scan-assembler-times "atom.shared.b32.and" 1 } } */
+/* { dg-final { scan-assembler-times "atom.shared.b32.or" 1 } } */
+/* { dg-final { scan-assembler-times "atom.shared.b32.xor" 1 } } */