diff mbox series

x86: Update -mtune=tremont

Message ID 20211209065945.30994-1-lili.cui@intel.com
State Committed
Commit 35a4fe8091896529a19a7c2c2a32e69f3b5efddb
Headers
Series x86: Update -mtune=tremont |

Commit Message

Li, Pan2 via Gcc-patches Dec. 9, 2021, 6:59 a.m. UTC 
  Hi Uros,

This patch is to update mtune for tremont.

Bootstrap is ok, and no regressions for i386/x86-64 testsuite.

OK for master?


Silvermont has a special handle in add_stmt_cost function, because it has in
order SIMD pipeline. But for Tremont, its SIMD pipeline is out of order,
remove Tremont from this special handle.

gcc/ChangeLog

* config/i386/i386.c (ix86_vector_costs::add_stmt_cost): Remove Tremont.
---
 gcc/config/i386/i386.c | 3 +--
 1 file changed, 1 insertion(+), 2 deletions(-)

Comments

Uros Bizjak Dec. 9, 2021, 9:28 a.m. UTC | #1 
On Thu, Dec 9, 2021 at 7:59 AM Cui,Lili <lili.cui@intel.com> wrote:
>
> Hi Uros,
>
> This patch is to update mtune for tremont.
>
> Bootstrap is ok, and no regressions for i386/x86-64 testsuite.
>
> OK for master?

OK.

Thanks,
Uros.

>
>
> Silvermont has a special handle in add_stmt_cost function, because it has in
> order SIMD pipeline. But for Tremont, its SIMD pipeline is out of order,
> remove Tremont from this special handle.
>
> gcc/ChangeLog
>
> * config/i386/i386.c (ix86_vector_costs::add_stmt_cost): Remove Tremont.
> ---
>  gcc/config/i386/i386.c | 3 +--
>  1 file changed, 1 insertion(+), 2 deletions(-)
>
> diff --git a/gcc/config/i386/i386.c b/gcc/config/i386/i386.c
> index f1e41fd55f9..9f4ed34ffd5 100644
> --- a/gcc/config/i386/i386.c
> +++ b/gcc/config/i386/i386.c
> @@ -23144,8 +23144,7 @@ ix86_vector_costs::add_stmt_cost (int count, vect_cost_for_stmt kind,
>       for Silvermont as it has out of order integer pipeline and can execute
>       2 scalar instruction per tick, but has in order SIMD pipeline.  */
>    if ((TARGET_CPU_P (SILVERMONT) || TARGET_CPU_P (GOLDMONT)
> -       || TARGET_CPU_P (GOLDMONT_PLUS) || TARGET_CPU_P (TREMONT)
> -       || TARGET_CPU_P (INTEL))
> +       || TARGET_CPU_P (GOLDMONT_PLUS) || TARGET_CPU_P (INTEL))
>        && stmt_info && stmt_info->stmt)
>      {
>        tree lhs_op = gimple_get_lhs (stmt_info->stmt);
> --
> 2.17.1
>
> Thanks,
> Lili.
diff mbox series

Patch

diff --git a/gcc/config/i386/i386.c b/gcc/config/i386/i386.c
index f1e41fd55f9..9f4ed34ffd5 100644
--- a/gcc/config/i386/i386.c
+++ b/gcc/config/i386/i386.c
@@ -23144,8 +23144,7 @@  ix86_vector_costs::add_stmt_cost (int count, vect_cost_for_stmt kind,
      for Silvermont as it has out of order integer pipeline and can execute
      2 scalar instruction per tick, but has in order SIMD pipeline.  */
   if ((TARGET_CPU_P (SILVERMONT) || TARGET_CPU_P (GOLDMONT)
-       || TARGET_CPU_P (GOLDMONT_PLUS) || TARGET_CPU_P (TREMONT)
-       || TARGET_CPU_P (INTEL))
+       || TARGET_CPU_P (GOLDMONT_PLUS) || TARGET_CPU_P (INTEL))
       && stmt_info && stmt_info->stmt)
     {
       tree lhs_op = gimple_get_lhs (stmt_info->stmt);