diff mbox series

[v2,1/3] RISC-V: Minimal support of zfinx extension

Message ID 20211105130059.3332-2-jiawei@iscas.ac.cn
State Deferred, archived
Headers
Series RISC-V: Support zfinx extension |

Commit Message

Jiawei Nov. 5, 2021, 1 p.m. UTC 
  Minimal support of zfinx extension, include 'zfinx' and 'zdinx' corresponding to 'f' and 'd', the 'zdinx' will imply 'zfinx' same as 'd' imply 'f'.

gcc/ChangeLog:

        * common/config/riscv/riscv-common.c(riscv_implied_info_t): Add zdinx imply zfinx.
	  (riscv_ext_version_table): Add zfinx, zdinx.
        * config/riscv/arch-canonicalize(IMPLIED_EXT): Add zdinx imply zfinx.
        * config/riscv/riscv-opts.h
	  (MASK_ZFINX): New.
          (MASK_ZDINX): Ditto.
          (TARGET_ZFINX): Ditto.
          (TARGET_ZDINX): Ditto.
        * config/riscv/riscv.opt(riscv_zf_subext): New.

Co-Authored-By: sinan <sinan@isrc.iscas.ac.cn>
---
 gcc/common/config/riscv/riscv-common.c | 7 +++++++
 gcc/config/riscv/arch-canonicalize     | 1 +
 gcc/config/riscv/riscv-opts.h          | 6 ++++++
 gcc/config/riscv/riscv.opt             | 3 +++
 4 files changed, 17 insertions(+)
diff mbox series

Patch

diff --git a/gcc/common/config/riscv/riscv-common.c b/gcc/common/config/riscv/riscv-common.c
index 37b6ea80086..6db5a434257 100644
--- a/gcc/common/config/riscv/riscv-common.c
+++ b/gcc/common/config/riscv/riscv-common.c
@@ -50,6 +50,7 @@  static const riscv_implied_info_t riscv_implied_info[] =
   {"d", "f"},
   {"f", "zicsr"},
   {"d", "zicsr"},
+  {"zdinx", "zfinx"},
   {NULL, NULL}
 };
 
@@ -106,6 +107,9 @@  static const struct riscv_ext_version riscv_ext_version_table[] =
   {"zbc", ISA_SPEC_CLASS_NONE, 1, 0},
   {"zbs", ISA_SPEC_CLASS_NONE, 1, 0},
 
+  {"zfinx", ISA_SPEC_CLASS_NONE, 1, 0},
+  {"zdinx", ISA_SPEC_CLASS_NONE, 1, 0},
+
   /* Terminate the list.  */
   {NULL, ISA_SPEC_CLASS_NONE, 0, 0}
 };
@@ -916,6 +920,9 @@  static const riscv_ext_flag_table_t riscv_ext_flag_table[] =
   {"zbc",    &gcc_options::x_riscv_zb_subext, MASK_ZBC},
   {"zbs",    &gcc_options::x_riscv_zb_subext, MASK_ZBS},
 
+  {"zfinx",    &gcc_options::x_riscv_zf_subext, MASK_ZFINX},
+  {"zdinx",    &gcc_options::x_riscv_zf_subext, MASK_ZDINX},
+
   {NULL, NULL, 0}
 };
 
diff --git a/gcc/config/riscv/arch-canonicalize b/gcc/config/riscv/arch-canonicalize
index c7df3c8a313..9197163d1c3 100755
--- a/gcc/config/riscv/arch-canonicalize
+++ b/gcc/config/riscv/arch-canonicalize
@@ -36,6 +36,7 @@  LONG_EXT_PREFIXES = ['z', 's', 'h', 'x']
 #
 IMPLIED_EXT = {
   "d" : ["f"],
+  "zdinx" : ["zfinx"],
 }
 
 def arch_canonicalize(arch):
diff --git a/gcc/config/riscv/riscv-opts.h b/gcc/config/riscv/riscv-opts.h
index 2efc4b80f1f..5a790a028cf 100644
--- a/gcc/config/riscv/riscv-opts.h
+++ b/gcc/config/riscv/riscv-opts.h
@@ -83,4 +83,10 @@  enum stack_protector_guard {
 #define TARGET_ZBC    ((riscv_zb_subext & MASK_ZBC) != 0)
 #define TARGET_ZBS    ((riscv_zb_subext & MASK_ZBS) != 0)
 
+#define MASK_ZFINX      (1 << 0)
+#define MASK_ZDINX      (1 << 1)
+
+#define TARGET_ZFINX    ((riscv_zf_subext & MASK_ZFINX) != 0)
+#define TARGET_ZDINX    ((riscv_zf_subext & MASK_ZDINX) != 0)
+
 #endif /* ! GCC_RISCV_OPTS_H */
diff --git a/gcc/config/riscv/riscv.opt b/gcc/config/riscv/riscv.opt
index 15bf89e17c2..54d27747eff 100644
--- a/gcc/config/riscv/riscv.opt
+++ b/gcc/config/riscv/riscv.opt
@@ -198,6 +198,9 @@  int riscv_zi_subext
 TargetVariable
 int riscv_zb_subext
 
+TargetVariable
+int riscv_zf_subext
+
 Enum
 Name(isa_spec_class) Type(enum riscv_isa_spec_class)
 Supported ISA specs (for use with the -misa-spec= option):