From patchwork Mon Nov 1 02:46:19 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Liu, Hongtao" X-Patchwork-Id: 46878 Return-Path: X-Original-To: patchwork@sourceware.org Delivered-To: patchwork@sourceware.org Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id 1A1DF385801A for ; Mon, 1 Nov 2021 02:46:56 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org 1A1DF385801A DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gcc.gnu.org; s=default; t=1635734816; bh=cpAoxIY8bm1A9eswg4pjPdBt0M38/ijXitjUWq5DNjQ=; h=To:Subject:Date:In-Reply-To:References:List-Id:List-Unsubscribe: List-Archive:List-Post:List-Help:List-Subscribe:From:Reply-To: From; b=V2hc03YIoX8UEHMHWtAcnVso3XgKHZ+KC9IlPL3LX5OeUM++H+yYhpQScb3EFRCm1 7/KCgwp24SyJxrO//UDJPtiTd5Q/gBbC7qy2ASnjlKdK5gYcw75qhsVlFmUC27EU7/ NEpBen61fbj/XFOc7P+mJt3pJQ2OrVpLK2s2gbVI= X-Original-To: gcc-patches@gcc.gnu.org Delivered-To: gcc-patches@gcc.gnu.org Received: from mga05.intel.com (mga05.intel.com [192.55.52.43]) by sourceware.org (Postfix) with ESMTPS id 06EA83858424 for ; Mon, 1 Nov 2021 02:46:22 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.1 sourceware.org 06EA83858424 X-IronPort-AV: E=McAfee;i="6200,9189,10154"; a="317134452" X-IronPort-AV: E=Sophos;i="5.87,198,1631602800"; d="scan'208";a="317134452" Received: from fmsmga004.fm.intel.com ([10.253.24.48]) by fmsmga105.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 31 Oct 2021 19:46:21 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.87,198,1631602800"; d="scan'208";a="558598667" Received: from scymds01.sc.intel.com ([10.148.94.138]) by fmsmga004.fm.intel.com with ESMTP; 31 Oct 2021 19:46:21 -0700 Received: from shliclel051.sh.intel.com (shliclel051.sh.intel.com [10.239.236.51]) by scymds01.sc.intel.com with ESMTP id 1A12kJms020079; Sun, 31 Oct 2021 19:46:20 -0700 To: gcc-patches@gcc.gnu.org Subject: [PATCH] Adjust testcase for O2 vect. Date: Mon, 1 Nov 2021 10:46:19 +0800 Message-Id: <20211101024619.97957-1-hongtao.liu@intel.com> X-Mailer: git-send-email 2.18.1 In-Reply-To: References: X-Spam-Status: No, score=-11.5 required=5.0 tests=BAYES_00, GIT_PATCH_0, KAM_DMARC_NONE, KAM_DMARC_STATUS, KAM_LAZY_DOMAIN_SECURITY, SPF_HELO_NONE, SPF_NONE, TXREP autolearn=ham autolearn_force=no version=3.4.4 X-Spam-Checker-Version: SpamAssassin 3.4.4 (2020-01-24) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-Patchwork-Original-From: liuhongt via Gcc-patches From: "Liu, Hongtao" Reply-To: liuhongt Errors-To: gcc-patches-bounces+patchwork=sourceware.org@gcc.gnu.org Sender: "Gcc-patches" > (I'm assuming the difference is due to some architectural > constraints as opposed to arbitrary limitations in the code There're 2 difference: 1. target support unaligned store or not. 2. target support move by piece or not(which will enable block move in gimple level). Updated patch. Adjust code in check_vect_slp_store_usage to make it an exact pattern match of the corresponding testcases. These new target/xfail selectors are added as a temporary solution, and should be removed after real issue is fixed for Wstringop-overflow. gcc/ChangeLog: * doc/sourcebuild.texi (vect_slp_v4qi_store_unalign, vect_slp_v2hi_store_unalign, vect_slp_v4hi_store_unalign, vect_slp_v4si_store_unalign): Document efficient target. (vect_slp_v4qi_store_unalign_1, vect_slp_v8qi_store_unalign_1, vect_slp_v16qi_store_unalign_1): Ditto. (vect_slp_v2hi_store_align,vect_slp_v2qi_store_align, vect_slp_v2si_store_align, vect_slp_v4qi_store_align): Ditto. (struct_4char_block_move, struct_8char_block_move, struct_16char_block_move): Ditto. gcc/testsuite/ChangeLog: PR testsuite/102944 * c-c++-common/Wstringop-overflow-2.c: Adjust target/xfail selector. * gcc.dg/Warray-bounds-48.c: Ditto. * gcc.dg/Warray-bounds-51.c: Ditto. * gcc.dg/Warray-parameter-3.c: Ditto. * gcc.dg/Wstringop-overflow-14.c: Ditto. * gcc.dg/Wstringop-overflow-21.c: Ditto. * gcc.dg/Wstringop-overflow-68.c: Ditto * gcc.dg/Wstringop-overflow-76.c: Ditto * gcc.dg/Wzero-length-array-bounds-2.c: Ditto. * lib/target-supports.exp (vect_slp_v4qi_store_unalign): New efficient target. (vect_slp_v4qi_store_unalign_1): Ditto. (struct_4char_block_move): Ditto. (struct_8char_block_move): Ditto. (stryct_16char_block_move): Ditto. (vect_slp_v2hi_store_align): Ditto. (vect_slp_v2qi_store): Rename to .. (vect_slp_v2qi_store_align): .. this. (vect_slp_v4qi_store): Rename to .. (vect_slp_v4qi_store_align): .. This. (vect_slp_v8qi_store): Rename to .. (vect_slp_v8qi_store_unalign_1): .. This. (vect_slp_v16qi_store): Rename to .. (vect_slp_v16qi_store_unalign_1): .. This. (vect_slp_v2hi_store): Rename to .. (vect_slp_v2hi_store_unalign): .. This. (vect_slp_v4hi_store): Rename to .. (vect_slp_v4hi_store_unalign): This. (vect_slp_v2si_store): Rename to .. (vect_slp_v2si_store_align): .. This. (vect_slp_v4si_store): Rename to .. (vect_slp_v4si_store_unalign): Ditto. (check_vect_slp_aligned_store_usage): Rename to .. (check_vect_slp_store_usage): .. this and adjust code to make it an exact pattern match of corresponding testcase. --- gcc/doc/sourcebuild.texi | 59 ++-- .../c-c++-common/Wstringop-overflow-2.c | 20 +- gcc/testsuite/gcc.dg/Warray-bounds-48.c | 4 +- gcc/testsuite/gcc.dg/Warray-bounds-51.c | 2 +- gcc/testsuite/gcc.dg/Warray-parameter-3.c | 2 +- gcc/testsuite/gcc.dg/Wstringop-overflow-14.c | 4 +- gcc/testsuite/gcc.dg/Wstringop-overflow-21.c | 8 +- gcc/testsuite/gcc.dg/Wstringop-overflow-68.c | 10 +- gcc/testsuite/gcc.dg/Wstringop-overflow-76.c | 16 +- .../gcc.dg/Wzero-length-array-bounds-2.c | 2 +- gcc/testsuite/lib/target-supports.exp | 313 +++++++++++++----- 11 files changed, 302 insertions(+), 138 deletions(-) diff --git a/gcc/doc/sourcebuild.texi b/gcc/doc/sourcebuild.texi index 6a165767630..de055d71654 100644 --- a/gcc/doc/sourcebuild.texi +++ b/gcc/doc/sourcebuild.texi @@ -1846,37 +1846,58 @@ Target supports loop vectorization with partial vectors and Target supports loop vectorization with partial vectors and @code{vect-partial-vector-usage} is nonzero. -@item vect_slp_v2qi_store +@item vect_slp_v2qi_store_align Target supports vectorization of 2-byte char stores with 2-byte aligned address at plain @option{-O2}. -@item vect_slp_v4qi_store +@item vect_slp_v4qi_store_align Target supports vectorization of 4-byte char stores with 4-byte aligned address at plain @option{-O2}. -@item vect_slp_v8qi_store -Target supports vectorization of 8-byte char stores with 8-byte aligned -address at plain @option{-O2}. +@item vect_slp_v4qi_store_unalign +Target supports vectorization of 4-byte char stores with unaligned address +at plain @option{-O2}. -@item vect_slp_v16qi_store -Target supports vectorization of 16-byte char stores with 16-byte aligned -address at plain @option{-O2}. +@item struct_4char_block_move +Target supports block move for 8-byte aligned 4-byte size struct initialization. + +@item vect_slp_v4qi_store_unalign_1 +Target supports vectorization of 4-byte char stores with unaligned address +or store them with constant pool at plain @option{-O2}. + +@item struct_8char_block_move +Target supports block move for 8-byte aligned 8-byte size struct initialization. + +@item vect_slp_v8qi_store_unalign_1 +Target supports vectorization of 8-byte char stores with unaligned address +or store them with constant pool at plain @option{-O2}. + +@item struct_16char_block_move +Target supports block move for 8-byte aligned 16-byte size struct initialization. -@item vect_slp_v2hi_store +@item vect_slp_v16qi_store_unalign_1 +Target supports vectorization of 16-byte char stores with unaligned address +or store them with constant pool at plain @option{-O2}. + +@item vect_slp_v2hi_store_align Target supports vectorization of 4-byte short stores with 4-byte aligned -address at plain @option{-O2}. +addressat plain @option{-O2}. -@item vect_slp_v4hi_store -Target supports vectorization of 8-byte short stores with 8-byte aligned -address at plain @option{-O2}. +@item vect_slp_v2hi_store_unalign +Target supports vectorization of 4-byte short stores with unaligned address +at plain @option{-O2}. -@item vect_slp_v2si_store -Target supports vectorization of 8-byte int stores with 8-byte aligned -address at plain @option{-O2}. +@item vect_slp_v4hi_store_unalign +Target supports vectorization of 8-byte short stores with unaligned address +at plain @option{-O2}. -@item vect_slp_v4si_store -Target supports vectorization of 16-byte int stores with 16-byte aligned -address at plain @option{-O2}. +@item vect_slp_v2si_store_align +Target supports vectorization of 8-byte int stores with 8-byte aligned address +at plain @option{-O2}. + +@item vect_slp_v4si_store_unalign +Target supports vectorization of 16-byte int stores with unaligned address +at plain @option{-O2}. @end table @subsubsection Thread Local Storage attributes diff --git a/gcc/testsuite/c-c++-common/Wstringop-overflow-2.c b/gcc/testsuite/c-c++-common/Wstringop-overflow-2.c index ca38bda73f5..e5802613a9c 100644 --- a/gcc/testsuite/c-c++-common/Wstringop-overflow-2.c +++ b/gcc/testsuite/c-c++-common/Wstringop-overflow-2.c @@ -190,7 +190,7 @@ void ga1__ (void) struct A1 a = { 1 }; a.a[0] = 0; a.a[1] = 1; // { dg-warning "\\\[-Wstringop-overflow" } - a.a[2] = 2; // { dg-warning "\\\[-Wstringop-overflow" "pr102462" { xfail { vect_slp_v2qi_store } } } + a.a[2] = 2; // { dg-warning "\\\[-Wstringop-overflow" "pr102462" { xfail { vect_slp_v2qi_store_align } } } sink (&a); } @@ -207,7 +207,7 @@ void ga1_0_ (void) struct A1 a = { 1, { } }; a.a[0] = 0; a.a[1] = 1; // { dg-warning "\\\[-Wstringop-overflow" } - a.a[2] = 2; // { dg-warning "\\\[-Wstringop-overflow" "pr102462" { xfail { vect_slp_v2qi_store } } } + a.a[2] = 2; // { dg-warning "\\\[-Wstringop-overflow" "pr102462" { xfail { vect_slp_v2qi_store_align } } } sink (&a); } @@ -221,10 +221,10 @@ void ga1_1 (void) a1_1.a[1] = 1; // { dg-warning "\\\[-Wstringop-overflow" } a1_1.a[2] = 2; // { dg-warning "\\\[-Wstringop-overflow" } - struct A1 a = { 0, { 1 } }; // { dg-warning "\\\[-Wstringop-overflow" "pr102706" { target { vect_slp_v4qi_store } } } + struct A1 a = { 0, { 1 } }; // { dg-warning "\\\[-Wstringop-overflow" "pr102706" { target { vect_slp_v4qi_store_align } } } a.a[0] = 0; - a.a[1] = 1; // { dg-warning "\\\[-Wstringop-overflow" "" { xfail { vect_slp_v4qi_store } } } - a.a[2] = 2; // { dg-warning "\\\[-Wstringop-overflow" "" { xfail { vect_slp_v4qi_store } } } + a.a[1] = 1; // { dg-warning "\\\[-Wstringop-overflow" "" { xfail { vect_slp_v4qi_store_align } } } + a.a[2] = 2; // { dg-warning "\\\[-Wstringop-overflow" "" { xfail { vect_slp_v4qi_store_align } } } sink (&a); } @@ -289,7 +289,7 @@ void ga1i__ (void) struct A1i a = { 0 }; a.a[0] = 0; a.a[1] = 1; // { dg-warning "\\\[-Wstringop-overflow" } - a.a[2] = 2; // { dg-warning "\\\[-Wstringop-overflow" "pr102462" { xfail { vect_slp_v2qi_store } } } + a.a[2] = 2; // { dg-warning "\\\[-Wstringop-overflow" "pr102462" { xfail { vect_slp_v2qi_store_align } } } sink (&a); } @@ -306,7 +306,7 @@ void ga1i_0_ (void) struct A1 a = { 0, { } }; a.a[0] = 0; a.a[1] = 1; // { dg-warning "\\\[-Wstringop-overflow" } - a.a[2] = 2; // { dg-warning "\\\[-Wstringop-overflow" "pr102462" { xfail { vect_slp_v2qi_store } } } + a.a[2] = 2; // { dg-warning "\\\[-Wstringop-overflow" "pr102462" { xfail { vect_slp_v2qi_store_align } } } sink (&a); } @@ -320,10 +320,10 @@ void ga1i_1 (void) a1i_1.a[1] = 1; // { dg-warning "\\\[-Wstringop-overflow" } a1i_1.a[2] = 2; // { dg-warning "\\\[-Wstringop-overflow" } - struct A1 a = { 0, { 1 } }; // { dg-warning "\\\[-Wstringop-overflow" "pr102462" { target { vect_slp_v4qi_store } } } + struct A1 a = { 0, { 1 } }; // { dg-warning "\\\[-Wstringop-overflow" "pr102462" { target { vect_slp_v4qi_store_align } } } a.a[0] = 1; - a.a[1] = 2; // { dg-warning "\\\[-Wstringop-overflow" "pr102462" { xfail { vect_slp_v4qi_store } } } - a.a[2] = 3; // { dg-warning "\\\[-Wstringop-overflow" "pr102462" { xfail { vect_slp_v4qi_store } } } + a.a[1] = 2; // { dg-warning "\\\[-Wstringop-overflow" "pr102462" { xfail { vect_slp_v4qi_store_align } } } + a.a[2] = 3; // { dg-warning "\\\[-Wstringop-overflow" "pr102462" { xfail { vect_slp_v4qi_store_align } } } sink (&a); } diff --git a/gcc/testsuite/gcc.dg/Warray-bounds-48.c b/gcc/testsuite/gcc.dg/Warray-bounds-48.c index 19b7634c063..29b20863846 100644 --- a/gcc/testsuite/gcc.dg/Warray-bounds-48.c +++ b/gcc/testsuite/gcc.dg/Warray-bounds-48.c @@ -30,7 +30,7 @@ static void nowarn_ax_extern (struct AX *p) static void warn_ax_local_buf (struct AX *p) { - p->ax[0] = 4; p->ax[1] = 5; // { dg-warning "\\\[-Wstringop-overflow" "pr102706" { target { vect_slp_v2hi_store && { ! vect_slp_v4hi_store } } } } + p->ax[0] = 4; p->ax[1] = 5; // { dg-warning "\\\[-Wstringop-overflow" "pr102706" { target { vect_slp_v2hi_store_align && { ! vect_slp_v4hi_store_unalign } } } } p->ax[2] = 6; // { dg-warning "\\\[-Warray-bounds" } p->ax[3] = 7; // { dg-warning "\\\[-Warray-bounds" } @@ -130,7 +130,7 @@ static void warn_a0_extern (struct A0 *p) static void warn_a0_local_buf (struct A0 *p) { - p->a0[0] = 4; p->a0[1] = 5; // { dg-warning "\\\[-Wstringop-overflow" "pr102706" { target { vect_slp_v2hi_store && { ! vect_slp_v4hi_store } } } } + p->a0[0] = 4; p->a0[1] = 5; // { dg-warning "\\\[-Wstringop-overflow" "pr102706" { target { vect_slp_v2hi_store_align && { ! vect_slp_v4hi_store_unalign } } } } p->a0[2] = 6; // { dg-warning "\\\[-Warray-bounds" } p->a0[3] = 7; // { dg-warning "\\\[-Warray-bounds" } diff --git a/gcc/testsuite/gcc.dg/Warray-bounds-51.c b/gcc/testsuite/gcc.dg/Warray-bounds-51.c index 8b589f38191..7519b0fed79 100644 --- a/gcc/testsuite/gcc.dg/Warray-bounds-51.c +++ b/gcc/testsuite/gcc.dg/Warray-bounds-51.c @@ -39,7 +39,7 @@ void test_struct_char_vla_location (void) } s; s.cvla[0] = __LINE__; - s.cvla[nelts - 1] = 0; // { dg-warning "\\\[-Wstringop-overflow" "pr102706" { target { vect_slp_v2qi_store } } } + s.cvla[nelts - 1] = 0; // { dg-warning "\\\[-Wstringop-overflow" "pr102706" { target { vect_slp_v2qi_store_align } } } s.cvla[nelts] = 0; // { dg-warning "\\\[-Warray-bounds" } sink (&s); diff --git a/gcc/testsuite/gcc.dg/Warray-parameter-3.c b/gcc/testsuite/gcc.dg/Warray-parameter-3.c index b6ed8daf51c..b888511ce1e 100644 --- a/gcc/testsuite/gcc.dg/Warray-parameter-3.c +++ b/gcc/testsuite/gcc.dg/Warray-parameter-3.c @@ -77,7 +77,7 @@ gia3 (int a[3]) __attribute__ ((noipa)) void gcas3 (char a[static 3]) { - a[0] = 0; a[1] = 1; a[2] = 2; // { dg-warning "\\\[-Wstringop-overflow" "pr102706" { target { vect_slp_v4qi_store } } } + a[0] = 0; a[1] = 1; a[2] = 2; // { dg-warning "\\\[-Wstringop-overflow" "pr102706" { target { vect_slp_v4qi_store_unalign } } } a[3] = 3; // { dg-warning "\\\[-Warray-bounds" } } diff --git a/gcc/testsuite/gcc.dg/Wstringop-overflow-14.c b/gcc/testsuite/gcc.dg/Wstringop-overflow-14.c index c4a3f05d883..3d1d9e54d4a 100644 --- a/gcc/testsuite/gcc.dg/Wstringop-overflow-14.c +++ b/gcc/testsuite/gcc.dg/Wstringop-overflow-14.c @@ -36,8 +36,8 @@ void test_memcpy_cond (int i) void test_int16 (void) { char *p = a4 + 1; - *(int16_t*)p = 0; // { dg-warning "writing 4 bytes into a region of size 3" "pr102706" { target { vect_slp_v2hi_store } } } - *(int16_t*)(p + 2) = 0; // { dg-warning "writing 2 bytes into a region of size 1" "pr102706" { xfail { vect_slp_v2hi_store } } } + *(int16_t*)p = 0; // { dg-warning "writing 4 bytes into a region of size 3" "pr102706" { target { vect_slp_v2hi_store_unalign } } } + *(int16_t*)(p + 2) = 0; // { dg-warning "writing 2 bytes into a region of size 1" "pr102706" { xfail { vect_slp_v2hi_store_unalign } } } } diff --git a/gcc/testsuite/gcc.dg/Wstringop-overflow-21.c b/gcc/testsuite/gcc.dg/Wstringop-overflow-21.c index 3fccfc9a798..4cd3c1b4f62 100644 --- a/gcc/testsuite/gcc.dg/Wstringop-overflow-21.c +++ b/gcc/testsuite/gcc.dg/Wstringop-overflow-21.c @@ -23,10 +23,10 @@ void test_store_zero_length (int i) { char a[3]; struct S0 *p = (struct S0*)a; - p->a = 0; // { dg-warning "\\\[-Wstringop-overflow" "pr102706" { target { vect_slp_v4qi_store } } } + p->a = 0; // { dg-warning "\\\[-Wstringop-overflow" "pr102706" { target { vect_slp_v4qi_store_align } } } p->b[0] = 0; p->b[1] = 1; // { dg-bogus "\\\[-Wstringop-overflow" } - p->b[2] = 2; // { dg-warning "\\\[-Wstringop-overflow" "pr102706" { xfail { vect_slp_v4qi_store } } } + p->b[2] = 2; // { dg-warning "\\\[-Wstringop-overflow" "pr102706" { xfail { vect_slp_v4qi_store_align } } } p->b[i] = 2; sink (p); } @@ -50,10 +50,10 @@ void test_store_flexarray (int i) { char a[3]; struct Sx *p = (struct Sx*)a; - p->a = 0; // { dg-warning "\\\[-Wstringop-overflow" "pr102706" { target { vect_slp_v4qi_store } } } + p->a = 0; // { dg-warning "\\\[-Wstringop-overflow" "pr102706" { target { vect_slp_v4qi_store_align } } } p->b[0] = 0; p->b[1] = 1; // { dg-bogus "\\\[-Wstringop-overflow" } - p->b[2] = 1; // { dg-warning "\\\[-Wstringop-overflow" "pr102706" { xfail { vect_slp_v4qi_store } } } + p->b[2] = 1; // { dg-warning "\\\[-Wstringop-overflow" "pr102706" { xfail { vect_slp_v4qi_store_align } } } p->b[i] = 2; sink (p); } diff --git a/gcc/testsuite/gcc.dg/Wstringop-overflow-68.c b/gcc/testsuite/gcc.dg/Wstringop-overflow-68.c index 04e91afb8bc..05ea56fca67 100644 --- a/gcc/testsuite/gcc.dg/Wstringop-overflow-68.c +++ b/gcc/testsuite/gcc.dg/Wstringop-overflow-68.c @@ -65,11 +65,11 @@ void warn_comp_lit (void) // MEM [(char *)&a7] = { 0, 1, 2, 3, 4, 5, 6, 7 }; // MEM [(char *)&a15] = { 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15 }; // and warning should be expected, refer to PR102722. - *(AC4*)a2 = Ac4; // { dg-warning "writing 4 bytes into a region of size 2" "pr101475" { xfail { ! { vect_slp_v4qi_store } } } } - *(AC4*)a3 = Ac4; // { dg-warning "writing 4 bytes into a region of size 3" "pr101475" { xfail { ! { vect_slp_v4qi_store } } } } - *(AC8*)a4 = Ac8; // { dg-warning "writing 8 bytes into a region of size 4" "pr101475" { xfail { ! { vect_slp_v8qi_store } } } } - *(AC8*)a7 = Ac8; // { dg-warning "writing 8 bytes into a region of size 7" "pr101475" { xfail { ! { vect_slp_v8qi_store } } } } - *(AC16*)a15 = Ac16; // { dg-warning "writing 16 bytes into a region of size 15" "pr101475" { xfail { ! { vect_slp_v16qi_store } } } } + *(AC4*)a2 = Ac4; // { dg-warning "writing 4 bytes into a region of size 2" "pr101475" { xfail { ! { vect_slp_v4qi_store_unalign_1 } } } } + *(AC4*)a3 = Ac4; // { dg-warning "writing 4 bytes into a region of size 3" "pr101475" { xfail { ! { vect_slp_v4qi_store_unalign_1 } } } } + *(AC8*)a4 = Ac8; // { dg-warning "writing 8 bytes into a region of size 4" "pr101475" { xfail { ! { vect_slp_v8qi_store_unalign_1 } } } } + *(AC8*)a7 = Ac8; // { dg-warning "writing 8 bytes into a region of size 7" "pr101475" { xfail { ! { vect_slp_v8qi_store_unalign_1 } } } } + *(AC16*)a15 = Ac16; // { dg-warning "writing 16 bytes into a region of size 15" "pr101475" { xfail { ! { vect_slp_v16qi_store_unalign_1 } } } } } void warn_aggr_decl (void) diff --git a/gcc/testsuite/gcc.dg/Wstringop-overflow-76.c b/gcc/testsuite/gcc.dg/Wstringop-overflow-76.c index 52467267a04..ee315a0c002 100644 --- a/gcc/testsuite/gcc.dg/Wstringop-overflow-76.c +++ b/gcc/testsuite/gcc.dg/Wstringop-overflow-76.c @@ -27,10 +27,10 @@ void max_a3_a5 (int i) by its own warning independently of -Wstringop-overflow. */ char *d = MAX (p, q); - d[2] = 0; // { dg-warning "writing 4 bytes into a region of size 3" "pr102706" { target { vect_slp_v4qi_store } } } + d[2] = 0; // { dg-warning "writing 4 bytes into a region of size 3" "pr102706" { target { vect_slp_v4qi_store_unalign } } } d[3] = 0; d[4] = 0; - d[5] = 0; // { dg-warning "writing 1 byte into a region of size 0" "pr102706" { xfail { vect_slp_v4qi_store } } } + d[5] = 0; // { dg-warning "writing 1 byte into a region of size 0" "pr102706" { xfail { vect_slp_v4qi_store_unalign } } } } @@ -44,10 +44,10 @@ void max_b6_b4 (int i) char *q = b4 + i; char *d = MAX (p, q); - d[3] = 0; // { dg-warning "writing 4 bytes into a region of size 3" "pr102706" { target { vect_slp_v4qi_store } } } + d[3] = 0; // { dg-warning "writing 4 bytes into a region of size 3" "pr102706" { target { vect_slp_v4qi_store_unalign } } } d[4] = 0; d[5] = 0; - d[6] = 0; // { dg-warning "writing 1 byte into a region of size 0" "pr102706" { xfail { vect_slp_v4qi_store } } } + d[6] = 0; // { dg-warning "writing 1 byte into a region of size 0" "pr102706" { xfail { vect_slp_v4qi_store_unalign } } } } @@ -83,7 +83,7 @@ struct A3_5 { char a3[3]; // { dg-message "at offset 3 into destination object 'a3' of size 3" "pr??????" { xfail *-*-* } } // refer to pr102697 for xfail - char a5[5]; // { dg-message "at offset 5 into destination object 'a5' of size 5" "note" { xfail { vect_slp_v4qi_store } } } + char a5[5]; // { dg-message "at offset 5 into destination object 'a5' of size 5" "note" { xfail { vect_slp_v4qi_store_unalign } } } }; void max_A3_A5 (int i, struct A3_5 *pa3_5) @@ -96,7 +96,7 @@ void max_A3_A5 (int i, struct A3_5 *pa3_5) d[2] = 0; d[3] = 0; // { dg-warning "writing 1 byte into a region of size 0" "pr??????" { xfail *-*-* } } d[4] = 0; - d[5] = 0; // { dg-warning "writing 1 byte into a region of size 0" "pr102697" { xfail { vect_slp_v4qi_store } } } + d[5] = 0; // { dg-warning "writing 1 byte into a region of size 0" "pr102697" { xfail { vect_slp_v4qi_store_unalign } } } } @@ -104,7 +104,7 @@ struct B4_B6 { char b4[4]; // refer to pr102697 for xfail - char b6[6]; // { dg-message "at offset \[^a-zA-Z\n\r\]*6\[^a-zA-Z0-9\]* into destination object 'b6' of size 6" "note" { xfail { vect_slp_v4qi_store } } } + char b6[6]; // { dg-message "at offset \[^a-zA-Z\n\r\]*6\[^a-zA-Z0-9\]* into destination object 'b6' of size 6" "note" { xfail { vect_slp_v4qi_store_unalign } } } }; void max_B6_B4 (int i, struct B4_B6 *pb4_b6) @@ -116,7 +116,7 @@ void max_B6_B4 (int i, struct B4_B6 *pb4_b6) d[3] = 0; d[4] = 0; d[5] = 0; - d[6] = 0; // { dg-warning "writing 1 byte into a region of size 0" "pr102697" { xfail { vect_slp_v4qi_store } } } + d[6] = 0; // { dg-warning "writing 1 byte into a region of size 0" "pr102697" { xfail { vect_slp_v4qi_store_unalign } } } } diff --git a/gcc/testsuite/gcc.dg/Wzero-length-array-bounds-2.c b/gcc/testsuite/gcc.dg/Wzero-length-array-bounds-2.c index b2321495afc..2ef5ccd564a 100644 --- a/gcc/testsuite/gcc.dg/Wzero-length-array-bounds-2.c +++ b/gcc/testsuite/gcc.dg/Wzero-length-array-bounds-2.c @@ -87,7 +87,7 @@ void test_C_global_buf (void) p->b1.a[ 1].i = 0; // { dg-warning "\\\[-Wzero-length-bounds" } sink (p); - p->b2.a[ 0].i = 0; // { dg-warning "\\\[-Wstringop-overflow" "pr102706" { target { vect_slp_v2si_store && { ! vect_slp_v4si_store } } } } + p->b2.a[ 0].i = 0; // { dg-warning "\\\[-Wstringop-overflow" "pr102706" { target { vect_slp_v2si_store_align && { ! vect_slp_v4si_store_unalign } } } } p->b2.a[ 1].i = 0; p->b2.a[ 2].i = 0; // { dg-warning "\\\[-Warray-bounds" } p->b2.a[ 3].i = 0; // { dg-warning "\\\[-Warray-bounds" } diff --git a/gcc/testsuite/lib/target-supports.exp b/gcc/testsuite/lib/target-supports.exp index 1c8b1ebb86e..e07d563f6f4 100644 --- a/gcc/testsuite/lib/target-supports.exp +++ b/gcc/testsuite/lib/target-supports.exp @@ -7584,95 +7584,149 @@ proc check_effective_target_vect_element_align_preferred { } { # Return zero if the desirable pattern isn't found. # It's used by Warray-bounds/Wstringop-overflow testcases which are # regressed by O2 vectorization, refer to PR102697/PR102462/PR102706 -proc check_vect_slp_aligned_store_usage { pattern macro } { +proc check_vect_slp_store_usage { pattern macro } { global tool set result [check_compile slp_aligned_store_usage assembly { - char a[16] __attribute__ ((aligned (16))); - short b[4] __attribute__((aligned(8))); - int c[4] __attribute__((aligned(16))); - #ifdef TEST_V8QI + extern void sink (void* ); + #define Ac8 (AC8){ 0, 1, 2, 3, 4, 5, 6, 7 } + #define Ac16 (AC16){ 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15 } + #ifdef TEST_V16QI + typedef struct AC16 { char a[16]; } AC16; + extern char a16[16]; void - foo () + foo1 () { - a[0] = 0; - a[1] = 1; - a[2] = 2; - a[3] = 3; - a[4] = 4; - a[5] = 5; - a[6] = 6; - a[7] = 7; - } - #elif TEST_V16QI + *(AC16*)a16 = Ac16; + } + #elif TEST_V8QI + typedef struct AC8 { char a[8]; } AC8; + extern char a8[8]; void - foo1 () + foo () { - a[0] = 0; - a[1] = 1; - a[2] = 2; - a[3] = 3; - a[4] = 4; - a[5] = 5; - a[6] = 6; - a[7] = 7; - a[8] = 8; - a[9] = 9; - a[10] = 10; - a[11] = 11; - a[12] = 12; - a[13] = 13; - a[14] = 14; - a[15] = 15; + *(AC8*)a8 = Ac8; } #elif TEST_V4QI + struct A1 + { + char n; + char a[3]; + }; + + extern void sink (void*); void foo2 () { - a[0] = 0; - a[1] = 1; - a[2] = 2; - a[3] = 3; + struct A1 a = { 0, { } }; + a.a[0] = 3; + a.a[1] = 4; + a.a[2] = 5; + sink (&a); + } + #elif TEST_V4QI_2 + extern char p[4]; + void + foo2_2 () + { + p[0] = 0; + p[1] = 1; + p[2] = 2; + p[3] = 3; + } + #elif TEST_V4QI_3 + #define Ac4 (AC4){ 0, 1, 2, 3 } + typedef struct AC4 { char a[4]; } AC4; + extern char a[4]; + void + foo () + { + *(AC4*)a = Ac4; } #elif TEST_V2QI + struct A2 + { + char a[2]; + }; void foo3 () { - a[0] = 0; - a[1] = 1; + struct A2 a; + a.a[0] = 3; + a.a[1] = 4; + sink (&a); + } + #elif TEST_V4HI + struct Ax + { + int n; + short a[4]; + }; + void + foo5 (struct Ax *p) + { + p->a[0] = 0; + p->a[1] = 1; + p->a[2] = 2; + p->a[3] = 3; } #elif TEST_V2HI + extern char b[4]; void foo4 () { - b[0] = 0; - b[1] = 1; + *(short*) b = 0; + *(short*) (b + 2) = 1; } - #elif TEST_V4HI + #elif TEST_V2HI_2 + struct Ax + { + int n; + short a[2]; + }; void - foo5 () + foo4_2 (struct Ax *p) { - b[0] = 0; - b[1] = 1; - b[2] = 2; - b[3] = 3; + p->a[0] = 0; + p->a[1] = 1; } - #elif TEST_V2SI + #elif TEST_V4SI + struct A { int i; }; + struct B { int j; struct A a[4]; }; + + struct C + { + struct B b1; + struct B b2; + }; + char cbuf2[2 * sizeof (struct C)] = { }; void foo6 () { - c[0] = 0; - c[1] = 1; + struct C *p = (struct C*)&cbuf2; + p->b2.a[0].i = 0; + p->b2.a[1].i = 0; + p->b2.a[2].i = 0; + p->b2.a[3].i = 0; } - #elif TEST_V4SI + #elif TEST_V2SI + struct A { int i; }; + struct B { int j; struct A a[2]; }; + + struct C + { + struct B b1; + struct B b2; + }; + char cbuf2[2 * sizeof (struct C)] = { }; void - foo7 () + foo6 () { - c[0] = 0; - c[1] = 1; - c[2] = 2; - c[3] = 3; + struct C *p = (struct C*)&cbuf2; + p->b2.a[0].i = 0; + p->b2.a[1].i = 0; } + #endif } "-O2 -fopt-info-all -D$macro" ] @@ -7691,75 +7745,164 @@ proc check_vect_slp_aligned_store_usage { pattern macro } { # Return the true if target support vectorization of 2-byte char stores # with 2-byte aligned address at plain O2. -proc check_effective_target_vect_slp_v2qi_store { } { +# NB: This target should be removed after real issues are fixed for +# -Wstringop-overflow with O2 vect. Be careful if you want to reuse +# this target since tests in check_vect_slp_store_usage +# is the exact match of relative testcases +proc check_effective_target_vect_slp_v2qi_store_align { } { set pattern {add new stmt: MEM } set macro "TEST_V2QI" - return [check_cached_effective_target vect_slp_v2qi_store { - expr [check_vect_slp_aligned_store_usage $pattern $macro] }] + return [check_cached_effective_target vect_slp_v2qi_store_align { + expr [check_vect_slp_store_usage $pattern $macro] }] } # Return the true if target support vectorization of 4-byte char stores # with 4-byte aligned address at plain O2. -proc check_effective_target_vect_slp_v4qi_store { } { +# NB: This target should be removed after real issues are fixed for +# -Wstringop-overflow with O2 vect. Be careful if you want to reuse +# this target since tests in check_vect_slp_store_usage +# is the exact match of relative testcases +proc check_effective_target_vect_slp_v4qi_store_align { } { set pattern {add new stmt: MEM } set macro "TEST_V4QI" - return [check_cached_effective_target vect_slp_v4qi_store { - expr [check_vect_slp_aligned_store_usage $pattern $macro ] }] + return [check_cached_effective_target vect_slp_v4qi_store_align { + expr [check_vect_slp_store_usage $pattern $macro ] }] +} + +# Return the true if target support vectorization of 4-byte char stores +# with unaligned address at plain O2. +proc check_effective_target_vect_slp_v4qi_store_unalign { } { + set pattern {add new stmt: MEM } + set macro "TEST_V4QI_2" + return [check_cached_effective_target vect_slp_v4qi_store_unalign { + expr [check_vect_slp_store_usage $pattern $macro ] }] +} + +# Return the true if target support block move for +# 8-byte aligned 4-byte size struct initialization. +proc check_effective_target_struct_4char_block_move { } { + set pattern {not vectorized: more than one data ref in stmt:} + set macro "TEST_V4QI_3" + return [check_cached_effective_target struct_4char_block_move { + expr [check_vect_slp_store_usage $pattern $macro ] }] +} + +# Return the true if target support vectorization of 4-byte char stores +# with unaligned address or store them with a constant pool at plain O2. +proc check_effective_target_vect_slp_v4qi_store_unalign_1 { } { + set pattern {add new stmt: MEM } + set macro "TEST_V4QI_3" + return [check_cached_effective_target vect_slp_v4qi_store_unalign_1 { + expr { [check_vect_slp_store_usage $pattern $macro ] + || [check_effective_target_struct_4char_block_move] } }] +} + +# Return the true if target support block move for +# 8-byte aligned 8-byte size struct initialization. +proc check_effective_target_struct_8char_block_move { } { + set pattern {not vectorized: more than one data ref in stmt:} + set macro "TEST_V8QI" + return [check_cached_effective_target struct_8char_block_move { + expr [check_vect_slp_store_usage $pattern $macro ] }] } # Return the true if target support vectorization of 8-byte char stores -# with 8-byte aligned address at plain O2. -proc check_effective_target_vect_slp_v8qi_store { } { +# with unaligned address or store them with a constant pool at plain O2. +# NB: This target should be removed after real issues are fixed for +# -Wstringop-overflow with O2 vect. Be careful if you want to reuse +# this target since tests in check_vect_slp_store_usage +# is the exact match of relative testcases +proc check_effective_target_vect_slp_v8qi_store_unalign_1 { } { set pattern {add new stmt: MEM } set macro "TEST_V8QI" - return [check_cached_effective_target vect_slp_v8qi_store { - expr [check_vect_slp_aligned_store_usage $pattern $macro ] }] + return [check_cached_effective_target vect_slp_v8qi_store_unalign_1 { + expr { [check_vect_slp_store_usage $pattern $macro ] + || [check_effective_target_struct_8char_block_move] } }] +} + +# Return the true if target support block move for +# 8-byte aligned 16-byte size struct initialization. +proc check_effective_target_struct_16char_block_move { } { + set pattern {not vectorized: more than one data ref in stmt:} + set macro "TEST_V16QI" + return [check_cached_effective_target struct_16char_block_move { + expr [check_vect_slp_store_usage $pattern $macro ] }] } # Return the true if target support vectorization of 16-byte char stores -# with 16-byte aligned address at plain O2. -proc check_effective_target_vect_slp_v16qi_store { } { +# with unaligned address or store them with a constant pool at plain O2. +# NB: This target should be removed after real issues are fixed for +# -Wstringop-overflow with O2 vect. Be careful if you want to reuse +# this target since tests in check_vect_slp_store_usage +# is the exact match of relative testcases +proc check_effective_target_vect_slp_v16qi_store_unalign_1 { } { set pattern {add new stmt: MEM } set macro "TEST_V16QI" - return [check_cached_effective_target vect_slp_v16qi_store { - expr [check_vect_slp_aligned_store_usage $pattern $macro ] }] + return [check_cached_effective_target vect_slp_v16qi_store_unalign_1 { + expr { [check_vect_slp_store_usage $pattern $macro ] + || [check_effective_target_struct_16char_block_move] } }] } # Return the true if target support vectorization of 4-byte short stores -# with 4-byte aligned address at plain O2. -proc check_effective_target_vect_slp_v2hi_store { } { +# with unaligned address at plain O2. +# NB: This target should be removed after real issues are fixed for +# -Wstringop-overflow with O2 vect. Be careful if you want to reuse +# this target since tests in check_vect_slp_store_usage +# is the exact match of relative testcases +proc check_effective_target_vect_slp_v2hi_store_unalign { } { set pattern {add new stmt: MEM } set macro "TEST_V2HI" - return [check_cached_effective_target vect_slp_v2hi_store { - expr [check_vect_slp_aligned_store_usage $pattern $macro ] }] + return [check_cached_effective_target vect_slp_v2hi_store_unalign { + expr [check_vect_slp_store_usage $pattern $macro ] }] +} + +# Return the true if target support vectorization of 4-byte short stores +# with 4-byte aligned address at plain O2. +proc check_effective_target_vect_slp_v2hi_store_align { } { + set pattern {add new stmt: MEM } + set macro "TEST_V2HI_2" + return [check_cached_effective_target vect_slp_v2hi_store_align { + expr [check_vect_slp_store_usage $pattern $macro ] }] } # Return the true if target support vectorization of 8-byte short stores -# with 8-byte aligned address at plain O2. -proc check_effective_target_vect_slp_v4hi_store { } { +# with unaligned address at plain O2. +# NB: This target should be removed after real issues are fixed for +# -Wstringop-overflow with O2 vect. Be careful if you want to reuse +# this target since tests in check_vect_slp_store_usage +# is the exact match of relative testcases +proc check_effective_target_vect_slp_v4hi_store_unalign { } { set pattern {add new stmt: MEM } set macro "TEST_V4HI" - return [check_cached_effective_target vect_slp_v4hi_store { - expr [check_vect_slp_aligned_store_usage $pattern $macro ] }] + return [check_cached_effective_target vect_slp_v4hi_store_unalign { + expr [check_vect_slp_store_usage $pattern $macro ] }] } # Return the true if target support vectorization of 8-byte int stores # with 8-byte aligned address at plain O2. -proc check_effective_target_vect_slp_v2si_store { } { +# NB: This target should be removed after real issues are fixed for +# -Wstringop-overflow with O2 vect. Be careful if you want to reuse +# this target since tests in check_vect_slp_store_usage +# is the exact match of relative testcases +proc check_effective_target_vect_slp_v2si_store_align { } { set pattern {add new stmt: MEM } set macro "TEST_V2SI" - return [check_cached_effective_target vect_slp_v2si_store { - expr [check_vect_slp_aligned_store_usage $pattern $macro ] }] + return [check_cached_effective_target vect_slp_v2si_store_align { + expr [check_vect_slp_store_usage $pattern $macro ] }] } # Return the true if target support vectorization of 16-byte int stores -# with 16-byte aligned address at plain O2. -proc check_effective_target_vect_slp_v4si_store { } { +# with unaligned address at plain O2. +# NB: This target should be removed after real issues are fixed for +# -Wstringop-overflow with O2 vect. Be careful if you want to reuse +# this target since tests in check_vect_slp_store_usage +# is the exact match of relative testcases +proc check_effective_target_vect_slp_v4si_store_unalign { } { set pattern {add new stmt: MEM } set macro "TEST_V4SI" - return [check_cached_effective_target vect_slp_v4si_store { - expr [check_vect_slp_aligned_store_usage $pattern $macro ] }] + return [check_cached_effective_target vect_slp_v4si_store_unalign { + expr [check_vect_slp_store_usage $pattern $macro ] }] } # Return 1 if we can align stack data to the preferred vector alignment.