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Sun, 31 Oct 2021 17:34:48 +0800 (CST) From: siyu@isrc.iscas.ac.cn To: gcc-patches@gcc.gnu.org Subject: [PATCH 08/21] [crypto]: add testcases for Zknh Date: Sun, 31 Oct 2021 17:34:32 +0800 Message-Id: <20211031093445.1414518-9-siyu@isrc.iscas.ac.cn> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20211031093445.1414518-1-siyu@isrc.iscas.ac.cn> References: <20211031093445.1414518-1-siyu@isrc.iscas.ac.cn> MIME-Version: 1.0 X-CM-TRANSID: qwCowAB3QCM1Y35h2GgQBg--.15675S10 X-Coremail-Antispam: 1UD129KBjvJXoWxCr4kCrW7ZFW7uFyDZFyxZrb_yoWrJFyDpw 4kG39YqFWxJF97AFn3tF13W3yYvr4UG34S93sxu34jyr4xt397t3yDtw4xJrsxJF1jyFya grs8CF4Ykw1SqaDanT9S1TB71UUUUUUqnTZGkaVYY2UrUUUUjbIjqfuFe4nvWSU5nxnvy2 9KBjDU0xBIdaVrnRJUUUQ014x267AKxVWrJVCq3wAFc2x0x2IEx4CE42xK8VAvwI8IcIk0 rVWrJVCq3wAFIxvE14AKwVWUJVWUGwA2048vs2IY020E87I2jVAFwI0_JF0E3s1l82xGYI kIc2x26xkF7I0E14v26ryj6s0DM28lY4IEw2IIxxk0rwA2F7IY1VAKz4vEj48ve4kI8wA2 z4x0Y4vE2Ix0cI8IcVAFwI0_JFI_Gr1l84ACjcxK6xIIjxv20xvEc7CjxVAFwI0_Gr1j6F 4UJwA2z4x0Y4vEx4A2jsIE14v26r4j6F4UM28EF7xvwVC2z280aVCY1x0267AKxVW8Jr0_ Cr1UM2AIxVAIcxkEcVAq07x20xvEncxIr21l5I8CrVACY4xI64kE6c02F40Ex7xfMcIj6x IIjxv20xvE14v26r106r15McIj6I8E87Iv67AKxVWUJVW8JwAm72CE4IkC6x0Yz7v_Jr0_ Gr1lF7xvr2IYc2Ij64vIr41lF7I21c0EjII2zVCS5cI20VAGYxC7M4IIrI8v6xkF7I0E8c xan2IY04v7M4kE6xkIj40Ew7xC0wCY02Avz4vE14v_GFWl42xK82IYc2Ij64vIr41l4I8I 3I0E4IkC6x0Yz7v_Jr0_Gr1lx2IqxVAqx4xG67AKxVWUJVWUGwC20s026x8GjcxK67AKxV WUGVWUWwC2zVAF1VAY17CE14v26r1q6r43MIIYrxkI7VAKI48JMIIF0xvE2Ix0cI8IcVAF wI0_JFI_Gr1lIxAIcVC0I7IYx2IY6xkF7I0E14v26r4UJVWxJr1lIxAIcVCF04k26cxKx2 IYs7xG6r1j6r1xMIIF0xvEx4A2jsIE14v26r4j6F4UMIIF0xvEx4A2jsIEc7CjxVAFwI0_ Gr1j6F4UJbIYCTnIWIevJa73UjIFyTuYvjfU5JPEDUUUU X-Originating-IP: [221.216.140.210] X-CM-SenderInfo: pvl13qplvuuh5lvft2wodfhubq/1tbiBgYLCl0TftTY3AAAsh X-Spam-Status: No, score=-8.1 required=5.0 tests=BAYES_00, FORGED_SPF_HELO, GIT_PATCH_0, KAM_DMARC_STATUS, KAM_LAZY_DOMAIN_SECURITY, KAM_SHORT, RCVD_IN_BARRACUDACENTRAL, SPF_HELO_PASS, SPF_NONE, TXREP autolearn=ham autolearn_force=no version=3.4.4 X-Spam-Checker-Version: SpamAssassin 3.4.4 (2020-01-24) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: ben.marshall@pqshield.com, cmuellner@ventanamicro.com, andrew@sifive.com, Richard.Newell@microchip.com, jiawei@iscas.ac.cn, mjos@pqshield.com, kito.cheng@sifive.com, Shihua Liao Errors-To: gcc-patches-bounces+patchwork=sourceware.org@gcc.gnu.org Sender: "Gcc-patches" From: SiYu Wu Co-authored-by: Shihua Liao --- gcc/testsuite/gcc.target/riscv/Zknh-sha256.c | 27 +++++++++++++ .../gcc.target/riscv/Zknh-sha512-01.c | 40 +++++++++++++++++++ .../gcc.target/riscv/Zknh-sha512-02.c | 28 +++++++++++++ 3 files changed, 95 insertions(+) create mode 100644 gcc/testsuite/gcc.target/riscv/Zknh-sha256.c create mode 100644 gcc/testsuite/gcc.target/riscv/Zknh-sha512-01.c create mode 100644 gcc/testsuite/gcc.target/riscv/Zknh-sha512-02.c diff --git a/gcc/testsuite/gcc.target/riscv/Zknh-sha256.c b/gcc/testsuite/gcc.target/riscv/Zknh-sha256.c new file mode 100644 index 00000000000..1c1cb7be5d0 --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/Zknh-sha256.c @@ -0,0 +1,27 @@ +/* { dg-do compile { target { riscv64*-*-* } } } */ +/* { dg-options "-march=rv64gc_zknh -mabi=lp64 -O2" } */ + +long foo1(long rs1) +{ + return __builtin_riscv_sha256sig0(rs1); +} + +long foo2(long rs1) +{ + return __builtin_riscv_sha256sig1(rs1); +} + +long foo3(long rs1) +{ + return __builtin_riscv_sha256sum0(rs1); +} + +long foo4(long rs1) +{ + return __builtin_riscv_sha256sum1(rs1); +} + +/* { dg-final { scan-assembler-times "sha256sig0" 1 } } */ +/* { dg-final { scan-assembler-times "sha256sig1" 1 } } */ +/* { dg-final { scan-assembler-times "sha256sum0" 1 } } */ +/* { dg-final { scan-assembler-times "sha256sum1" 1 } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/riscv/Zknh-sha512-01.c b/gcc/testsuite/gcc.target/riscv/Zknh-sha512-01.c new file mode 100644 index 00000000000..ef1f6dafe60 --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/Zknh-sha512-01.c @@ -0,0 +1,40 @@ +/* { dg-do compile } */ +/* { dg-options "-march=rv32gc_zknh -mabi=ilp32 -O2" } */ + +int foo1(int rs1, int rs2) +{ + return __builtin_riscv_sha512sig0h(rs1, rs2); +} + +int foo2(int rs1, int rs2) +{ + return __builtin_riscv_sha512sig0l(rs1, rs2); +} + +int foo3(int rs1, int rs2) +{ + return __builtin_riscv_sha512sig1h(rs1, rs2); +} + +int foo4(int rs1, int rs2) +{ + return __builtin_riscv_sha512sig1l(rs1, rs2); +} + +int foo5(int rs1, int rs2) +{ + return __builtin_riscv_sha512sum0r(rs1, rs2); +} + +int foo6(int rs1, int rs2) +{ + return __builtin_riscv_sha512sum1r(rs1, rs2); +} + +/* { dg-final { scan-assembler-times "sha512sig0h" 1 } } */ +/* { dg-final { scan-assembler-times "sha512sig0l" 1 } } */ +/* { dg-final { scan-assembler-times "sha512sig1h" 1 } } */ +/* { dg-final { scan-assembler-times "sha512sig1l" 1 } } */ +/* { dg-final { scan-assembler-times "sha512sum0r" 1 } } */ +/* { dg-final { scan-assembler-times "sha512sum1r" 1 } } */ + diff --git a/gcc/testsuite/gcc.target/riscv/Zknh-sha512-02.c b/gcc/testsuite/gcc.target/riscv/Zknh-sha512-02.c new file mode 100644 index 00000000000..f25cbcfb75b --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/Zknh-sha512-02.c @@ -0,0 +1,28 @@ +/* { dg-do compile } */ +/* { dg-options "-march=rv64i_zknh -mabi=lp64 -O2" } */ + +long foo1(long rs1) +{ + return __builtin_riscv_sha512sig0(rs1); +} + +long foo2(long rs1) +{ + return __builtin_riscv_sha512sig1(rs1); +} + + +long foo3(long rs1) +{ + return __builtin_riscv_sha512sum0(rs1); +} + +long foo4(long rs1) +{ + return __builtin_riscv_sha512sum1(rs1); +} + +/* { dg-final { scan-assembler-times "sha512sig0" 1 } } */ +/* { dg-final { scan-assembler-times "sha512sig1" 1 } } */ +/* { dg-final { scan-assembler-times "sha512sum0" 1 } } */ +/* { dg-final { scan-assembler-times "sha512sum1" 1 } } */ \ No newline at end of file