From patchwork Sun Oct 31 09:34:28 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: siyu@isrc.iscas.ac.cn X-Patchwork-Id: 46847 Return-Path: X-Original-To: patchwork@sourceware.org Delivered-To: patchwork@sourceware.org Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id 660E53858027 for ; Sun, 31 Oct 2021 09:36:37 +0000 (GMT) X-Original-To: gcc-patches@gcc.gnu.org Delivered-To: gcc-patches@gcc.gnu.org Received: from cstnet.cn (smtp21.cstnet.cn [159.226.251.21]) by sourceware.org (Postfix) with ESMTP id 38F203858436 for ; Sun, 31 Oct 2021 09:34:50 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.1 sourceware.org 38F203858436 Authentication-Results: sourceware.org; dmarc=none (p=none dis=none) header.from=isrc.iscas.ac.cn Authentication-Results: sourceware.org; spf=none smtp.mailfrom=isrc.iscas.ac.cn Received: from localhost.localdomain (unknown [221.216.140.210]) by APP-01 (Coremail) with SMTP id qwCowAB3QCM1Y35h2GgQBg--.15675S6; Sun, 31 Oct 2021 17:34:47 +0800 (CST) From: siyu@isrc.iscas.ac.cn To: gcc-patches@gcc.gnu.org Subject: [PATCH 04/21] [crypto]: add builtins for Zknd and Zkne Date: Sun, 31 Oct 2021 17:34:28 +0800 Message-Id: <20211031093445.1414518-5-siyu@isrc.iscas.ac.cn> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20211031093445.1414518-1-siyu@isrc.iscas.ac.cn> References: <20211031093445.1414518-1-siyu@isrc.iscas.ac.cn> MIME-Version: 1.0 X-CM-TRANSID: qwCowAB3QCM1Y35h2GgQBg--.15675S6 X-Coremail-Antispam: 1UD129KBjvJXoWxGFWDAw48tw1UGFyUCr17Wrg_yoW7Jw43pF WFkws5GrykAwnxCF4SqF1rXr1fJ34fKw43JwsxuF4UAayjqrW0yFnF9a1rt34DZF1UGw1j kayrKFWjgr4YyrJanT9S1TB71UUUUUUqnTZGkaVYY2UrUUUUjbIjqfuFe4nvWSU5nxnvy2 9KBjDU0xBIdaVrnRJUUUmE14x267AKxVWrJVCq3wAFc2x0x2IEx4CE42xK8VAvwI8IcIk0 rVWrJVCq3wAFIxvE14AKwVWUJVWUGwA2048vs2IY020E87I2jVAFwI0_JF0E3s1l82xGYI kIc2x26xkF7I0E14v26ryj6s0DM28lY4IEw2IIxxk0rwA2F7IY1VAKz4vEj48ve4kI8wA2 z4x0Y4vE2Ix0cI8IcVAFwI0_JFI_Gr1l84ACjcxK6xIIjxv20xvEc7CjxVAFwI0_Cr0_Gr 1UM28EF7xvwVC2z280aVAFwI0_Gr0_Cr1l84ACjcxK6I8E87Iv6xkF7I0E14v26r4UJVWx Jr1le2I262IYc4CY6c8Ij28IcVAaY2xG8wAqx4xG64xvF2IEw4CE5I8CrVC2j2WlYx0E2I x0cI8IcVAFwI0_JrI_JrylYx0Ex4A2jsIE14v26r1j6r4UMcvjeVCFs4IE7xkEbVWUJVW8 JwACjcxG0xvY0x0EwIxGrwACjI8F5VA0II8E6IAqYI8I648v4I1lFIxGxcIEc7CjxVA2Y2 ka0xkIwI1lw4CEc2x0rVAKj4xxMxkIecxEwVAFwVW8uwCF04k20xvY0x0EwIxGrwCFx2Iq xVCFs4IE7xkEbVWUJVW8JwC20s026c02F40E14v26r1j6r18MI8I3I0E7480Y4vE14v26r 106r1rMI8E67AF67kF1VAFwI0_Jw0_GFylIxkGc2Ij64vIr41lIxAIcVC0I7IYx2IY67AK xVWUCVW8JwCI42IY6xIIjxv20xvEc7CjxVAFwI0_Cr0_Gr1UMIIF0xvE42xK8VAvwI8IcI k0rVWUJVWUCwCI42IY6I8E87Iv67AKxVW8JVWxJwCI42IY6I8E87Iv6xkF7I0E14v26r4U JVWxJrUvcSsGvfC2KfnxnUUI43ZEXa7VUbrOz3UUUUU== X-Originating-IP: [221.216.140.210] X-CM-SenderInfo: pvl13qplvuuh5lvft2wodfhubq/1tbiCwcLClz4kjGDuwAAsy X-Spam-Status: No, score=-8.3 required=5.0 tests=BAYES_00, FORGED_SPF_HELO, GIT_PATCH_0, KAM_DMARC_STATUS, KAM_LAZY_DOMAIN_SECURITY, KAM_SHORT, RCVD_IN_BARRACUDACENTRAL, SPF_HELO_PASS, SPF_NONE, TXREP autolearn=ham autolearn_force=no version=3.4.4 X-Spam-Checker-Version: SpamAssassin 3.4.4 (2020-01-24) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: ben.marshall@pqshield.com, cmuellner@ventanamicro.com, andrew@sifive.com, Richard.Newell@microchip.com, jiawei@iscas.ac.cn, mjos@pqshield.com, kito.cheng@sifive.com Errors-To: gcc-patches-bounces+patchwork=sourceware.org@gcc.gnu.org Sender: "Gcc-patches" From: SiYu Wu --- gcc/config/riscv/riscv-builtins-crypto.def | 34 ++++++++++++++++++++++ gcc/config/riscv/riscv-builtins.c | 15 ++++++++++ gcc/config/riscv/riscv-ftypes.def | 3 ++ 3 files changed, 52 insertions(+) create mode 100644 gcc/config/riscv/riscv-builtins-crypto.def diff --git a/gcc/config/riscv/riscv-builtins-crypto.def b/gcc/config/riscv/riscv-builtins-crypto.def new file mode 100644 index 00000000000..13a2efe2e2b --- /dev/null +++ b/gcc/config/riscv/riscv-builtins-crypto.def @@ -0,0 +1,34 @@ +/* Builtin definitions for K extension + Copyright (C) 2021 Free Software Foundation, Inc. + Contributed by SiYu Wu (siyu@isrc.iscas.ac.cn). + +This file is part of GCC. + +GCC is free software; you can redistribute it and/or modify +it under the terms of the GNU General Public License as published by +the Free Software Foundation; either version 3, or (at your option) +any later version. + +GCC is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +You should have received a copy of the GNU General Public License +along with GCC; see the file COPYING3. If not see +. */ + +// Zkne&Zknd - AES (RV32) +DIRECT_BUILTIN (aes32dsi, RISCV_SI_FTYPE_SI_SI_SI, crypto_zknd32), +DIRECT_BUILTIN (aes32dsmi, RISCV_SI_FTYPE_SI_SI_SI, crypto_zknd32), +DIRECT_BUILTIN (aes32esi, RISCV_SI_FTYPE_SI_SI_SI, crypto_zkne32), +DIRECT_BUILTIN (aes32esmi, RISCV_SI_FTYPE_SI_SI_SI, crypto_zkne32), + +// Zkne&Zknd - AES (RV64) +DIRECT_BUILTIN (aes64ds, RISCV_DI_FTYPE_DI_DI, crypto_zknd64), +DIRECT_BUILTIN (aes64dsm, RISCV_DI_FTYPE_DI_DI, crypto_zknd64), +DIRECT_BUILTIN (aes64es, RISCV_DI_FTYPE_DI_DI, crypto_zkne64), +DIRECT_BUILTIN (aes64esm, RISCV_DI_FTYPE_DI_DI, crypto_zkne64), +DIRECT_BUILTIN (aes64im, RISCV_DI_FTYPE_DI, crypto_zknd64), +DIRECT_BUILTIN (aes64ks1i, RISCV_DI_FTYPE_DI_SI, crypto_zkne64), +DIRECT_BUILTIN (aes64ks2, RISCV_DI_FTYPE_DI_DI, crypto_zkne64), diff --git a/gcc/config/riscv/riscv-builtins.c b/gcc/config/riscv/riscv-builtins.c index 97b1480a15e..937a80ac483 100644 --- a/gcc/config/riscv/riscv-builtins.c +++ b/gcc/config/riscv/riscv-builtins.c @@ -40,6 +40,8 @@ along with GCC; see the file COPYING3. If not see /* Macros to create an enumeration identifier for a function prototype. */ #define RISCV_FTYPE_NAME0(A) RISCV_##A##_FTYPE #define RISCV_FTYPE_NAME1(A, B) RISCV_##A##_FTYPE_##B +#define RISCV_FTYPE_NAME2(A, B, C) RISCV_##A##_FTYPE_##B##_##C +#define RISCV_FTYPE_NAME3(A, B, C, D) RISCV_##A##_FTYPE_##B##_##C##_##D /* Classifies the prototype of a built-in function. */ enum riscv_function_type { @@ -87,6 +89,11 @@ struct riscv_builtin_description { AVAIL (hard_float, TARGET_HARD_FLOAT) +AVAIL (crypto_zknd32, TARGET_ZKND && !TARGET_64BIT) +AVAIL (crypto_zknd64, TARGET_ZKND && TARGET_64BIT) +AVAIL (crypto_zkne32, TARGET_ZKNE && !TARGET_64BIT) +AVAIL (crypto_zkne64, TARGET_ZKNE && TARGET_64BIT) + /* Construct a riscv_builtin_description from the given arguments. INSN is the name of the associated instruction pattern, without the @@ -119,6 +126,8 @@ AVAIL (hard_float, TARGET_HARD_FLOAT) /* Argument types. */ #define RISCV_ATYPE_VOID void_type_node #define RISCV_ATYPE_USI unsigned_intSI_type_node +#define RISCV_ATYPE_SI intSI_type_node +#define RISCV_ATYPE_DI intDI_type_node /* RISCV_FTYPE_ATYPESN takes N RISCV_FTYPES-like type codes and lists their associated RISCV_ATYPEs. */ @@ -126,8 +135,14 @@ AVAIL (hard_float, TARGET_HARD_FLOAT) RISCV_ATYPE_##A #define RISCV_FTYPE_ATYPES1(A, B) \ RISCV_ATYPE_##A, RISCV_ATYPE_##B +#define RISCV_FTYPE_ATYPES2(A, B, C) \ + RISCV_ATYPE_##A, RISCV_ATYPE_##B, RISCV_ATYPE_##C +#define RISCV_FTYPE_ATYPES3(A, B, C, D) \ + RISCV_ATYPE_##A, RISCV_ATYPE_##B, RISCV_ATYPE_##C, RISCV_ATYPE_##D static const struct riscv_builtin_description riscv_builtins[] = { + #include "riscv-builtins-crypto.def" + DIRECT_BUILTIN (frflags, RISCV_USI_FTYPE, hard_float), DIRECT_NO_TARGET_BUILTIN (fsflags, RISCV_VOID_FTYPE_USI, hard_float) }; diff --git a/gcc/config/riscv/riscv-ftypes.def b/gcc/config/riscv/riscv-ftypes.def index b19b731bdf2..e5bc5ac28c9 100644 --- a/gcc/config/riscv/riscv-ftypes.def +++ b/gcc/config/riscv/riscv-ftypes.def @@ -28,3 +28,6 @@ along with GCC; see the file COPYING3. If not see DEF_RISCV_FTYPE (0, (USI)) DEF_RISCV_FTYPE (1, (VOID, USI)) +DEF_RISCV_FTYPE (2, (DI, DI, DI)) +DEF_RISCV_FTYPE (2, (DI, DI, SI)) +DEF_RISCV_FTYPE (3, (SI, SI, SI, SI))