diff mbox series

[10/21,crypto] : add builtins for Zksed

Message ID 20211031093445.1414518-11-siyu@isrc.iscas.ac.cn
State New
Headers
Series RISC-V: add gcc support for Scalar Cryptography v1.0.0-rc5 |

Commit Message

siyu@isrc.iscas.ac.cn Oct. 31, 2021, 9:34 a.m. UTC 
  From: SiYu Wu <siyu@isrc.iscas.ac.cn>

---
 gcc/config/riscv/riscv-builtins-crypto.def | 6 ++++++
 gcc/config/riscv/riscv-builtins.c          | 3 +++
 2 files changed, 9 insertions(+)
diff mbox series

Patch

diff --git a/gcc/config/riscv/riscv-builtins-crypto.def b/gcc/config/riscv/riscv-builtins-crypto.def
index ca008929927..47bfff80f2e 100644
--- a/gcc/config/riscv/riscv-builtins-crypto.def
+++ b/gcc/config/riscv/riscv-builtins-crypto.def
@@ -56,3 +56,9 @@  DIRECT_BUILTIN (sha512sig0, RISCV_DI_FTYPE_DI, crypto_zknh64),
 DIRECT_BUILTIN (sha512sig1, RISCV_DI_FTYPE_DI, crypto_zknh64),
 DIRECT_BUILTIN (sha512sum0, RISCV_DI_FTYPE_DI, crypto_zknh64),
 DIRECT_BUILTIN (sha512sum1, RISCV_DI_FTYPE_DI, crypto_zknh64),
+
+// Zksed - SM4
+RISCV_BUILTIN (sm4ed_si, "sm4ed", RISCV_BUILTIN_DIRECT, RISCV_SI_FTYPE_SI_SI, crypto_zksed32),
+RISCV_BUILTIN (sm4ed_di, "sm4ed", RISCV_BUILTIN_DIRECT, RISCV_DI_FTYPE_DI_SI, crypto_zksed64),
+RISCV_BUILTIN (sm4ks_si, "sm4ks", RISCV_BUILTIN_DIRECT, RISCV_SI_FTYPE_SI_SI, crypto_zksed32),
+RISCV_BUILTIN (sm4ks_di, "sm4ks", RISCV_BUILTIN_DIRECT, RISCV_DI_FTYPE_DI_SI, crypto_zksed64),
diff --git a/gcc/config/riscv/riscv-builtins.c b/gcc/config/riscv/riscv-builtins.c
index 597f8ed60cb..1eed8d3fcb3 100644
--- a/gcc/config/riscv/riscv-builtins.c
+++ b/gcc/config/riscv/riscv-builtins.c
@@ -96,6 +96,9 @@  AVAIL (crypto_zkne64, TARGET_ZKNE && TARGET_64BIT)
 AVAIL (crypto_zknh32, TARGET_ZKNH && !TARGET_64BIT)
 AVAIL (crypto_zknh64, TARGET_ZKNH && TARGET_64BIT)
 
+AVAIL (crypto_zksed32, TARGET_ZKSED && !TARGET_64BIT)
+AVAIL (crypto_zksed64, TARGET_ZKSED && TARGET_64BIT)
+
 /* Construct a riscv_builtin_description from the given arguments.
 
    INSN is the name of the associated instruction pattern, without the