@@ -109,6 +109,7 @@ static const struct riscv_ext_version riscv_ext_version_table[] =
{"zkne", ISA_SPEC_CLASS_NONE, 1, 0},
{"zknd", ISA_SPEC_CLASS_NONE, 1, 0},
{"zknh", ISA_SPEC_CLASS_NONE, 1, 0},
+ {"zksed", ISA_SPEC_CLASS_NONE, 1, 0},
/* Terminate the list. */
{NULL, ISA_SPEC_CLASS_NONE, 0, 0}
@@ -923,6 +924,7 @@ static const riscv_ext_flag_table_t riscv_ext_flag_table[] =
{"zknd", &gcc_options::x_riscv_zk_subext, MASK_ZKND},
{"zkne", &gcc_options::x_riscv_zk_subext, MASK_ZKNE},
{"zknh", &gcc_options::x_riscv_zk_subext, MASK_ZKNH},
+ {"zksed", &gcc_options::x_riscv_zk_subext, MASK_ZKSED},
{NULL, NULL, 0}
};
@@ -38,6 +38,8 @@ (define_c_enum "unspec" [
UNSPEC_SHA_512_SIG1_2
UNSPEC_SHA_512_SUM0
UNSPEC_SHA_512_SUM1
+ UNSPEC_SM4_ED
+ UNSPEC_SM4_KS
])
@@ -250,3 +252,22 @@ (define_insn "riscv_sha512sum1"
"TARGET_ZKNH && TARGET_64BIT"
"sha512sum1\t%0,%1")
+
+;; Zksed - SM4
+
+(define_insn "riscv_sm4ed_<mode>"
+ [(set (match_operand:X 0 "register_operand" "=r")
+ (unspec:X [(match_operand:X 1 "register_operand" "r")
+ (match_operand:SI 2 "immediate_operand" "")]
+ UNSPEC_SM4_ED))]
+ "TARGET_ZKSED"
+ "sm4ed\t%0,%1,%2")
+
+(define_insn "riscv_sm4ks_<mode>"
+ [(set (match_operand:X 0 "register_operand" "=r")
+ (unspec:X [(match_operand:X 1 "register_operand" "r")
+ (match_operand:SI 2 "immediate_operand" "")]
+ UNSPEC_SM4_KS))]
+ "TARGET_ZKSED"
+ "sm4ks\t%0,%1,%2")
+
@@ -86,9 +86,11 @@ enum stack_protector_guard {
#define MASK_ZKNE (1 << 5)
#define MASK_ZKND (1 << 6)
#define MASK_ZKNH (1 << 7)
+#define MASK_ZKSED (1 << 9)
#define TARGET_ZKNE ((riscv_zk_subext & MASK_ZKNE) != 0)
#define TARGET_ZKND ((riscv_zk_subext & MASK_ZKND) != 0)
#define TARGET_ZKNH ((riscv_zk_subext & MASK_ZKNH) != 0)
+#define TARGET_ZKSED ((riscv_zk_subext & MASK_ZKSED) != 0)
#endif /* ! GCC_RISCV_OPTS_H */