From patchwork Tue Oct 19 18:23:45 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "H.J. Lu" X-Patchwork-Id: 46407 Return-Path: X-Original-To: patchwork@sourceware.org Delivered-To: patchwork@sourceware.org Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id 3C56F3858D39 for ; Tue, 19 Oct 2021 18:24:17 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org 3C56F3858D39 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gcc.gnu.org; s=default; t=1634667857; bh=bY6zx/5OTIXbJpxmx9a5U3HSBnlv506cWtf/2gM2r4k=; h=To:Subject:Date:List-Id:List-Unsubscribe:List-Archive:List-Post: List-Help:List-Subscribe:From:Reply-To:Cc:From; b=IYqmZJ3enXbvilXrtUqpk6AavVqjOaP9J5gq8UnlJLon7O8Y7Lx0R0f2xzSkN6wWt cWNz5ubGLQZxT/K+1fW4iHVbEmAZHtYNuiAH8Qy09o74mugU31QJNg8Edcjlm9dWa/ Y0G4A+n+eW8SaGArPL0kzV3pqKzBwhxr39HZ0eZQ= X-Original-To: gcc-patches@gcc.gnu.org Delivered-To: gcc-patches@gcc.gnu.org Received: from mail-pj1-x102f.google.com (mail-pj1-x102f.google.com [IPv6:2607:f8b0:4864:20::102f]) by sourceware.org (Postfix) with ESMTPS id 8EA883858D39 for ; Tue, 19 Oct 2021 18:23:48 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.1 sourceware.org 8EA883858D39 Received: by mail-pj1-x102f.google.com with SMTP id nn3-20020a17090b38c300b001a03bb6c4ebso588591pjb.1 for ; Tue, 19 Oct 2021 11:23:48 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:mime-version :content-transfer-encoding; bh=bY6zx/5OTIXbJpxmx9a5U3HSBnlv506cWtf/2gM2r4k=; b=0qtWEWx72T37jUChLtdjTYhbsHMvNpI4UG0f/aSJL1aCfZX4IO6ivz41eFR85nrpGl gEANJUBciViWrgaXwDePVLI1NQbeiJ5SY0ypIXqV9UN6+fnUO7Hkcr+2+KguErXpM6r/ mdxa2jGLmXcWLq4xgQYGj7SqPlrvld6Z12l+cHnJZsLpelK1KlsUhwFGonz+tx6ILdNx XY1QGe6wsV+fZXlfwrBJiXYkixclisZV51CKQ+F1ma799obVb3BH6u79ZNLZQcyBPYHv +Ag6Op66n5NmZRtXS1+LUyGrHLgI43E/hndTMJLm3ACTinn5iXZ2iz3pzMoftoSDjItR PmHQ== X-Gm-Message-State: AOAM532hy/4WJsEgMYWOENt7DkjeCPDy4O650hs5TkoRaYlpbGphzhCE JI/afbAzqfeMBOD5PED5UXke0s45LI4= X-Google-Smtp-Source: ABdhPJzH1UNMErWtvao9yxWx+KBa6zdn4jhUd3T+bbHxzI4J52a18mMlaphZO/ThRFYGKOe+Z3U8Jg== X-Received: by 2002:a17:902:be0f:b0:13a:95e:a51 with SMTP id r15-20020a170902be0f00b0013a095e0a51mr34198331pls.44.1634667827048; Tue, 19 Oct 2021 11:23:47 -0700 (PDT) Received: from gnu-cfl-2.localdomain ([2607:fb90:a48a:adf1:e15a:7fe6:0:c66]) by smtp.gmail.com with ESMTPSA id l12sm4662083pfu.100.2021.10.19.11.23.46 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 19 Oct 2021 11:23:46 -0700 (PDT) Received: from gnu-cfl-2.lan (localhost [IPv6:::1]) by gnu-cfl-2.localdomain (Postfix) with ESMTP id 505871A0178; Tue, 19 Oct 2021 11:23:45 -0700 (PDT) To: gcc-patches@gcc.gnu.org Subject: [PATCH] x86: Adjust gcc.target/i386/pr22076.c Date: Tue, 19 Oct 2021 11:23:45 -0700 Message-Id: <20211019182345.4034456-1-hjl.tools@gmail.com> X-Mailer: git-send-email 2.32.0 MIME-Version: 1.0 X-Spam-Status: No, score=-3031.2 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, DKIM_VALID_EF, FREEMAIL_FROM, GIT_PATCH_0, KAM_SHORT, LOTS_OF_MONEY, RCVD_IN_DNSWL_NONE, SPF_HELO_NONE, SPF_PASS, TXREP autolearn=ham autolearn_force=no version=3.4.4 X-Spam-Checker-Version: SpamAssassin 3.4.4 (2020-01-24) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-Patchwork-Original-From: "H.J. Lu via Gcc-patches" From: "H.J. Lu" Reply-To: "H.J. Lu" Cc: Roger Sayle Errors-To: gcc-patches-bounces+patchwork=sourceware.org@gcc.gnu.org Sender: "Gcc-patches" commit 247c407c83f0015f4b92d5f71e45b63192f6757e Author: Roger Sayle Date: Mon Oct 18 12:15:40 2021 +0100 Try placing RTL folded constants in the constant pool. My recent attempts to come up with a testcase for my patch to evaluate ss_plus in simplify-rtx.c, identified a missed optimization opportunity (that's potentially a long-time regression): The RTL optimizers no longer place constants in the constant pool. changed -m32 codegen from movq .LC1, %mm0 paddb .LC0, %mm0 movq %mm0, x ret to movl $807671820, %eax movl $1616136252, %edx movl %eax, x movl %edx, x+4 ret and -m64 codegen from movq .LC1(%rip), %mm0 paddb .LC0(%rip), %mm0 movq %xmm0, x(%rip) ret to movq .LC2(%rip), %rax movq %rax, x(%rip) ret Adjust pr22076.c to check that MMX register isn't used since avoiding MMX register isn't a bad thing. PR testsuite/102840 * gcc.target/i386/pr22076.c: Updated to check that MMX register isn't used. --- gcc/testsuite/gcc.target/i386/pr22076.c | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/gcc/testsuite/gcc.target/i386/pr22076.c b/gcc/testsuite/gcc.target/i386/pr22076.c index 427ffcd4920..aa06f057690 100644 --- a/gcc/testsuite/gcc.target/i386/pr22076.c +++ b/gcc/testsuite/gcc.target/i386/pr22076.c @@ -15,5 +15,6 @@ void test () x = _mm_add_pi8 (mm0, mm1); } -/* { dg-final { scan-assembler-times "movq" 2 } } */ -/* { dg-final { scan-assembler-not "movl" { target nonpic } } } */ +/* { dg-final { scan-assembler-times "movq" 2 { target { ! ia32 } } } } */ +/* { dg-final { scan-assembler-times "movl" 4 { target { nonpic && ia32 } } } } */ +/* { dg-final { scan-assembler-not "%mm" } } */