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[59.124.168.89]) by smtp.gmail.com with ESMTPSA id pc3sm8132163pjb.0.2021.09.23.00.57.46 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 23 Sep 2021 00:57:47 -0700 (PDT) From: Kito Cheng To: gcc-patches@gcc.gnu.org, kito.cheng@gmail.com, jimw@sifive.com, jiawei@iscas.ac.cn, cmuellner@ventanamicro.com, palmer@dabbelt.com, andrew@sifive.com Subject: [RFC PATCH 5/8] RISC-V: Cost model for zbb extension. Date: Thu, 23 Sep 2021 15:57:28 +0800 Message-Id: <20210923075731.50125-6-kito.cheng@sifive.com> X-Mailer: git-send-email 2.33.0 In-Reply-To: <20210923075731.50125-1-kito.cheng@sifive.com> References: <20210923075731.50125-1-kito.cheng@sifive.com> MIME-Version: 1.0 X-Spam-Status: No, score=-13.6 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, DKIM_VALID_EF, GIT_PATCH_0, RCVD_IN_DNSWL_NONE, SPF_HELO_NONE, SPF_PASS, TXREP autolearn=ham autolearn_force=no version=3.4.4 X-Spam-Checker-Version: SpamAssassin 3.4.4 (2020-01-24) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Kito Cheng Errors-To: gcc-patches-bounces+patchwork=sourceware.org@gcc.gnu.org Sender: "Gcc-patches" 2021-09-23 Kito Cheng gcc/ChangeLog: * config/riscv/riscv.c (riscv_extend_cost): Handle cost model for zbb extension. (riscv_rtx_costs): Ditto. --- gcc/config/riscv/riscv.c | 17 +++++++++++++++++ 1 file changed, 17 insertions(+) diff --git a/gcc/config/riscv/riscv.c b/gcc/config/riscv/riscv.c index cc58b7041ac..10f7bd21f8d 100644 --- a/gcc/config/riscv/riscv.c +++ b/gcc/config/riscv/riscv.c @@ -1706,6 +1706,16 @@ riscv_extend_cost (rtx op, bool unsigned_p) if (TARGET_ZBA && TARGET_64BIT && unsigned_p && GET_MODE (op) == SImode) return COSTS_N_INSNS (1); + /* ZBB provide zext.h, sext.b and sext.h. */ + if (TARGET_ZBB) + { + if (!unsigned_p && GET_MODE (op) == QImode) + return COSTS_N_INSNS (1); + + if (GET_MODE (op) == HImode) + return COSTS_N_INSNS (1); + } + if (!unsigned_p && GET_MODE (op) == SImode) /* We can use SEXT.W. */ return COSTS_N_INSNS (1); @@ -1796,6 +1806,13 @@ riscv_rtx_costs (rtx x, machine_mode mode, int outer_code, int opno ATTRIBUTE_UN gcc_fallthrough (); case IOR: case XOR: + /* orn, andn and xorn pattern for zbb. */ + if (TARGET_ZBB + && GET_CODE (XEXP (x, 0)) == NOT) + { + *total = riscv_binary_cost (x, 1, 2); + return true; + } /* Double-word operations use two single-word operations. */ *total = riscv_binary_cost (x, 1, 2); return false;