From patchwork Sat Nov 6 19:31:02 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Li, Pan2 via Gcc-patches" X-Patchwork-Id: 47175 Return-Path: X-Original-To: patchwork@sourceware.org Delivered-To: patchwork@sourceware.org Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id 30FC53858401 for ; Sat, 6 Nov 2021 19:32:21 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org 30FC53858401 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gcc.gnu.org; s=default; t=1636227141; bh=44FTZMEjME+4z10FW/zHEBCeQ65vA8LrginssNLafs0=; h=To:Subject:Date:List-Id:List-Unsubscribe:List-Archive:List-Post: List-Help:List-Subscribe:From:Reply-To:Cc:From; b=kmoaV23IlbSrKDMCDuheywBpxtmkjco0w+C9xj5Lzr+/imjxDbZk/lnt6+fYzU+HZ OceZ1z86JbWPH8k1MxEiIIaPkqYSix5L+Zo/ZIwEB7wObJhooqQLWaelbSM+m78cis 67yB8MPO4kKH6ETTB3FBfPz6CofYBdi71+UNLabE= X-Original-To: gcc-patches@gcc.gnu.org Delivered-To: gcc-patches@gcc.gnu.org Received: from mx0b-0016f401.pphosted.com (mx0a-0016f401.pphosted.com [67.231.148.174]) by sourceware.org (Postfix) with ESMTPS id 8A0F0385781A for ; Sat, 6 Nov 2021 19:31:11 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.1 sourceware.org 8A0F0385781A Received: from pps.filterd (m0045849.ppops.net [127.0.0.1]) by mx0a-0016f401.pphosted.com (8.16.1.2/8.16.1.2) with ESMTP id 1A6EKI4c025601 for ; Sat, 6 Nov 2021 12:31:10 -0700 Received: from dc5-exch02.marvell.com ([199.233.59.182]) by mx0a-0016f401.pphosted.com (PPS) with ESMTPS id 3c5q2q9fhw-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT) for ; Sat, 06 Nov 2021 12:31:10 -0700 Received: from DC5-EXCH01.marvell.com (10.69.176.38) by DC5-EXCH02.marvell.com (10.69.176.39) with Microsoft SMTP Server (TLS) id 15.0.1497.18; Sat, 6 Nov 2021 12:31:09 -0700 Received: from maili.marvell.com (10.69.176.80) by DC5-EXCH01.marvell.com (10.69.176.38) with Microsoft SMTP Server id 15.0.1497.18 via Frontend Transport; Sat, 6 Nov 2021 12:31:08 -0700 Received: from linux.wrightpinski.org.com (unknown [10.69.242.198]) by maili.marvell.com (Postfix) with ESMTP id 03E393F709A; Sat, 6 Nov 2021 12:31:07 -0700 (PDT) To: Subject: [PATCH] aarch64: [PR101529] Fix vector shuffle insertion expansion Date: Sat, 6 Nov 2021 12:31:02 -0700 Message-ID: <1636227062-9149-1-git-send-email-apinski@marvell.com> X-Mailer: git-send-email 1.8.3.1 MIME-Version: 1.0 X-Proofpoint-ORIG-GUID: 5ejcWAmLvjVbOcyIwSLXYcdeL0MGTgBS X-Proofpoint-GUID: 5ejcWAmLvjVbOcyIwSLXYcdeL0MGTgBS X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.205,Aquarius:18.0.790,Hydra:6.0.425,FMLib:17.0.607.475 definitions=2021-11-06_02,2021-11-03_01,2020-04-07_01 X-Spam-Status: No, score=-14.7 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, DKIM_VALID_EF, GIT_PATCH_0, RCVD_IN_DNSWL_LOW, SPF_HELO_NONE, SPF_PASS, TXREP autolearn=ham autolearn_force=no version=3.4.4 X-Spam-Checker-Version: SpamAssassin 3.4.4 (2020-01-24) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-Patchwork-Original-From: apinski--- via Gcc-patches From: "Li, Pan2 via Gcc-patches" Reply-To: apinski@marvell.com Cc: Andrew Pinski Errors-To: gcc-patches-bounces+patchwork=sourceware.org@gcc.gnu.org Sender: "Gcc-patches" From: Andrew Pinski The function aarch64_evpc_ins would reuse the target even though it might be the same register as the two inputs. Instead of checking to see if we can reuse the target, creating a new register always is better. OK? Bootstrapped and tested on aarch64-linux-gnu with no regressions. PR target/101529 gcc/ChangeLog: * config/aarch64/aarch64.c (aarch64_evpc_ins): Don't use target as an input instead create a new reg. gcc/testsuite/ChangeLog: * c-c++-common/torture/builtin-convertvector-2.c: New test. * c-c++-common/torture/builtin-shufflevector-2.c: New test. --- gcc/config/aarch64/aarch64.c | 8 ++++-- .../torture/builtin-convertvector-2.c | 26 +++++++++++++++++++ .../torture/builtin-shufflevector-2.c | 26 +++++++++++++++++++ 3 files changed, 58 insertions(+), 2 deletions(-) create mode 100644 gcc/testsuite/c-c++-common/torture/builtin-convertvector-2.c create mode 100644 gcc/testsuite/c-c++-common/torture/builtin-shufflevector-2.c diff --git a/gcc/config/aarch64/aarch64.c b/gcc/config/aarch64/aarch64.c index 2c00583e12c..e4fc546fae7 100644 --- a/gcc/config/aarch64/aarch64.c +++ b/gcc/config/aarch64/aarch64.c @@ -23084,11 +23084,15 @@ aarch64_evpc_ins (struct expand_vec_perm_d *d) } gcc_assert (extractindex < nelt); - emit_move_insn (d->target, insv); + /* Use a new reg instead of target as one of the + operands might be target. */ + rtx original = gen_reg_rtx (GET_MODE (d->target)); + + emit_move_insn (original, insv); insn_code icode = code_for_aarch64_simd_vec_copy_lane (mode); expand_operand ops[5]; create_output_operand (&ops[0], d->target, mode); - create_input_operand (&ops[1], d->target, mode); + create_input_operand (&ops[1], original, mode); create_integer_operand (&ops[2], 1 << idx); create_input_operand (&ops[3], extractv, mode); create_integer_operand (&ops[4], extractindex); diff --git a/gcc/testsuite/c-c++-common/torture/builtin-convertvector-2.c b/gcc/testsuite/c-c++-common/torture/builtin-convertvector-2.c new file mode 100644 index 00000000000..d88f6a72b5c --- /dev/null +++ b/gcc/testsuite/c-c++-common/torture/builtin-convertvector-2.c @@ -0,0 +1,26 @@ +/* { dg-do run } */ +/* PR target/101529 */ + +typedef unsigned char __attribute__((__vector_size__ (1))) W; +typedef unsigned char __attribute__((__vector_size__ (8))) V; +typedef unsigned short __attribute__((__vector_size__ (16))) U; + +unsigned short us; + +/* aarch64 used to miscompile foo to just return 0. */ +W +foo (unsigned char uc) +{ + V v = __builtin_convertvector ((U){ } >= us, V); + return __builtin_shufflevector ((W){ }, v, 4) & uc; +} + +int +main (void) +{ + W x = foo (5); + if (x[0] != 5) + __builtin_abort(); + return 0; +} + diff --git a/gcc/testsuite/c-c++-common/torture/builtin-shufflevector-2.c b/gcc/testsuite/c-c++-common/torture/builtin-shufflevector-2.c new file mode 100644 index 00000000000..7c4999ed4e9 --- /dev/null +++ b/gcc/testsuite/c-c++-common/torture/builtin-shufflevector-2.c @@ -0,0 +1,26 @@ +/* { dg-do run} */ +/* PR target/101529 */ +typedef unsigned char C; +typedef unsigned char __attribute__((__vector_size__ (8))) V; +typedef unsigned char __attribute__((__vector_size__ (32))) U; + +C c; + +/* aarch64 used to miscompile foo to just return a vector of 0s */ +V +foo (V v) +{ + v |= __builtin_shufflevector (c * v, (U) (0 == (U){ }), + 0, 1, 8, 32, 8, 20, 36, 36); + return v; +} + +int +main (void) +{ + V v = foo ((V) { }); + for (unsigned i = 0; i < sizeof (v); i++) + if (v[i] != (i >= 2 ? 0xff : 0)) + __builtin_abort (); + return 0; +}