Message ID | 0c83ffcd-ed6d-5264-1d50-d4ffcc7d6836@linux.ibm.com |
---|---|
State | New |
Headers |
Return-Path: <gcc-patches-bounces+patchwork=sourceware.org@gcc.gnu.org> X-Original-To: patchwork@sourceware.org Delivered-To: patchwork@sourceware.org Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id 9DE593858428 for <patchwork@sourceware.org>; Fri, 17 Dec 2021 01:55:46 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org 9DE593858428 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gcc.gnu.org; s=default; t=1639706146; bh=8sAZnjvKUoiS/wu91FvqGAVCqhGe9lLoYjA8iC0ob/0=; h=Date:To:Subject:List-Id:List-Unsubscribe:List-Archive:List-Post: List-Help:List-Subscribe:From:Reply-To:Cc:From; b=GfQA1jiRxM5a+AMBoS8CI7h0fkHru7BlQLf8tY556nsXeW3Jh5INgyRtmIo/zy5oS JwCrXR3LIB9Mhi+ZDN/k9M0l0BQNhoOWi5IVaKE0qD+yfoDNR28paRuykXOjCdVnDF ui9HaPls1IwJMmcFuhTL6H1thGYKMoRH0Nh2cQ+M= X-Original-To: gcc-patches@gcc.gnu.org Delivered-To: gcc-patches@gcc.gnu.org Received: from mx0a-001b2d01.pphosted.com (mx0a-001b2d01.pphosted.com [148.163.156.1]) by sourceware.org (Postfix) with ESMTPS id A707A3858D28 for <gcc-patches@gcc.gnu.org>; Fri, 17 Dec 2021 01:55:16 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.1 sourceware.org A707A3858D28 Received: from pps.filterd (m0098410.ppops.net [127.0.0.1]) by mx0a-001b2d01.pphosted.com (8.16.1.2/8.16.1.2) with SMTP id 1BGMjalO017600; Fri, 17 Dec 2021 01:55:15 GMT Received: from pps.reinject (localhost [127.0.0.1]) by mx0a-001b2d01.pphosted.com with ESMTP id 3cynfwumsr-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Fri, 17 Dec 2021 01:55:15 +0000 Received: from m0098410.ppops.net (m0098410.ppops.net [127.0.0.1]) by pps.reinject (8.16.0.43/8.16.0.43) with SMTP id 1BH1seFH008877; Fri, 17 Dec 2021 01:55:14 GMT Received: from ppma06fra.de.ibm.com (48.49.7a9f.ip4.static.sl-reverse.com [159.122.73.72]) by mx0a-001b2d01.pphosted.com with ESMTP id 3cynfwumsa-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Fri, 17 Dec 2021 01:55:14 +0000 Received: from pps.filterd (ppma06fra.de.ibm.com [127.0.0.1]) by ppma06fra.de.ibm.com (8.16.1.2/8.16.1.2) with SMTP id 1BH1XRHi013288; Fri, 17 Dec 2021 01:55:12 GMT Received: from b06avi18626390.portsmouth.uk.ibm.com (b06avi18626390.portsmouth.uk.ibm.com [9.149.26.192]) by ppma06fra.de.ibm.com with ESMTP id 3cy77pkx48-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Fri, 17 Dec 2021 01:55:12 +0000 Received: from d06av26.portsmouth.uk.ibm.com (d06av26.portsmouth.uk.ibm.com [9.149.105.62]) by b06avi18626390.portsmouth.uk.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id 1BH1l73P27656610 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-GCM-SHA384 bits=256 verify=OK); Fri, 17 Dec 2021 01:47:07 GMT Received: from d06av26.portsmouth.uk.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id D619BAE06A; Fri, 17 Dec 2021 01:55:09 +0000 (GMT) Received: from d06av26.portsmouth.uk.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 5E787AE05A; Fri, 17 Dec 2021 01:55:08 +0000 (GMT) Received: from [9.200.32.73] (unknown [9.200.32.73]) by d06av26.portsmouth.uk.ibm.com (Postfix) with ESMTP; Fri, 17 Dec 2021 01:55:08 +0000 (GMT) Message-ID: <0c83ffcd-ed6d-5264-1d50-d4ffcc7d6836@linux.ibm.com> Date: Fri, 17 Dec 2021 09:55:06 +0800 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (Windows NT 10.0; Win64; x64; rv:91.0) Gecko/20100101 Thunderbird/91.4.0 Content-Language: en-US To: gcc-patches <gcc-patches@gcc.gnu.org> Subject: [PATCH, rs6000] new split pattern for TI to V1TI move [PR103124] Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-TM-AS-GCONF: 00 X-Proofpoint-GUID: QHboga5Xt4xt4Vme-PAcoRIKe9vrho5S X-Proofpoint-ORIG-GUID: 2U27zgpWzVpu-HqabrY36K6dX6-63fng X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.205,Aquarius:18.0.790,Hydra:6.0.425,FMLib:17.11.62.513 definitions=2021-12-16_09,2021-12-16_01,2021-12-02_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 clxscore=1015 mlxscore=0 lowpriorityscore=0 phishscore=0 adultscore=0 spamscore=0 priorityscore=1501 bulkscore=0 mlxlogscore=999 malwarescore=0 suspectscore=0 impostorscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2110150000 definitions=main-2112170007 X-Spam-Status: No, score=-12.7 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_EF, GIT_PATCH_0, KAM_SHORT, RCVD_IN_MSPIKE_H2, SPF_HELO_NONE, SPF_PASS, TXREP autolearn=ham autolearn_force=no version=3.4.4 X-Spam-Checker-Version: SpamAssassin 3.4.4 (2020-01-24) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gcc-patches mailing list <gcc-patches.gcc.gnu.org> List-Unsubscribe: <https://gcc.gnu.org/mailman/options/gcc-patches>, <mailto:gcc-patches-request@gcc.gnu.org?subject=unsubscribe> List-Archive: <https://gcc.gnu.org/pipermail/gcc-patches/> List-Post: <mailto:gcc-patches@gcc.gnu.org> List-Help: <mailto:gcc-patches-request@gcc.gnu.org?subject=help> List-Subscribe: <https://gcc.gnu.org/mailman/listinfo/gcc-patches>, <mailto:gcc-patches-request@gcc.gnu.org?subject=subscribe> From: HAO CHEN GUI via Gcc-patches <gcc-patches@gcc.gnu.org> Reply-To: HAO CHEN GUI <guihaoc@linux.ibm.com> Cc: Bill Schmidt <wschmidt@linux.ibm.com>, David <dje.gcc@gmail.com>, Segher Boessenkool <segher@kernel.crashing.org> Errors-To: gcc-patches-bounces+patchwork=sourceware.org@gcc.gnu.org Sender: "Gcc-patches" <gcc-patches-bounces+patchwork=sourceware.org@gcc.gnu.org> |
Series |
[rs6000] new split pattern for TI to V1TI move [PR103124]
|
|
Commit Message
HAO CHEN GUI
Dec. 17, 2021, 1:55 a.m. UTC
Hi, This patch defines a new split pattern for TI to V1TI move. The pattern concatenates two subreg:DI of a TI to a V2DI. With the pattern, the subreg pass can do register split for TI when there is a TI to V1TI move. The patch optimizes one unnecessary "mr" out on P9. The new test case illustrates it. Bootstrapped and tested on powerpc64-linux BE and LE with no regressions. Is this okay for trunk? Any recommendations? Thanks a lot. ChangeLog 2021-12-13 Haochen Gui <guihaoc@linux.ibm.com> gcc/ * config/rs6000/vsx.md (split pattern for TI to V1TI move): Defined. gcc/testsuite/ * gcc.target/powerpc/pr103124.c: New testcase. patch.diff
Comments
Hi, Gentle ping this: https://gcc.gnu.org/pipermail/gcc-patches/2021-December/587051.html Thanks On 17/12/2021 上午 9:55, HAO CHEN GUI wrote: > Hi, > This patch defines a new split pattern for TI to V1TI move. The pattern concatenates two subreg:DI of > a TI to a V2DI. With the pattern, the subreg pass can do register split for TI when there is a TI to V1TI > move. The patch optimizes one unnecessary "mr" out on P9. The new test case illustrates it. > > Bootstrapped and tested on powerpc64-linux BE and LE with no regressions. Is this okay for trunk? > Any recommendations? Thanks a lot. > > ChangeLog > 2021-12-13 Haochen Gui <guihaoc@linux.ibm.com> > > gcc/ > * config/rs6000/vsx.md (split pattern for TI to V1TI move): Defined. > > gcc/testsuite/ > * gcc.target/powerpc/pr103124.c: New testcase. > > > patch.diff > diff --git a/gcc/config/rs6000/vsx.md b/gcc/config/rs6000/vsx.md > index bf033e31c1c..52968eb4609 100644 > --- a/gcc/config/rs6000/vsx.md > +++ b/gcc/config/rs6000/vsx.md > @@ -6589,3 +6589,19 @@ (define_insn "xxeval" > [(set_attr "type" "vecperm") > (set_attr "prefixed" "yes")]) > > +;; Construct V1TI by vsx_concat_v2di > +(define_split > + [(set (match_operand:V1TI 0 "vsx_register_operand") > + (subreg:V1TI > + (match_operand:TI 1 "int_reg_operand") 0 ))] > + "TARGET_P9_VECTOR && !reload_completed" > + [(const_int 0)] > +{ > + rtx tmp1 = simplify_gen_subreg (DImode, operands[1], TImode, 0); > + rtx tmp2 = simplify_gen_subreg (DImode, operands[1], TImode, 8); > + rtx tmp3 = gen_reg_rtx (V2DImode); > + emit_insn (gen_vsx_concat_v2di (tmp3, tmp1, tmp2)); > + rtx tmp4 = simplify_gen_subreg (V1TImode, tmp3, V2DImode, 0); > + emit_move_insn (operands[0], tmp4); > + DONE; > +}) > diff --git a/gcc/testsuite/gcc.target/powerpc/pr103124.c b/gcc/testsuite/gcc.target/powerpc/pr103124.c > new file mode 100644 > index 00000000000..e9072d19b8e > --- /dev/null > +++ b/gcc/testsuite/gcc.target/powerpc/pr103124.c > @@ -0,0 +1,12 @@ > +/* { dg-do compile } */ > +/* { dg-require-effective-target powerpc_p9vector_ok } */ > +/* { dg-require-effective-target int128 } */ > +/* { dg-options "-O2 -mdejagnu-cpu=power9" } */ > +/* { dg-final { scan-assembler-not "\mmr\M" } } */ > + > +vector __int128 add (long long a) > +{ > + vector __int128 b; > + b = (vector __int128) {a}; > + return b; > +} >
On Sun, Jan 9, 2022 at 10:16 PM HAO CHEN GUI <guihaoc@linux.ibm.com> wrote: > > Hi, > > Gentle ping this: > https://gcc.gnu.org/pipermail/gcc-patches/2021-December/587051.html > > Thanks > > On 17/12/2021 上午 9:55, HAO CHEN GUI wrote: > > Hi, > > This patch defines a new split pattern for TI to V1TI move. The pattern concatenates two subreg:DI of > > a TI to a V2DI. With the pattern, the subreg pass can do register split for TI when there is a TI to V1TI > > move. The patch optimizes one unnecessary "mr" out on P9. The new test case illustrates it. > > > > Bootstrapped and tested on powerpc64-linux BE and LE with no regressions. Is this okay for trunk? > > Any recommendations? Thanks a lot. > > > > ChangeLog > > 2021-12-13 Haochen Gui <guihaoc@linux.ibm.com> > > > > gcc/ > > * config/rs6000/vsx.md (split pattern for TI to V1TI move): Defined. > > > > gcc/testsuite/ > > * gcc.target/powerpc/pr103124.c: New testcase. > > > > > > patch.diff > > diff --git a/gcc/config/rs6000/vsx.md b/gcc/config/rs6000/vsx.md > > index bf033e31c1c..52968eb4609 100644 > > --- a/gcc/config/rs6000/vsx.md > > +++ b/gcc/config/rs6000/vsx.md > > @@ -6589,3 +6589,19 @@ (define_insn "xxeval" > > [(set_attr "type" "vecperm") > > (set_attr "prefixed" "yes")]) > > > > +;; Construct V1TI by vsx_concat_v2di > > +(define_split > > + [(set (match_operand:V1TI 0 "vsx_register_operand") > > + (subreg:V1TI > > + (match_operand:TI 1 "int_reg_operand") 0 ))] > > + "TARGET_P9_VECTOR && !reload_completed" > > + [(const_int 0)] > > +{ > > + rtx tmp1 = simplify_gen_subreg (DImode, operands[1], TImode, 0); > > + rtx tmp2 = simplify_gen_subreg (DImode, operands[1], TImode, 8); > > + rtx tmp3 = gen_reg_rtx (V2DImode); > > + emit_insn (gen_vsx_concat_v2di (tmp3, tmp1, tmp2)); > > + rtx tmp4 = simplify_gen_subreg (V1TImode, tmp3, V2DImode, 0); > > + emit_move_insn (operands[0], tmp4); > > + DONE; > > +}) > > diff --git a/gcc/testsuite/gcc.target/powerpc/pr103124.c b/gcc/testsuite/gcc.target/powerpc/pr103124.c > > new file mode 100644 > > index 00000000000..e9072d19b8e > > --- /dev/null > > +++ b/gcc/testsuite/gcc.target/powerpc/pr103124.c > > @@ -0,0 +1,12 @@ > > +/* { dg-do compile } */ > > +/* { dg-require-effective-target powerpc_p9vector_ok } */ > > +/* { dg-require-effective-target int128 } */ > > +/* { dg-options "-O2 -mdejagnu-cpu=power9" } */ > > +/* { dg-final { scan-assembler-not "\mmr\M" } } */ Segher probably would prefer {\mmr\M} . > > + > > +vector __int128 add (long long a) > > +{ > > + vector __int128 b; > > + b = (vector __int128) {a}; > > + return b; > > +} This is okay. Thanks, David
On Mon, Jan 10, 2022 at 06:09:01PM -0500, David Edelsohn wrote: > On Sun, Jan 9, 2022 at 10:16 PM HAO CHEN GUI <guihaoc@linux.ibm.com> wrote: > > > +/* { dg-final { scan-assembler-not "\mmr\M" } } */ > > Segher probably would prefer {\mmr\M} . Because that one works, and the one with double quotes doesn't, yes :-) It is a scan-assembler-not so the testcase likely won't fail, but it is checking the wrong thing. In double-quoted strings "\m" means the same as "m", and "\M" means the same as "M" (neither escape has any special meaning). If you want the regex escapes in such a string, you need to escape the escapes, so write "\\m" and "\\M". It is much simpler to not have backslash substitution on the strings at all, so to use {\m} etc. Segher
Segher and David, Thanks for your explanation. I got it. The "\m" itself is a constraint escape. Gui Haochen On 11/1/2022 上午 9:12, Segher Boessenkool wrote: > On Mon, Jan 10, 2022 at 06:09:01PM -0500, David Edelsohn wrote: >> On Sun, Jan 9, 2022 at 10:16 PM HAO CHEN GUI <guihaoc@linux.ibm.com> wrote: >>>> +/* { dg-final { scan-assembler-not "\mmr\M" } } */ >> >> Segher probably would prefer {\mmr\M} . > > Because that one works, and the one with double quotes doesn't, yes :-) > > It is a scan-assembler-not so the testcase likely won't fail, but it is > checking the wrong thing. In double-quoted strings "\m" means the same > as "m", and "\M" means the same as "M" (neither escape has any special > meaning). If you want the regex escapes in such a string, you need to > escape the escapes, so write "\\m" and "\\M". It is much simpler to not > have backslash substitution on the strings at all, so to use {\m} etc. > > > Segher
diff --git a/gcc/config/rs6000/vsx.md b/gcc/config/rs6000/vsx.md index bf033e31c1c..52968eb4609 100644 --- a/gcc/config/rs6000/vsx.md +++ b/gcc/config/rs6000/vsx.md @@ -6589,3 +6589,19 @@ (define_insn "xxeval" [(set_attr "type" "vecperm") (set_attr "prefixed" "yes")]) +;; Construct V1TI by vsx_concat_v2di +(define_split + [(set (match_operand:V1TI 0 "vsx_register_operand") + (subreg:V1TI + (match_operand:TI 1 "int_reg_operand") 0 ))] + "TARGET_P9_VECTOR && !reload_completed" + [(const_int 0)] +{ + rtx tmp1 = simplify_gen_subreg (DImode, operands[1], TImode, 0); + rtx tmp2 = simplify_gen_subreg (DImode, operands[1], TImode, 8); + rtx tmp3 = gen_reg_rtx (V2DImode); + emit_insn (gen_vsx_concat_v2di (tmp3, tmp1, tmp2)); + rtx tmp4 = simplify_gen_subreg (V1TImode, tmp3, V2DImode, 0); + emit_move_insn (operands[0], tmp4); + DONE; +}) diff --git a/gcc/testsuite/gcc.target/powerpc/pr103124.c b/gcc/testsuite/gcc.target/powerpc/pr103124.c new file mode 100644 index 00000000000..e9072d19b8e --- /dev/null +++ b/gcc/testsuite/gcc.target/powerpc/pr103124.c @@ -0,0 +1,12 @@ +/* { dg-do compile } */ +/* { dg-require-effective-target powerpc_p9vector_ok } */ +/* { dg-require-effective-target int128 } */ +/* { dg-options "-O2 -mdejagnu-cpu=power9" } */ +/* { dg-final { scan-assembler-not "\mmr\M" } } */ + +vector __int128 add (long long a) +{ + vector __int128 b; + b = (vector __int128) {a}; + return b; +}