From patchwork Sat Jun 3 17:31:40 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Roger Sayle X-Patchwork-Id: 70561 Return-Path: X-Original-To: patchwork@sourceware.org Delivered-To: patchwork@sourceware.org Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id 0EB4B385703C for ; Sat, 3 Jun 2023 17:32:05 +0000 (GMT) X-Original-To: gcc-patches@gcc.gnu.org Delivered-To: gcc-patches@gcc.gnu.org Received: from server.nextmovesoftware.com (server.nextmovesoftware.com [162.254.253.69]) by sourceware.org (Postfix) with ESMTPS id D10823858D32 for ; Sat, 3 Jun 2023 17:31:43 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.2 sourceware.org D10823858D32 Authentication-Results: sourceware.org; dmarc=none (p=none dis=none) header.from=nextmovesoftware.com Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=nextmovesoftware.com DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=nextmovesoftware.com; s=default; h=Content-Type:MIME-Version:Message-ID: Date:Subject:Cc:To:From:Sender:Reply-To:Content-Transfer-Encoding:Content-ID: Content-Description:Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc :Resent-Message-ID:In-Reply-To:References:List-Id:List-Help:List-Unsubscribe: List-Subscribe:List-Post:List-Owner:List-Archive; bh=YFkR5sX0U+hFhCJJ5CcIWaTMmYkiWwVRU9pX8r5ptSo=; b=rW/32RR5ukazL5z3GgV+OUg/Wo Nz1EyvWN0j+Iuckv9L5aVzhr/YiDlB01mQIk+BZkEYE+RpV1LRayOTUYfltPtOTOx+uQLnl2fNx1V T0aVT5j5N6wO5qScTRlLkHyLnmp5/Cm9RLGcp+3xlZuOUX4Ljmg7jxfGDqxnfm0+fPAgw7rZ9OZ2g ekgqQIuMzwIBrJRB2w3GU2a4e1CpFiHmCm8hyxS//TlBf/h4FIGi2SaoVkGzrCx8N/P1YqHjoOub+ ed3dAvsGf9CEdnAAHyX+ZY7b9W1B7SbuzWRNihMXnAez3ZDI7n3d0ROBLG8U8m0hqfsQ19s/CCg16 G0FL6oGw==; Received: from host86-169-41-81.range86-169.btcentralplus.com ([86.169.41.81]:57035 helo=Dell) by server.nextmovesoftware.com with esmtpsa (TLS1.2) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.96) (envelope-from ) id 1q5V6N-0003XW-05; Sat, 03 Jun 2023 13:31:43 -0400 From: "Roger Sayle" To: Cc: "'Uros Bizjak'" Subject: [x86_64 PATCH] PR target/110083: Fix-up REG_EQUAL notes on COMPARE in STV. Date: Sat, 3 Jun 2023 18:31:40 +0100 Message-ID: <035801d99641$43215980$c9640c80$@nextmovesoftware.com> MIME-Version: 1.0 X-Mailer: Microsoft Outlook 16.0 Content-Language: en-gb Thread-Index: AdmWQH36UVvbdowLQRW9Pk2DxUBdaw== X-AntiAbuse: This header was added to track abuse, please include it with any abuse report X-AntiAbuse: Primary Hostname - server.nextmovesoftware.com X-AntiAbuse: Original Domain - gcc.gnu.org X-AntiAbuse: Originator/Caller UID/GID - [47 12] / [47 12] X-AntiAbuse: Sender Address Domain - nextmovesoftware.com X-Get-Message-Sender-Via: server.nextmovesoftware.com: authenticated_id: roger@nextmovesoftware.com X-Authenticated-Sender: server.nextmovesoftware.com: roger@nextmovesoftware.com X-Source: X-Source-Args: X-Source-Dir: X-Spam-Status: No, score=-10.9 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, DKIM_VALID_EF, GIT_PATCH_0, KAM_SHORT, RCVD_IN_BARRACUDACENTRAL, SPF_HELO_NONE, SPF_PASS, TXREP, T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: gcc-patches-bounces+patchwork=sourceware.org@gcc.gnu.org Sender: "Gcc-patches" This patch fixes PR target/110083, an ICE-on-valid regression exposed by my recent PTEST improvements (to address PR target/109973). The latent bug (admittedly mine) is that the scalar-to-vector (STV) pass doesn't update or delete REG_EQUAL notes attached to COMPARE instructions. As a result the operands of COMPARE would be mismatched, with the register transformed to V1TImode, but the immediate operand left as const_wide_int, which is valid for TImode but not V1TImode. This remained latent when the STV conversion converted the mode of the COMPARE to CCmode, with later passes recognizing the REG_EQUAL note is obviously invalid as the modes didn't match, but now that we (correctly) preserve the CCZmode on COMPARE, the mismatched operand modes trigger a sanity checking ICE downstream. Fixed by updating (or deleting) any REG_EQUAL notes in convert_compare. Before: (expr_list:REG_EQUAL (compare:CCZ (reg:V1TI 119 [ ivin.29_38 ]) (const_wide_int 0x80000000000000000000000000000000)) After: (expr_list:REG_EQUAL (compare:CCZ (reg:V1TI 119 [ ivin.29_38 ]) (const_vector:V1TI [ (const_wide_int 0x80000000000000000000000000000000) ])) This patch has been tested on x86_64-pc-linux-gnu with make bootstrap and make -k check, both with and without --target_board=unix{-m32} with no new failures. Ok for mainline? 2023-06-03 Roger Sayle gcc/ChangeLog PR target/110083 * config/i386/i386-features.cc (scalar_chain::convert_compare): Update or delete REG_EQUAL notes, converting CONST_INT and CONST_WIDE_INT immediate operands to a suitable CONST_VECTOR. gcc/testsuite/ChangeLog PR target/110083 * gcc.target/i386/pr110083.c: New test case. Roger diff --git a/gcc/config/i386/i386-features.cc b/gcc/config/i386/i386-features.cc index 3417f6b..4a3b07a 100644 --- a/gcc/config/i386/i386-features.cc +++ b/gcc/config/i386/i386-features.cc @@ -980,6 +980,39 @@ rtx scalar_chain::convert_compare (rtx op1, rtx op2, rtx_insn *insn) { rtx src, tmp; + + /* Handle any REG_EQUAL notes. */ + tmp = find_reg_equal_equiv_note (insn); + if (tmp) + { + if (GET_CODE (XEXP (tmp, 0)) == COMPARE + && GET_MODE (XEXP (tmp, 0)) == CCZmode + && REG_P (XEXP (XEXP (tmp, 0), 0))) + { + rtx *op = &XEXP (XEXP (tmp, 0), 1); + if (CONST_SCALAR_INT_P (*op)) + { + if (constm1_operand (*op, GET_MODE (*op))) + *op = CONSTM1_RTX (vmode); + else + { + unsigned n = GET_MODE_NUNITS (vmode); + rtx *v = XALLOCAVEC (rtx, n); + v[0] = *op; + for (unsigned i = 1; i < n; ++i) + v[i] = const0_rtx; + *op = gen_rtx_CONST_VECTOR (vmode, gen_rtvec_v (n, v)); + } + tmp = NULL_RTX; + } + else if (REG_P (*op)) + tmp = NULL_RTX; + } + + if (tmp) + remove_note (insn, tmp); + } + /* Comparison against anything other than zero, requires an XOR. */ if (op2 != const0_rtx) { diff --git a/gcc/testsuite/gcc.target/i386/pr110083.c b/gcc/testsuite/gcc.target/i386/pr110083.c new file mode 100644 index 0000000..4b38ca8 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/pr110083.c @@ -0,0 +1,26 @@ +/* { dg-do compile { target int128 } } */ +/* { dg-options "-O2 -msse4 -mstv -mno-stackrealign" } */ +typedef int TItype __attribute__ ((mode (TI))); +typedef unsigned int UTItype __attribute__ ((mode (TI))); + +void foo (void) +{ + static volatile TItype ivin, ivout; + static volatile float fv1, fv2; + ivin = ((TItype) (UTItype) ~ (((UTItype) ~ (UTItype) 0) >> 1)); + fv1 = ((TItype) (UTItype) ~ (((UTItype) ~ (UTItype) 0) >> 1)); + fv2 = ivin; + ivout = fv2; + if (ivin != ((TItype) (UTItype) ~ (((UTItype) ~ (UTItype) 0) >> 1)) + || ((((128) > sizeof (TItype) * 8 - 1)) && ivout != ivin) + || ((((128) > sizeof (TItype) * 8 - 1)) + && ivout != + ((TItype) (UTItype) ~ (((UTItype) ~ (UTItype) 0) >> 1))) + || fv1 != + (float) ((TItype) (UTItype) ~ (((UTItype) ~ (UTItype) 0) >> 1)) + || fv2 != + (float) ((TItype) (UTItype) ~ (((UTItype) ~ (UTItype) 0) >> 1)) + || fv1 != fv2) + __builtin_abort (); +} +