diff mbox series

[x86_64] PR target/106450: Tweak timode_remove_non_convertible_regs.

Message ID 008b01d8a2a1$2ab6ff60$8024fe20$@nextmovesoftware.com
State New
Headers
Series [x86_64] PR target/106450: Tweak timode_remove_non_convertible_regs. |

Commit Message

Roger Sayle July 28, 2022, 4:43 p.m. UTC 
  This patch resolves PR target/106450, some more fall-out from more
aggressive TImode scalar-to-vector (STV) optimizations.  I continue
to be caught out by how far TImode STV has diverged from DImode/SImode
STV, and therefore requires additional (unexpected) tweaking.  Many
thanks to H.J. Lu for pointing out timode_remove_non_convertible_regs
needs to be extended to handle XOR (and other new operations).

Unhelpfully the comment above this function states that it's the TImode
version of "remove_non_convertible_regs", which doesn't exist anymore,
so I've resurrected an explanatory comment from the git history.
By refactoring the checks for hard regs and already "marked" regs
into timode_check_non_convertible_regs itself, all its callers are
simplified.  This patch then uses GET_RTX_CLASS to generically handle
unary and binary operations, calling timode_check_non_convertible_regs
on each TImode register operand in the single_set's SET_SRC.

This patch has been tested on x86_64-pc-linux-gnu with make bootstrap
and make -k check, both with and without --target_board=unix{-m32},
with no new failures.  Ok for mainline?


2022-07-28  Roger Sayle  <roger@nextmovesoftware.com>

gcc/ChangeLog
        PR target/106450
        * config/i386/i386-features.cc (timode_check_non_convertible_regs):
        Do nothing if REGNO is set in the REGS bitmap, or is a hard reg.
        (timode_remove_non_convertible_regs): Update comment.
        Call timode_check_non_convertible_regs on all register operands
        of supported (binary and unary) operations.

gcc/testsuite/ChangeLog
        PR target/106450
        * gcc.target/i386/pr106450.c: New test case.


Thanks in advance,
Roger
--

Comments

H.J. Lu July 28, 2022, 4:55 p.m. UTC | #1 
On Thu, Jul 28, 2022 at 9:43 AM Roger Sayle <roger@nextmovesoftware.com> wrote:
>
>
> This patch resolves PR target/106450, some more fall-out from more
> aggressive TImode scalar-to-vector (STV) optimizations.  I continue
> to be caught out by how far TImode STV has diverged from DImode/SImode
> STV, and therefore requires additional (unexpected) tweaking.  Many
> thanks to H.J. Lu for pointing out timode_remove_non_convertible_regs
> needs to be extended to handle XOR (and other new operations).
>
> Unhelpfully the comment above this function states that it's the TImode
> version of "remove_non_convertible_regs", which doesn't exist anymore,
> so I've resurrected an explanatory comment from the git history.
> By refactoring the checks for hard regs and already "marked" regs
> into timode_check_non_convertible_regs itself, all its callers are
> simplified.  This patch then uses GET_RTX_CLASS to generically handle
> unary and binary operations, calling timode_check_non_convertible_regs
> on each TImode register operand in the single_set's SET_SRC.
>
> This patch has been tested on x86_64-pc-linux-gnu with make bootstrap
> and make -k check, both with and without --target_board=unix{-m32},
> with no new failures.  Ok for mainline?
>
>
> 2022-07-28  Roger Sayle  <roger@nextmovesoftware.com>
>
> gcc/ChangeLog
>         PR target/106450
>         * config/i386/i386-features.cc (timode_check_non_convertible_regs):
>         Do nothing if REGNO is set in the REGS bitmap, or is a hard reg.
>         (timode_remove_non_convertible_regs): Update comment.
>         Call timode_check_non_convertible_regs on all register operands
>         of supported (binary and unary) operations.

Should we use

df_ref ref;
FOR_EACH_INSN_USE (ref, insn)
   if (!DF_REF_REG_MEM_P (ref))
     timode_check_non_convertible_regs (candidates, regs,
              DF_REF_REGNO (ref));

to check each use?

> gcc/testsuite/ChangeLog
>         PR target/106450
>         * gcc.target/i386/pr106450.c: New test case.
>
>
> Thanks in advance,
> Roger
> --
>
diff mbox series

Patch

diff --git a/gcc/config/i386/i386-features.cc b/gcc/config/i386/i386-features.cc
index aa5de71..2a4097c 100644
--- a/gcc/config/i386/i386-features.cc
+++ b/gcc/config/i386/i386-features.cc
@@ -1808,6 +1808,11 @@  static void
 timode_check_non_convertible_regs (bitmap candidates, bitmap regs,
 				   unsigned int regno)
 {
+  /* Do nothing if REGNO is already in REGS or is a hard reg.  */
+  if (bitmap_bit_p (regs, regno)
+      || HARD_REGISTER_NUM_P (regno))
+    return;
+
   for (df_ref def = DF_REG_DEF_CHAIN (regno);
        def;
        def = DF_REF_NEXT_REG (def))
@@ -1843,7 +1848,13 @@  timode_check_non_convertible_regs (bitmap candidates, bitmap regs,
     }
 }
 
-/* The TImode version of remove_non_convertible_regs.  */
+/* For a given bitmap of insn UIDs scans all instructions and
+   remove insn from CANDIDATES in case it has both convertible
+   and not convertible definitions.
+
+   All insns in a bitmap are conversion candidates according to
+   scalar_to_vector_candidate_p.  Currently it implies all insns
+   are single_set.  */
 
 static void
 timode_remove_non_convertible_regs (bitmap candidates)
@@ -1861,21 +1872,40 @@  timode_remove_non_convertible_regs (bitmap candidates)
 	rtx dest = SET_DEST (def_set);
 	rtx src = SET_SRC (def_set);
 
-	if ((!REG_P (dest)
-	     || bitmap_bit_p (regs, REGNO (dest))
-	     || HARD_REGISTER_P (dest))
-	    && (!REG_P (src)
-		|| bitmap_bit_p (regs, REGNO (src))
-		|| HARD_REGISTER_P (src)))
-	  continue;
-
 	if (REG_P (dest))
 	  timode_check_non_convertible_regs (candidates, regs,
 					     REGNO (dest));
 
-	if (REG_P (src))
-	  timode_check_non_convertible_regs (candidates, regs,
-					     REGNO (src));
+	switch (GET_RTX_CLASS (GET_CODE (src)))
+	  {
+	  case RTX_OBJ:
+	    if (REG_P (src))
+	      timode_check_non_convertible_regs (candidates, regs,
+						 REGNO (src));
+	    break;
+
+	  case RTX_UNARY:
+	    if (REG_P (XEXP (src, 0))
+		&& GET_MODE (XEXP (src, 0)) == TImode)
+	      timode_check_non_convertible_regs (candidates, regs,
+						 REGNO (XEXP (src, 0)));
+	    break;
+
+	  case RTX_COMM_ARITH:
+	  case RTX_BIN_ARITH:
+	    if (REG_P (XEXP (src, 0))
+		&& GET_MODE (XEXP (src, 0)) == TImode)
+	      timode_check_non_convertible_regs (candidates, regs,
+						 REGNO (XEXP (src, 0)));
+	    if (REG_P (XEXP (src, 1))
+		&& GET_MODE (XEXP (src, 1)) == TImode)
+	      timode_check_non_convertible_regs (candidates, regs,
+						 REGNO (XEXP (src, 1)));
+	    break;
+
+	  default:
+  	    break;
+	  }
       }
 
     EXECUTE_IF_SET_IN_BITMAP (regs, 0, id, bi)
diff --git a/gcc/testsuite/gcc.target/i386/pr106450.c b/gcc/testsuite/gcc.target/i386/pr106450.c
new file mode 100644
index 0000000..d16231f
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/pr106450.c
@@ -0,0 +1,14 @@ 
+/* { dg-do compile { target int128 } } */
+/* { dg-options "-O2 -fsplit-paths" } */
+
+__int128 n;
+
+__attribute__ ((simd)) void
+foo (void)
+{
+  __int128 uninitialized;
+  unsigned __int128 *p = &n;
+
+  n >>= *p ? : 2;
+  n |= uninitialized;
+}