diff --git a/gcc/config/aarch64/aarch64.md b/gcc/config/aarch64/aarch64.md
index 8e844beaee9..b3452d89989 100644
--- a/gcc/config/aarch64/aarch64.md
+++ b/gcc/config/aarch64/aarch64.md
@@ -1915,11 +1915,12 @@
 )
 
 ;; Match MOVK as a normal AND and IOR operation.
-(define_insn "aarch64_movk<mode>"
+(define_insn "*aarch64_movk<mode>"
   [(set (match_operand:GPI 0 "register_operand" "=r")
-	(ior:GPI (and:GPI (match_operand:GPI 1 "register_operand" "0")
-			  (match_operand:GPI 2 "const_int_operand"))
-		 (match_operand:GPI 3 "const_int_operand")))]
+	(any_or_plus:GPI
+	  (and:GPI (match_operand:GPI 1 "register_operand" "0")
+		   (match_operand:GPI 2 "const_int_operand"))
+	  (match_operand:GPI 3 "const_int_operand")))]
   "aarch64_movk_shift (rtx_mode_t (operands[2], <MODE>mode),
 		       rtx_mode_t (operands[3], <MODE>mode)) >= 0"
   {
diff --git a/gcc/testsuite/gcc.target/aarch64/movk_4.c b/gcc/testsuite/gcc.target/aarch64/movk_4.c
new file mode 100644
index 00000000000..1173e58cf0f
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/movk_4.c
@@ -0,0 +1,12 @@
+/* { dg-do compile } */
+/* { dg-options "-O2" } */
+
+unsigned int iorhi(unsigned int x) { return (x & 0xffff) | 0x20000; }
+unsigned int xorhi(unsigned int x) { return (x & 0xffff) ^ 0x20000; }
+unsigned int addhi(unsigned int x) { return (x & 0xffff) + 0x20000; }
+
+unsigned int iorlo(unsigned int x) { return (x & ~0xffff) | 0x02; }
+unsigned int xorlo(unsigned int x) { return (x & ~0xffff) ^ 0x02; }
+unsigned int addlo(unsigned int x) { return (x & ~0xffff) + 0x02; }
+
+/* { dg-final { scan-assembler-times "movk\t" 6 } } */