From patchwork Sun Jun 30 22:14:25 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Roger Sayle X-Patchwork-Id: 93100 Return-Path: X-Original-To: patchwork@sourceware.org Delivered-To: patchwork@sourceware.org Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id B885F388264E for ; Sun, 30 Jun 2024 22:15:02 +0000 (GMT) X-Original-To: gcc-patches@gcc.gnu.org Delivered-To: gcc-patches@gcc.gnu.org Received: from server.nextmovesoftware.com (server.nextmovesoftware.com [69.48.154.134]) by sourceware.org (Postfix) with ESMTPS id EDDDC3858C39 for ; Sun, 30 Jun 2024 22:14:29 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.2 sourceware.org EDDDC3858C39 Authentication-Results: sourceware.org; dmarc=none (p=none dis=none) header.from=nextmovesoftware.com Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=nextmovesoftware.com ARC-Filter: OpenARC Filter v1.0.0 sourceware.org EDDDC3858C39 Authentication-Results: server2.sourceware.org; arc=none smtp.remote-ip=69.48.154.134 ARC-Seal: i=1; a=rsa-sha256; d=sourceware.org; s=key; t=1719785672; cv=none; b=cgI4WfdkdOf2ZeCVcVghntSjxvQU63zqtncf+Mjb3wiks0dhgwjfinqh/0nkKblGDMUcvjpvSgjz5kSuOilEhWL/OwZES+j493GFgAPrmftXt/OufHN3oa6lRNwaoY+M3dkBITwK6mAmEHTayGWdgT1aO1JUZv2hvosaIE11B14= ARC-Message-Signature: i=1; a=rsa-sha256; d=sourceware.org; s=key; t=1719785672; c=relaxed/simple; bh=Cpr+eCZ7Z8z709i8YHrcpSe2O7s6FEnpkM3+i0SiW3s=; h=DKIM-Signature:From:To:Subject:Date:Message-ID:MIME-Version; b=wsFK0lSa+uKB47Amfvvzwag8c3gts8mmknWlVdCyrs0j+CRV0Whk5JFMrSMzppKTTV3U3LHg3YZ9uVB3w33fIUPn5RLW95buFAuFX0FWD+S89g6x/hYXOV1RJr4i5BpqxfDMD7V+SdvOrfYjJSn7VEByThfN0IN3iF4+tKB0Izs= ARC-Authentication-Results: i=1; server2.sourceware.org DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=nextmovesoftware.com; s=default; h=Content-Type:MIME-Version:Message-ID: Date:Subject:Cc:To:From:Sender:Reply-To:Content-Transfer-Encoding:Content-ID: Content-Description:Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc :Resent-Message-ID:In-Reply-To:References:List-Id:List-Help:List-Unsubscribe: List-Subscribe:List-Post:List-Owner:List-Archive; bh=uqqzOXypUlRu4gGF/1728sg7FQ8Oq6RJcWdPHanCPAk=; b=gr9i4jjAC/PEdlnNO9x/271UDi wvV0Hd3/KbX5tVyo+738/1YwipG3AmnnV8/9SmflO5dyuTeZt4abBREmMoV6r1i1QLSxq8cqWZSUn e06L9qtFEPcmDkuKqCeQHzo8T0FrlhV4IzUjYB5rtHZb8XNP/wmqCPFHQZ5nDrCd947+9DVHTuR/6 y+yezBhDRq7ucPyzCDFUpNFN4sPgKaKjzA+sa4O4oRtioL8nXwgeh1OADMcJAqsvfbdokuq0lUYpi Wg/MNQ5aVKl6IdV98GAzf82wH+wHW+dRNioaPiysjOefuIepAOTIIvQvCt5p90vrtJSum7PYMsaGy /MqCY4HQ==; Received: from [168.86.198.82] (port=60397 helo=Dell) by server.nextmovesoftware.com with esmtpsa (TLS1.2) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.97.1) (envelope-from ) id 1sO2oX-00000003n8p-1Qw0; Sun, 30 Jun 2024 18:14:29 -0400 From: "Roger Sayle" To: Cc: "'Hongtao Liu'" Subject: [x86 SSE PATCH] Remove legacy ternlog patterns from sse.md Date: Sun, 30 Jun 2024 23:14:25 +0100 Message-ID: <003301dacb3a$df5d8240$9e1886c0$@nextmovesoftware.com> MIME-Version: 1.0 X-Mailer: Microsoft Outlook 16.0 Thread-Index: AdrLOiqVTlrYlbRLSr6Ywg34X3nDDg== Content-Language: en-gb X-AntiAbuse: This header was added to track abuse, please include it with any abuse report X-AntiAbuse: Primary Hostname - server.nextmovesoftware.com X-AntiAbuse: Original Domain - gcc.gnu.org X-AntiAbuse: Originator/Caller UID/GID - [47 12] / [47 12] X-AntiAbuse: Sender Address Domain - nextmovesoftware.com X-Get-Message-Sender-Via: server.nextmovesoftware.com: authenticated_id: roger@nextmovesoftware.com X-Authenticated-Sender: server.nextmovesoftware.com: roger@nextmovesoftware.com X-Source: X-Source-Args: X-Source-Dir: X-Spam-Status: No, score=-9.8 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, DKIM_VALID_EF, GIT_PATCH_0, KAM_SHORT, MEDICAL_SUBJECT, SPF_HELO_NONE, SPF_PASS, TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.30 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: gcc-patches-bounces+patchwork=sourceware.org@gcc.gnu.org As promised here's the final ternlog clean-up, that deletes the now obsolete legacy patterns and mode iterators from sse.md. It also updates the surviving ternlog patterns to consistently use decimal immediate operands (instead of hexadecimal), and updates one last test case to match this change. This patch has been tested on x86_64-pc-linux-gnu with make bootstrap and make -k check, both with and without --target_board=unix{-m32} with no new failures. Ok for mainline? 2024-06-30 Roger Sayle gcc/ChangeLog * config/i386/sse.md (*vmov_constm1_pternlog_false_dep): Use decimal instead hexadecimal. (*_cvtmask2): Likewise. (*_cvtmask2_pternlog_false_dep): Likewise. (any_logic1): Delete define_code_iterator. (any_logic2): Likewise. (logic_op): Delete define_code_attr. (*_vpternlog_1): Delete define_insn_and_split. (*_vpternlog_2): Likewise. (*_vpternlog_3): Likewise. (one_cmpl2): Use decimal. (*one_cmpl2_pternlog_false_dep): Likewise. (*andnot3): Likewise. (*iornot3): Delete define_insn. (*xnor3): Likewise. (andor): Delete define_code_iterator. (nlogic): Delete define_code_attr. (ternlog_nlogic): Likewise. (*3): Delete define_insn. gcc/testsuite/ChangeLog * gcc.target/i386/pr100711-6.c: Update to check for decimal immediate operand in ternlog, not hexadecimal. Thanks again, Roger diff --git a/gcc/config/i386/sse.md b/gcc/config/i386/sse.md index a94ec3c..9a52609 100644 --- a/gcc/config/i386/sse.md +++ b/gcc/config/i386/sse.md @@ -1455,7 +1455,7 @@ (match_operand:VMOVE 1 "int_float_vector_all_ones_operand" "")) (unspec [(match_operand:VMOVE 2 "register_operand" "0")] UNSPEC_INSN_FALSE_DEP)] "TARGET_AVX512VL || == 64" - "vpternlogd\t{$0xFF, %0, %0, %0|%0, %0, %0, 0xFF}" + "vpternlogd\t{$255, %0, %0, %0|%0, %0, %0, 255}" [(set_attr "type" "sselog1") (set_attr "prefix" "evex")]) @@ -10001,7 +10001,7 @@ "TARGET_AVX512F" "@ vpmovm2\t{%1, %0|%0, %1} - vpternlog\t{$0x81, %0, %0, %0%{%1%}%{z%}|%0%{%1%}%{z%}, %0, %0, 0x81}" + vpternlog\t{$129, %0, %0, %0%{%1%}%{z%}|%0%{%1%}%{z%}, %0, %0, 129}" "&& !TARGET_AVX512DQ && reload_completed && optimize_function_for_speed_p (cfun)" [(set (match_dup 0) (match_dup 4)) @@ -10026,7 +10026,7 @@ (match_operand: 1 "register_operand" "Yk"))) (unspec [(match_operand:VI48_AVX512VL 4 "register_operand" "0")] UNSPEC_INSN_FALSE_DEP)] "TARGET_AVX512F && !TARGET_AVX512DQ" - "vpternlog\t{$0x81, %0, %0, %0%{%1%}%{z%}|%0%{%1%}%{z%}, %0, %0, 0x81}" + "vpternlog\t{$129, %0, %0, %0%{%1%}%{z%}|%0%{%1%}%{z%}, %0, %0, 129}" [(set_attr "length_immediate" "1") (set_attr "prefix" "evex") (set_attr "mode" "")]) @@ -13353,20 +13353,6 @@ UNSPEC_VTERNLOG))] "substitute_vpternlog_operands (operands);") -;; There must be lots of other combinations like -;; -;; (any_logic:V -;; (any_logic:V op1 op2) -;; (any_logic:V op1 op3)) -;; -;; (any_logic:V -;; (any_logic:V -;; (any_logic:V op1, op2) -;; op3) -;; op1) -;; -;; and so on. - (define_insn_and_split "*_vpternlog_0" [(set (match_operand:V 0 "register_operand") (match_operand:V 1 "ternlog_operand"))] @@ -13387,226 +13373,6 @@ DONE; }) -(define_code_iterator any_logic1 [and ior xor]) -(define_code_iterator any_logic2 [and ior xor]) -(define_code_attr logic_op [(and "&") (ior "|") (xor "^")]) - -(define_insn_and_split "*_vpternlog_1" - [(set (match_operand:V 0 "register_operand") - (any_logic:V - (any_logic1:V - (match_operand:V 1 "regmem_or_bitnot_regmem_operand") - (match_operand:V 2 "regmem_or_bitnot_regmem_operand")) - (any_logic2:V - (match_operand:V 3 "regmem_or_bitnot_regmem_operand") - (match_operand:V 4 "regmem_or_bitnot_regmem_operand"))))] - "( == 64 || TARGET_AVX512VL - || (TARGET_AVX512F && TARGET_EVEX512 && !TARGET_PREFER_AVX256)) - && ix86_pre_reload_split () - && (rtx_equal_p (STRIP_UNARY (operands[1]), - STRIP_UNARY (operands[4])) - || rtx_equal_p (STRIP_UNARY (operands[2]), - STRIP_UNARY (operands[4])) - || rtx_equal_p (STRIP_UNARY (operands[1]), - STRIP_UNARY (operands[3])) - || rtx_equal_p (STRIP_UNARY (operands[2]), - STRIP_UNARY (operands[3])))" - "#" - "&& 1" - [(set (match_dup 0) - (unspec:V - [(match_dup 6) - (match_dup 2) - (match_dup 1) - (match_dup 5)] - UNSPEC_VTERNLOG))] -{ - /* VPTERNLOGD reg6, reg2, reg1, imm8. */ - int reg6 = 0xF0; - int reg2 = 0xCC; - int reg1 = 0xAA; - int reg3 = 0; - int reg4 = 0; - int reg_mask, tmp1, tmp2; - if (rtx_equal_p (STRIP_UNARY (operands[1]), - STRIP_UNARY (operands[4]))) - { - reg4 = reg1; - reg3 = reg6; - operands[6] = operands[3]; - } - else if (rtx_equal_p (STRIP_UNARY (operands[2]), - STRIP_UNARY (operands[4]))) - { - reg4 = reg2; - reg3 = reg6; - operands[6] = operands[3]; - } - else if (rtx_equal_p (STRIP_UNARY (operands[1]), - STRIP_UNARY (operands[3]))) - { - reg4 = reg6; - reg3 = reg1; - operands[6] = operands[4]; - } - else - { - reg4 = reg6; - reg3 = reg2; - operands[6] = operands[4]; - } - - reg1 = UNARY_P (operands[1]) ? ~reg1 : reg1; - reg2 = UNARY_P (operands[2]) ? ~reg2 : reg2; - reg3 = UNARY_P (operands[3]) ? ~reg3 : reg3; - reg4 = UNARY_P (operands[4]) ? ~reg4 : reg4; - - tmp1 = reg1 reg2; - tmp2 = reg3 reg4; - reg_mask = tmp1 tmp2; - reg_mask &= 0xFF; - - operands[1] = STRIP_UNARY (operands[1]); - operands[2] = STRIP_UNARY (operands[2]); - operands[6] = STRIP_UNARY (operands[6]); - if (!register_operand (operands[2], mode)) - operands[2] = force_reg (mode, operands[2]); - if (!register_operand (operands[6], mode)) - operands[6] = force_reg (mode, operands[6]); - operands[5] = GEN_INT (reg_mask); -}) - -(define_insn_and_split "*_vpternlog_2" - [(set (match_operand:V 0 "register_operand") - (any_logic:V - (any_logic1:V - (any_logic2:V - (match_operand:V 1 "regmem_or_bitnot_regmem_operand") - (match_operand:V 2 "regmem_or_bitnot_regmem_operand")) - (match_operand:V 3 "regmem_or_bitnot_regmem_operand")) - (match_operand:V 4 "regmem_or_bitnot_regmem_operand")))] - "( == 64 || TARGET_AVX512VL - || (TARGET_AVX512F && TARGET_EVEX512 && !TARGET_PREFER_AVX256)) - && ix86_pre_reload_split () - && (rtx_equal_p (STRIP_UNARY (operands[1]), - STRIP_UNARY (operands[4])) - || rtx_equal_p (STRIP_UNARY (operands[2]), - STRIP_UNARY (operands[4])) - || rtx_equal_p (STRIP_UNARY (operands[1]), - STRIP_UNARY (operands[3])) - || rtx_equal_p (STRIP_UNARY (operands[2]), - STRIP_UNARY (operands[3])))" - "#" - "&& 1" - [(set (match_dup 0) - (unspec:V - [(match_dup 6) - (match_dup 2) - (match_dup 1) - (match_dup 5)] - UNSPEC_VTERNLOG))] -{ - /* VPTERNLOGD reg6, reg2, reg1, imm8. */ - int reg6 = 0xF0; - int reg2 = 0xCC; - int reg1 = 0xAA; - int reg3 = 0; - int reg4 = 0; - int reg_mask, tmp1, tmp2; - if (rtx_equal_p (STRIP_UNARY (operands[1]), - STRIP_UNARY (operands[4]))) - { - reg4 = reg1; - reg3 = reg6; - operands[6] = operands[3]; - } - else if (rtx_equal_p (STRIP_UNARY (operands[2]), - STRIP_UNARY (operands[4]))) - { - reg4 = reg2; - reg3 = reg6; - operands[6] = operands[3]; - } - else if (rtx_equal_p (STRIP_UNARY (operands[1]), - STRIP_UNARY (operands[3]))) - { - reg4 = reg6; - reg3 = reg1; - operands[6] = operands[4]; - } - else - { - reg4 = reg6; - reg3 = reg2; - operands[6] = operands[4]; - } - - reg1 = UNARY_P (operands[1]) ? ~reg1 : reg1; - reg2 = UNARY_P (operands[2]) ? ~reg2 : reg2; - reg3 = UNARY_P (operands[3]) ? ~reg3 : reg3; - reg4 = UNARY_P (operands[4]) ? ~reg4 : reg4; - - tmp1 = reg1 reg2; - tmp2 = tmp1 reg3; - reg_mask = tmp2 reg4; - reg_mask &= 0xFF; - - operands[1] = STRIP_UNARY (operands[1]); - operands[2] = STRIP_UNARY (operands[2]); - operands[6] = STRIP_UNARY (operands[6]); - operands[5] = GEN_INT (reg_mask); - if (!register_operand (operands[2], mode)) - operands[2] = force_reg (mode, operands[2]); - if (!register_operand (operands[6], mode)) - operands[6] = force_reg (mode, operands[6]); - -}) - -(define_insn_and_split "*_vpternlog_3" - [(set (match_operand:V 0 "register_operand") - (any_logic:V - (any_logic1:V - (match_operand:V 1 "regmem_or_bitnot_regmem_operand") - (match_operand:V 2 "regmem_or_bitnot_regmem_operand")) - (match_operand:V 3 "regmem_or_bitnot_regmem_operand")))] - "( == 64 || TARGET_AVX512VL - || (TARGET_AVX512F && TARGET_EVEX512 && !TARGET_PREFER_AVX256)) - && ix86_pre_reload_split ()" - "#" - "&& 1" - [(set (match_dup 0) - (unspec:V - [(match_dup 3) - (match_dup 2) - (match_dup 1) - (match_dup 4)] - UNSPEC_VTERNLOG))] -{ - /* VPTERNLOGD reg3, reg2, reg1, imm8. */ - int reg3 = 0xF0; - int reg2 = 0xCC; - int reg1 = 0xAA; - int reg_mask, tmp1; - - reg1 = UNARY_P (operands[1]) ? ~reg1 : reg1; - reg2 = UNARY_P (operands[2]) ? ~reg2 : reg2; - reg3 = UNARY_P (operands[3]) ? ~reg3 : reg3; - - tmp1 = reg1 reg2; - reg_mask = tmp1 reg3; - reg_mask &= 0xFF; - - operands[1] = STRIP_UNARY (operands[1]); - operands[2] = STRIP_UNARY (operands[2]); - operands[3] = STRIP_UNARY (operands[3]); - operands[4] = GEN_INT (reg_mask); - if (!register_operand (operands[2], mode)) - operands[2] = force_reg (mode, operands[2]); - if (!register_operand (operands[3], mode)) - operands[3] = force_reg (mode, operands[3]); -}) - - (define_expand "_vternlog_mask" [(set (match_operand:VI48_AVX512VL 0 "register_operand") (vec_merge:VI48_AVX512VL @@ -18029,9 +17795,9 @@ || mode == DImode)" { if (TARGET_AVX512VL) - return "vpternlog\t{$0x55, %1, %0, %0|%0, %0, %1, 0x55}"; + return "vpternlog\t{$85, %1, %0, %0|%0, %0, %1, 85}"; else - return "vpternlog\t{$0x55, %g1, %g0, %g0|%g0, %g0, %g1, 0x55}"; + return "vpternlog\t{$85, %g1, %g0, %g0|%g0, %g0, %g1, 85}"; } "&& reload_completed && !REG_P (operands[1]) && ! && optimize_insn_for_speed_p ()" @@ -18093,9 +17859,9 @@ "TARGET_AVX512F && ( == 64 || TARGET_AVX512VL || TARGET_EVEX512)" { if (TARGET_AVX512VL) - return "vpternlog\t{$0x55, %1, %0, %0|%0, %0, %1, 0x55}"; + return "vpternlog\t{$85, %1, %0, %0|%0, %0, %1, 85}"; else - return "vpternlog\t{$0x55, %g1, %g0, %g0|%g0, %g0, %g1, 0x55}"; + return "vpternlog\t{$85, %g1, %g0, %g0|%g0, %g0, %g1, 85}"; } [(set_attr "type" "sselog") (set_attr "prefix" "evex") @@ -18218,9 +17984,9 @@ tmp = "pternlog"; ssesuffix = ""; if (which_alternative != 4 || TARGET_AVX512VL) - ops = "v%s%s\t{$0x44, %%1, %%2, %%0|%%0, %%2, %%1, $0x44}"; + ops = "v%s%s\t{$68, %%1, %%2, %%0|%%0, %%2, %%1, 68}"; else - ops = "v%s%s\t{$0x44, %%g1, %%g2, %%g0|%%g0, %%g2, %%g1, $0x44}"; + ops = "v%s%s\t{$68, %%g1, %%g2, %%g0|%%g0, %%g2, %%g1, 68}"; break; default: gcc_unreachable (); @@ -18608,98 +18374,6 @@ operands[2] = force_reg (V1TImode, CONSTM1_RTX (V1TImode)); }) -(define_insn "*iornot3" - [(set (match_operand:VI 0 "register_operand" "=v,v,v,v") - (ior:VI - (not:VI - (match_operand:VI 1 "bcst_vector_operand" "0,m, 0,vBr")) - (match_operand:VI 2 "bcst_vector_operand" "m,0,vBr, 0")))] - "( == 64 || TARGET_AVX512VL - || (TARGET_AVX512F && TARGET_EVEX512 && !TARGET_PREFER_AVX256)) - && (register_operand (operands[1], mode) - || register_operand (operands[2], mode))" -{ - if (!register_operand (operands[1], mode)) - { - if (TARGET_AVX512VL) - return "vpternlog\t{$0xdd, %1, %2, %0|%0, %2, %1, 0xdd}"; - return "vpternlog\t{$0xdd, %g1, %g2, %g0|%g0, %g2, %g1, 0xdd}"; - } - if (TARGET_AVX512VL) - return "vpternlog\t{$0xbb, %2, %1, %0|%0, %1, %2, 0xbb}"; - return "vpternlog\t{$0xbb, %g2, %g1, %g0|%g0, %g1, %g2, 0xbb}"; -} - [(set_attr "type" "sselog") - (set_attr "length_immediate" "1") - (set_attr "prefix" "evex") - (set (attr "mode") - (if_then_else (match_test "TARGET_AVX512VL") - (const_string "") - (const_string "XI"))) - (set (attr "enabled") - (if_then_else (eq_attr "alternative" "0,1") - (symbol_ref " == 64 || TARGET_AVX512VL") - (const_string "*")))]) - -(define_insn "*xnor3" - [(set (match_operand:VI 0 "register_operand" "=v,v") - (not:VI - (xor:VI - (match_operand:VI 1 "bcst_vector_operand" "%0, 0") - (match_operand:VI 2 "bcst_vector_operand" " m,vBr"))))] - "( == 64 || TARGET_AVX512VL - || (TARGET_AVX512F && TARGET_EVEX512 && !TARGET_PREFER_AVX256)) - && (register_operand (operands[1], mode) - || register_operand (operands[2], mode))" -{ - if (TARGET_AVX512VL) - return "vpternlog\t{$0x99, %2, %1, %0|%0, %1, %2, 0x99}"; - else - return "vpternlog\t{$0x99, %g2, %g1, %g0|%g0, %g1, %g2, 0x99}"; -} - [(set_attr "type" "sselog") - (set_attr "length_immediate" "1") - (set_attr "prefix" "evex") - (set (attr "mode") - (if_then_else (match_test "TARGET_AVX512VL") - (const_string "") - (const_string "XI"))) - (set (attr "enabled") - (if_then_else (eq_attr "alternative" "0") - (symbol_ref " == 64 || TARGET_AVX512VL") - (const_string "*")))]) - -(define_code_iterator andor [and ior]) -(define_code_attr nlogic [(and "nor") (ior "nand")]) -(define_code_attr ternlog_nlogic [(and "0x11") (ior "0x77")]) - -(define_insn "*3" - [(set (match_operand:VI 0 "register_operand" "=v,v") - (andor:VI - (not:VI (match_operand:VI 1 "bcst_vector_operand" "%0, 0")) - (not:VI (match_operand:VI 2 "bcst_vector_operand" "m,vBr"))))] - "( == 64 || TARGET_AVX512VL - || (TARGET_AVX512F && TARGET_EVEX512 && !TARGET_PREFER_AVX256)) - && (register_operand (operands[1], mode) - || register_operand (operands[2], mode))" -{ - if (TARGET_AVX512VL) - return "vpternlog\t{$, %2, %1, %0|%0, %1, %2, }"; - else - return "vpternlog\t{$, %g2, %g1, %g0|%g0, %g1, %g2, }"; -} - [(set_attr "type" "sselog") - (set_attr "length_immediate" "1") - (set_attr "prefix" "evex") - (set (attr "mode") - (if_then_else (match_test "TARGET_AVX512VL") - (const_string "") - (const_string "XI"))) - (set (attr "enabled") - (if_then_else (eq_attr "alternative" "0") - (symbol_ref " == 64 || TARGET_AVX512VL") - (const_string "*")))]) - (define_mode_iterator AVX512ZEXTMASK [(DI "TARGET_AVX512BW && TARGET_EVEX512") (SI "TARGET_AVX512BW") HI]) diff --git a/gcc/testsuite/gcc.target/i386/pr100711-6.c b/gcc/testsuite/gcc.target/i386/pr100711-6.c index 8085074..623e555 100644 --- a/gcc/testsuite/gcc.target/i386/pr100711-6.c +++ b/gcc/testsuite/gcc.target/i386/pr100711-6.c @@ -15,4 +15,4 @@ v8di foo_v8di (const long long *a) return (__extension__ (v8di) {~*a, ~*a, ~*a, ~*a, ~*a, ~*a, ~*a, ~*a}); } -/* { dg-final { scan-assembler-times "vpternlog\[dq\]\[ \\t\]+\\\$0x55, \\(%(?:eax|rdi|edi)\\)\\\{1to\[1-8\]+\\\}" 2 } } */ +/* { dg-final { scan-assembler-times "vpternlog\[dq\]\[ \\t\]+\\\$85, \\(%(?:eax|rdi|edi)\\)\\\{1to\[1-8\]+\\\}" 2 } } */