diff mbox series

[x86,SSE] Remove legacy ternlog patterns from sse.md

Message ID 003301dacb3a$df5d8240$9e1886c0$@nextmovesoftware.com
State New
Headers
Series [x86,SSE] Remove legacy ternlog patterns from sse.md |

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Commit Message

Roger Sayle June 30, 2024, 10:14 p.m. UTC 
  As promised here's the final ternlog clean-up, that deletes the now
obsolete legacy patterns and mode iterators from sse.md.  It also updates
the surviving ternlog patterns to consistently use decimal immediate
operands (instead of hexadecimal), and updates one last test case to
match this change.

This patch has been tested on x86_64-pc-linux-gnu with make bootstrap
and make -k check, both with and without --target_board=unix{-m32}
with no new failures.  Ok for mainline?


2024-06-30  Roger Sayle  <roger@nextmovesoftware.com>

gcc/ChangeLog
        * config/i386/sse.md (*vmov<mode>_constm1_pternlog_false_dep):
        Use decimal instead hexadecimal.
        (*<avx512>_cvtmask2<ssemodesuffix><mode>): Likewise.
        (*<avx512>_cvtmask2<ssemodesuffix><mode>_pternlog_false_dep):
        Likewise.
        (any_logic1): Delete define_code_iterator.
        (any_logic2): Likewise.
        (logic_op): Delete define_code_attr.
        (*<avx512>_vpternlog<mode>_1): Delete define_insn_and_split.
        (*<avx512>_vpternlog<mode>_2): Likewise.
        (*<avx512>_vpternlog<mode>_3): Likewise.
        (<mask_codefor>one_cmpl<mode>2<mask_name>): Use decimal.
        (*one_cmpl<mode>2_pternlog_false_dep): Likewise.
        (*andnot<mode>3): Likewise.
        (*iornot<mode>3): Delete define_insn.
        (*xnor<mode>3): Likewise.
        (andor): Delete define_code_iterator.
        (nlogic): Delete define_code_attr.
        (ternlog_nlogic): Likewise.
        (*<nlogic><mode>3): Delete define_insn.

gcc/testsuite/ChangeLog
        * gcc.target/i386/pr100711-6.c: Update to check for decimal
        immediate operand in ternlog, not hexadecimal.


Thanks again,
Roger
--

Comments

Hongtao Liu July 1, 2024, 3:31 a.m. UTC | #1 
On Mon, Jul 1, 2024 at 6:14 AM Roger Sayle <roger@nextmovesoftware.com> wrote:
>
>
> As promised here's the final ternlog clean-up, that deletes the now
> obsolete legacy patterns and mode iterators from sse.md.  It also updates
> the surviving ternlog patterns to consistently use decimal immediate
> operands (instead of hexadecimal), and updates one last test case to
> match this change.
>
> This patch has been tested on x86_64-pc-linux-gnu with make bootstrap
> and make -k check, both with and without --target_board=unix{-m32}
> with no new failures.  Ok for mainline?
>
>
> 2024-06-30  Roger Sayle  <roger@nextmovesoftware.com>
>
> gcc/ChangeLog
>         * config/i386/sse.md (*vmov<mode>_constm1_pternlog_false_dep):
>         Use decimal instead hexadecimal.
>         (*<avx512>_cvtmask2<ssemodesuffix><mode>): Likewise.
>         (*<avx512>_cvtmask2<ssemodesuffix><mode>_pternlog_false_dep):
>         Likewise.
>         (any_logic1): Delete define_code_iterator.
>         (any_logic2): Likewise.
>         (logic_op): Delete define_code_attr.
>         (*<avx512>_vpternlog<mode>_1): Delete define_insn_and_split.
>         (*<avx512>_vpternlog<mode>_2): Likewise.
>         (*<avx512>_vpternlog<mode>_3): Likewise.
>         (<mask_codefor>one_cmpl<mode>2<mask_name>): Use decimal.
>         (*one_cmpl<mode>2_pternlog_false_dep): Likewise.
>         (*andnot<mode>3): Likewise.
>         (*iornot<mode>3): Delete define_insn.
>         (*xnor<mode>3): Likewise.
>         (andor): Delete define_code_iterator.
>         (nlogic): Delete define_code_attr.
>         (ternlog_nlogic): Likewise.
>         (*<nlogic><mode>3): Delete define_insn.
>
> gcc/testsuite/ChangeLog
>         * gcc.target/i386/pr100711-6.c: Update to check for decimal
>         immediate operand in ternlog, not hexadecimal.
I got an ICE when bootstrapped with --enable-checking=yes,rtl,extra

../pternlog/libgcc/libgcc2.c: In function ‘__multc3’:
../pternlog/libgcc/libgcc2.c:2760:1: internal compiler error: RTL
check: access of elt 1 of 'not' with last elt 0 in recog_269, at
config/i386/sse.md:25221
 2760 | }
      | ^
0x3826791 internal_error(char const*, ...)
../pternlog/gcc/diagnostic-global-context.cc:491
0x17be383 rtl_check_failed_bounds(rtx_def const*, int, char const*,
int, char const*)
../pternlog/gcc/rtl.cc:741
0x31e8b6e recog_269
../pternlog/gcc/config/i386/sse.md:25221
0x32b6c8b recog_376
../gcc/config/i386/i386.md:1251
0x32bdc29 recog(rtx_def*, rtx_insn*, int*)
../pternlog/gcc/config/i386/sse.md:30262
0x344f1d4 recog_for_combine_1
../pternlog/gcc/combine.cc:11414
0x3453858 recog_for_combine
../pternlog/gcc/combine.cc:11684
0x33f4043 try_combine
../pternlog/gcc/combine.cc:3877
0x33e2539 combine_instructions
../pternlog/gcc/combine.cc:1300
0x34711f2 rest_of_handle_combine
../pternlog/gcc/combine.cc:15127
0x34712ae execute
../pternlog/gcc/combine.cc:15171
Please submit a full bug report, with preprocessed source (by using
-freport-bug).
Please include the complete backtrace with any bug report.


static int
recog_269 (rtx x1 ATTRIBUTE_UNUSED,
rtx_insn *insn ATTRIBUTE_UNUSED,
int *pnum_clobbers ATTRIBUTE_UNUSED)
{
  rtx * const operands ATTRIBUTE_UNUSED = &recog_data.operand[0];
  rtx x2, x3, x4, x5;
  int res ATTRIBUTE_UNUSED;
  x2 = XEXP (x1, 0);
  operands[0] = x2;
  x3 = XEXP (x1, 1);
  x4 = XEXP (x3, 1); ----> ICE here, x3 is ((not:TF (reg:TF (306))
  operands[2] = x4;

...
    case AND:
    case IOR:
    case XOR:
    case NOT:
      return recog_269 (x1, insn, pnum_clobbers);

x1 is like
 (set (reg:TF 201)
        (not:TF (reg:TF 306))

IMHO, x4 = XEXP (x3, 1); operands[2] = x4; should only be used under
specific CASE: inside recog_269, but it's hoisted out and caused ICE.
>
>
> Thanks again,
> Roger
> --
>
Hongtao Liu July 1, 2024, 6:43 a.m. UTC | #2 
> >
> > gcc/testsuite/ChangeLog
> >         * gcc.target/i386/pr100711-6.c: Update to check for decimal
> >         immediate operand in ternlog, not hexadecimal.
> I got an ICE when bootstrapped with --enable-checking=yes,rtl,extra
>

The ICE can be walked around with 2 separate define_predicates, one
with (and,ior,xor), the other with not.

.i.e.
diff --git a/gcc/config/i386/i386.cc b/gcc/config/i386/i386.cc
index bd7411190af..83055c1af5e 100644
--- a/gcc/config/i386/i386.cc
+++ b/gcc/config/i386/i386.cc
@@ -21420,7 +21420,8 @@ ix86_rtx_costs (rtx x, machine_mode mode, int
outer_code_i, int opno,
          || (TARGET_AVX512F && TARGET_EVEX512 && !TARGET_PREFER_AVX256)))
       && GET_MODE_SIZE (mode) >= 16
       && outer_code_i == SET
-      && ternlog_operand (x, mode))
+      && (ternlog_operand_0 (x, mode)
+         || ternlog_operand_1 (x, mode)))
     {
       rtx args[3];

diff --git a/gcc/config/i386/predicates.md b/gcc/config/i386/predicates.md
index a894847adaf..da20905cd1b 100644
--- a/gcc/config/i386/predicates.md
+++ b/gcc/config/i386/predicates.md
@@ -1104,8 +1104,14 @@ (define_predicate "regmem_or_bitnot_regmem_operand"
            (match_test "nonimmediate_operand (XEXP (op, 0), mode)"))))

 ;; True for expressions valid for 3-operand ternlog instructions.
-(define_predicate "ternlog_operand"
-  (and (match_code "not,and,ior,xor")
+;; Split ternlog_operand into ternlog_operand_{1,2} to avoid ICE when
+;; enabling rtl check.
+(define_predicate "ternlog_operand_0"
+  (and (match_code "and,ior,xor")
+       (match_test "ix86_ternlog_operand_p (op)")))
+
+(define_predicate "ternlog_operand_1"
+  (and (match_code "not")
        (match_test "ix86_ternlog_operand_p (op)")))

 ;; True if OP is acceptable as operand of DImode shift expander.
diff --git a/gcc/config/i386/sse.md b/gcc/config/i386/sse.md
index 4da15be8d40..2d050fc06e3 100644
--- a/gcc/config/i386/sse.md
+++ b/gcc/config/i386/sse.md
@@ -13383,7 +13383,27 @@ (define_split

 (define_insn_and_split "*<avx512>_vpternlog<mode>_0"
   [(set (match_operand:V 0 "register_operand")
-       (match_operand:V 1 "ternlog_operand"))]
+       (match_operand:V 1 "ternlog_operand_0"))]
+  "(<MODE_SIZE> == 64 || TARGET_AVX512VL
+    || (TARGET_AVX512F && TARGET_EVEX512 && !TARGET_PREFER_AVX256))
+   && ix86_pre_reload_split ()"
+  "#"
+  "&& 1"
+  [(const_int 0)]
+{
+  rtx args[3];
+  args[0] = NULL_RTX;
+  args[1] = NULL_RTX;
+  args[2] = NULL_RTX;
+  int idx = ix86_ternlog_idx (operands[1], args);
+  ix86_expand_ternlog (<MODE>mode, args[0], args[1], args[2], idx,
+                      operands[0]);
+  DONE;
+})
+
+(define_insn_and_split "*<avx512>_vpternlog<mode>_1"
+  [(set (match_operand:V 0 "register_operand")
+       (match_operand:V 1 "ternlog_operand_1"))]
   "(<MODE_SIZE> == 64 || TARGET_AVX512VL
     || (TARGET_AVX512F && TARGET_EVEX512 && !TARGET_PREFER_AVX256))
    && ix86_pre_reload_split ()"
diff mbox series

Patch

diff --git a/gcc/config/i386/sse.md b/gcc/config/i386/sse.md
index a94ec3c..9a52609 100644
--- a/gcc/config/i386/sse.md
+++ b/gcc/config/i386/sse.md
@@ -1455,7 +1455,7 @@ 
 	(match_operand:VMOVE 1 "int_float_vector_all_ones_operand" "<sseconstm1>"))
    (unspec [(match_operand:VMOVE 2 "register_operand" "0")] UNSPEC_INSN_FALSE_DEP)]
    "TARGET_AVX512VL || <MODE_SIZE> == 64"
-   "vpternlogd\t{$0xFF, %0, %0, %0|%0, %0, %0, 0xFF}"
+   "vpternlogd\t{$255, %0, %0, %0|%0, %0, %0, 255}"
   [(set_attr "type" "sselog1")
    (set_attr "prefix" "evex")])
 
@@ -10001,7 +10001,7 @@ 
   "TARGET_AVX512F"
   "@
    vpmovm2<ssemodesuffix>\t{%1, %0|%0, %1}
-   vpternlog<ssemodesuffix>\t{$0x81, %0, %0, %0%{%1%}%{z%}|%0%{%1%}%{z%}, %0, %0, 0x81}"
+   vpternlog<ssemodesuffix>\t{$129, %0, %0, %0%{%1%}%{z%}|%0%{%1%}%{z%}, %0, %0, 129}"
   "&& !TARGET_AVX512DQ && reload_completed
    && optimize_function_for_speed_p (cfun)"
   [(set (match_dup 0) (match_dup 4))
@@ -10026,7 +10026,7 @@ 
 	  (match_operand:<avx512fmaskmode> 1 "register_operand" "Yk")))
    (unspec [(match_operand:VI48_AVX512VL 4 "register_operand" "0")] UNSPEC_INSN_FALSE_DEP)]
   "TARGET_AVX512F && !TARGET_AVX512DQ"
-  "vpternlog<ssemodesuffix>\t{$0x81, %0, %0, %0%{%1%}%{z%}|%0%{%1%}%{z%}, %0, %0, 0x81}"
+  "vpternlog<ssemodesuffix>\t{$129, %0, %0, %0%{%1%}%{z%}|%0%{%1%}%{z%}, %0, %0, 129}"
   [(set_attr "length_immediate" "1")
    (set_attr "prefix" "evex")
    (set_attr "mode" "<sseinsnmode>")])
@@ -13353,20 +13353,6 @@ 
 	  UNSPEC_VTERNLOG))]
   "substitute_vpternlog_operands (operands);")
 
-;; There must be lots of other combinations like
-;;
-;; (any_logic:V
-;;   (any_logic:V op1 op2)
-;;   (any_logic:V op1 op3))
-;;
-;; (any_logic:V
-;;   (any_logic:V
-;;     (any_logic:V op1, op2)
-;;     op3)
-;;   op1)
-;;
-;; and so on.
-
 (define_insn_and_split "*<avx512>_vpternlog<mode>_0"
   [(set (match_operand:V 0 "register_operand")
 	(match_operand:V 1 "ternlog_operand"))]
@@ -13387,226 +13373,6 @@ 
   DONE;
 })
 
-(define_code_iterator any_logic1 [and ior xor])
-(define_code_iterator any_logic2 [and ior xor])
-(define_code_attr logic_op [(and "&") (ior "|") (xor "^")])
-
-(define_insn_and_split "*<avx512>_vpternlog<mode>_1"
-  [(set (match_operand:V 0 "register_operand")
-	(any_logic:V
-	  (any_logic1:V
-	    (match_operand:V 1 "regmem_or_bitnot_regmem_operand")
-	    (match_operand:V 2 "regmem_or_bitnot_regmem_operand"))
-	  (any_logic2:V
-	    (match_operand:V 3 "regmem_or_bitnot_regmem_operand")
-	    (match_operand:V 4 "regmem_or_bitnot_regmem_operand"))))]
-  "(<MODE_SIZE> == 64 || TARGET_AVX512VL
-    || (TARGET_AVX512F && TARGET_EVEX512 && !TARGET_PREFER_AVX256))
-   && ix86_pre_reload_split ()
-   && (rtx_equal_p (STRIP_UNARY (operands[1]),
-		    STRIP_UNARY (operands[4]))
-       || rtx_equal_p (STRIP_UNARY (operands[2]),
-		       STRIP_UNARY (operands[4]))
-       || rtx_equal_p (STRIP_UNARY (operands[1]),
-		       STRIP_UNARY (operands[3]))
-       || rtx_equal_p (STRIP_UNARY (operands[2]),
-		       STRIP_UNARY (operands[3])))"
-  "#"
-  "&& 1"
-  [(set (match_dup 0)
-	(unspec:V
-	  [(match_dup 6)
-	   (match_dup 2)
-	   (match_dup 1)
-	   (match_dup 5)]
-	  UNSPEC_VTERNLOG))]
-{
-  /* VPTERNLOGD reg6, reg2, reg1, imm8.  */
-  int reg6 = 0xF0;
-  int reg2 = 0xCC;
-  int reg1 = 0xAA;
-  int reg3 = 0;
-  int reg4 = 0;
-  int reg_mask, tmp1, tmp2;
-  if (rtx_equal_p (STRIP_UNARY (operands[1]),
-		   STRIP_UNARY (operands[4])))
-    {
-      reg4 = reg1;
-      reg3 = reg6;
-      operands[6] = operands[3];
-    }
-  else if (rtx_equal_p (STRIP_UNARY (operands[2]),
-		       STRIP_UNARY (operands[4])))
-    {
-      reg4 = reg2;
-      reg3 = reg6;
-      operands[6] = operands[3];
-    }
-  else if (rtx_equal_p (STRIP_UNARY (operands[1]),
-			STRIP_UNARY (operands[3])))
-    {
-      reg4 = reg6;
-      reg3 = reg1;
-      operands[6] = operands[4];
-    }
-  else
-    {
-      reg4 = reg6;
-      reg3 = reg2;
-      operands[6] = operands[4];
-    }
-
-  reg1 = UNARY_P (operands[1]) ? ~reg1 : reg1;
-  reg2 = UNARY_P (operands[2]) ? ~reg2 : reg2;
-  reg3 = UNARY_P (operands[3]) ? ~reg3 : reg3;
-  reg4 = UNARY_P (operands[4]) ? ~reg4 : reg4;
-
-  tmp1 = reg1 <any_logic1:logic_op> reg2;
-  tmp2 = reg3 <any_logic2:logic_op> reg4;
-  reg_mask = tmp1  <any_logic:logic_op> tmp2;
-  reg_mask &= 0xFF;
-
-  operands[1] = STRIP_UNARY (operands[1]);
-  operands[2] = STRIP_UNARY (operands[2]);
-  operands[6] = STRIP_UNARY (operands[6]);
-  if (!register_operand (operands[2], <MODE>mode))
-     operands[2] = force_reg (<MODE>mode, operands[2]);
-  if (!register_operand (operands[6], <MODE>mode))
-     operands[6] = force_reg (<MODE>mode, operands[6]);
-  operands[5] = GEN_INT (reg_mask);
-})
-
-(define_insn_and_split "*<avx512>_vpternlog<mode>_2"
-  [(set (match_operand:V 0 "register_operand")
-	(any_logic:V
-	  (any_logic1:V
-	    (any_logic2:V
-	      (match_operand:V 1 "regmem_or_bitnot_regmem_operand")
-	      (match_operand:V 2 "regmem_or_bitnot_regmem_operand"))
-	    (match_operand:V 3 "regmem_or_bitnot_regmem_operand"))
-	  (match_operand:V 4 "regmem_or_bitnot_regmem_operand")))]
-  "(<MODE_SIZE> == 64 || TARGET_AVX512VL
-    || (TARGET_AVX512F && TARGET_EVEX512 && !TARGET_PREFER_AVX256))
-   && ix86_pre_reload_split ()
-   && (rtx_equal_p (STRIP_UNARY (operands[1]),
-		    STRIP_UNARY (operands[4]))
-       || rtx_equal_p (STRIP_UNARY (operands[2]),
-		       STRIP_UNARY (operands[4]))
-       || rtx_equal_p (STRIP_UNARY (operands[1]),
-		       STRIP_UNARY (operands[3]))
-       || rtx_equal_p (STRIP_UNARY (operands[2]),
-		       STRIP_UNARY (operands[3])))"
-  "#"
-  "&& 1"
-  [(set (match_dup 0)
-	(unspec:V
-	  [(match_dup 6)
-	   (match_dup 2)
-	   (match_dup 1)
-	   (match_dup 5)]
-	  UNSPEC_VTERNLOG))]
-{
-  /* VPTERNLOGD reg6, reg2, reg1, imm8.  */
-  int reg6 = 0xF0;
-  int reg2 = 0xCC;
-  int reg1 = 0xAA;
-  int reg3 = 0;
-  int reg4 = 0;
-  int reg_mask, tmp1, tmp2;
-  if (rtx_equal_p (STRIP_UNARY (operands[1]),
-		   STRIP_UNARY (operands[4])))
-    {
-      reg4 = reg1;
-      reg3 = reg6;
-      operands[6] = operands[3];
-    }
-  else if (rtx_equal_p (STRIP_UNARY (operands[2]),
-		       STRIP_UNARY (operands[4])))
-    {
-      reg4 = reg2;
-      reg3 = reg6;
-      operands[6] = operands[3];
-    }
-  else if (rtx_equal_p (STRIP_UNARY (operands[1]),
-			STRIP_UNARY (operands[3])))
-    {
-      reg4 = reg6;
-      reg3 = reg1;
-      operands[6] = operands[4];
-    }
-  else
-    {
-      reg4 = reg6;
-      reg3 = reg2;
-      operands[6] = operands[4];
-    }
-
-  reg1 = UNARY_P (operands[1]) ? ~reg1 : reg1;
-  reg2 = UNARY_P (operands[2]) ? ~reg2 : reg2;
-  reg3 = UNARY_P (operands[3]) ? ~reg3 : reg3;
-  reg4 = UNARY_P (operands[4]) ? ~reg4 : reg4;
-
-  tmp1 = reg1 <any_logic2:logic_op> reg2;
-  tmp2 = tmp1 <any_logic1:logic_op> reg3;
-  reg_mask = tmp2 <any_logic:logic_op> reg4;
-  reg_mask &= 0xFF;
-
-  operands[1] = STRIP_UNARY (operands[1]);
-  operands[2] = STRIP_UNARY (operands[2]);
-  operands[6] = STRIP_UNARY (operands[6]);
-  operands[5] = GEN_INT (reg_mask);
-  if (!register_operand (operands[2], <MODE>mode))
-    operands[2] = force_reg (<MODE>mode, operands[2]);
-  if (!register_operand (operands[6], <MODE>mode))
-    operands[6] = force_reg (<MODE>mode, operands[6]);
-
-})
-
-(define_insn_and_split "*<avx512>_vpternlog<mode>_3"
-  [(set (match_operand:V 0 "register_operand")
-	(any_logic:V
-	  (any_logic1:V
-	    (match_operand:V 1 "regmem_or_bitnot_regmem_operand")
-	    (match_operand:V 2 "regmem_or_bitnot_regmem_operand"))
-	  (match_operand:V 3 "regmem_or_bitnot_regmem_operand")))]
-  "(<MODE_SIZE> == 64 || TARGET_AVX512VL
-    || (TARGET_AVX512F && TARGET_EVEX512 && !TARGET_PREFER_AVX256))
-   && ix86_pre_reload_split ()"
-  "#"
-  "&& 1"
-  [(set (match_dup 0)
-	(unspec:V
-	  [(match_dup 3)
-	   (match_dup 2)
-	   (match_dup 1)
-	   (match_dup 4)]
-	  UNSPEC_VTERNLOG))]
-{
-  /* VPTERNLOGD reg3, reg2, reg1, imm8.  */
-  int reg3 = 0xF0;
-  int reg2 = 0xCC;
-  int reg1 = 0xAA;
-  int reg_mask, tmp1;
-
-  reg1 = UNARY_P (operands[1]) ? ~reg1 : reg1;
-  reg2 = UNARY_P (operands[2]) ? ~reg2 : reg2;
-  reg3 = UNARY_P (operands[3]) ? ~reg3 : reg3;
-
-  tmp1 = reg1 <any_logic1:logic_op> reg2;
-  reg_mask = tmp1 <any_logic:logic_op> reg3;
-  reg_mask &= 0xFF;
-
-  operands[1] = STRIP_UNARY (operands[1]);
-  operands[2] = STRIP_UNARY (operands[2]);
-  operands[3] = STRIP_UNARY (operands[3]);
-  operands[4] = GEN_INT (reg_mask);
-  if (!register_operand (operands[2], <MODE>mode))
-    operands[2] = force_reg (<MODE>mode, operands[2]);
-  if (!register_operand (operands[3], <MODE>mode))
-    operands[3] = force_reg (<MODE>mode, operands[3]);
-})
-
-
 (define_expand "<avx512>_vternlog<mode>_mask"
   [(set (match_operand:VI48_AVX512VL 0 "register_operand")
 	(vec_merge:VI48_AVX512VL
@@ -18029,9 +17795,9 @@ 
        || <ssescalarmode>mode == DImode)"
 {
   if (TARGET_AVX512VL)
-    return "vpternlog<ternlogsuffix>\t{$0x55, %1, %0, %0<mask_operand3>|%0<mask_operand3>, %0, %1, 0x55}";
+    return "vpternlog<ternlogsuffix>\t{$85, %1, %0, %0<mask_operand3>|%0<mask_operand3>, %0, %1, 85}";
   else
-    return "vpternlog<ternlogsuffix>\t{$0x55, %g1, %g0, %g0<mask_operand3>|%g0<mask_operand3>, %g0, %g1, 0x55}";
+    return "vpternlog<ternlogsuffix>\t{$85, %g1, %g0, %g0<mask_operand3>|%g0<mask_operand3>, %g0, %g1, 85}";
 }
   "&& reload_completed && !REG_P (operands[1]) && !<mask_applied>
    && optimize_insn_for_speed_p ()"
@@ -18093,9 +17859,9 @@ 
   "TARGET_AVX512F && (<MODE_SIZE> == 64 || TARGET_AVX512VL || TARGET_EVEX512)"
 {
   if (TARGET_AVX512VL)
-    return "vpternlog<ternlogsuffix>\t{$0x55, %1, %0, %0<mask_operand3>|%0<mask_operand3>, %0, %1, 0x55}";
+    return "vpternlog<ternlogsuffix>\t{$85, %1, %0, %0<mask_operand3>|%0<mask_operand3>, %0, %1, 85}";
   else
-    return "vpternlog<ternlogsuffix>\t{$0x55, %g1, %g0, %g0<mask_operand3>|%g0<mask_operand3>, %g0, %g1, 0x55}";
+    return "vpternlog<ternlogsuffix>\t{$85, %g1, %g0, %g0<mask_operand3>|%g0<mask_operand3>, %g0, %g1, 85}";
 }
   [(set_attr "type" "sselog")
    (set_attr "prefix" "evex")
@@ -18218,9 +17984,9 @@ 
       tmp = "pternlog";
       ssesuffix = "<ternlogsuffix>";
       if (which_alternative != 4 || TARGET_AVX512VL)
-	ops = "v%s%s\t{$0x44, %%1, %%2, %%0|%%0, %%2, %%1, $0x44}";
+	ops = "v%s%s\t{$68, %%1, %%2, %%0|%%0, %%2, %%1, 68}";
       else
-	ops = "v%s%s\t{$0x44, %%g1, %%g2, %%g0|%%g0, %%g2, %%g1, $0x44}";
+	ops = "v%s%s\t{$68, %%g1, %%g2, %%g0|%%g0, %%g2, %%g1, 68}";
       break;
     default:
       gcc_unreachable ();
@@ -18608,98 +18374,6 @@ 
   operands[2] = force_reg (V1TImode, CONSTM1_RTX (V1TImode));
 })
 
-(define_insn "*iornot<mode>3"
-  [(set (match_operand:VI 0 "register_operand" "=v,v,v,v")
-	(ior:VI
-	  (not:VI
-	    (match_operand:VI 1 "bcst_vector_operand" "0,m,  0,vBr"))
-	  (match_operand:VI 2 "bcst_vector_operand"   "m,0,vBr,  0")))]
-  "(<MODE_SIZE> == 64 || TARGET_AVX512VL
-    || (TARGET_AVX512F && TARGET_EVEX512 && !TARGET_PREFER_AVX256))
-   && (register_operand (operands[1], <MODE>mode)
-       || register_operand (operands[2], <MODE>mode))"
-{
-  if (!register_operand (operands[1], <MODE>mode))
-    {
-      if (TARGET_AVX512VL)
-	return "vpternlog<ternlogsuffix>\t{$0xdd, %1, %2, %0|%0, %2, %1, 0xdd}";
-      return "vpternlog<ternlogsuffix>\t{$0xdd, %g1, %g2, %g0|%g0, %g2, %g1, 0xdd}";
-    }
-  if (TARGET_AVX512VL)
-    return "vpternlog<ternlogsuffix>\t{$0xbb, %2, %1, %0|%0, %1, %2, 0xbb}";
-  return "vpternlog<ternlogsuffix>\t{$0xbb, %g2, %g1, %g0|%g0, %g1, %g2, 0xbb}";
-}
-  [(set_attr "type" "sselog")
-   (set_attr "length_immediate" "1")
-   (set_attr "prefix" "evex")
-   (set (attr "mode")
-        (if_then_else (match_test "TARGET_AVX512VL")
-		      (const_string "<sseinsnmode>")
-		      (const_string "XI")))
-   (set (attr "enabled")
-	(if_then_else (eq_attr "alternative" "0,1")
-		      (symbol_ref "<MODE_SIZE> == 64 || TARGET_AVX512VL")
-		      (const_string "*")))])
-
-(define_insn "*xnor<mode>3"
-  [(set (match_operand:VI 0 "register_operand" "=v,v")
-	(not:VI
-	  (xor:VI
-	    (match_operand:VI 1 "bcst_vector_operand" "%0, 0")
-	    (match_operand:VI 2 "bcst_vector_operand" " m,vBr"))))]
-  "(<MODE_SIZE> == 64 || TARGET_AVX512VL
-    || (TARGET_AVX512F && TARGET_EVEX512 && !TARGET_PREFER_AVX256))
-   && (register_operand (operands[1], <MODE>mode)
-       || register_operand (operands[2], <MODE>mode))"
-{
-  if (TARGET_AVX512VL)
-    return "vpternlog<ternlogsuffix>\t{$0x99, %2, %1, %0|%0, %1, %2, 0x99}";
-  else
-    return "vpternlog<ternlogsuffix>\t{$0x99, %g2, %g1, %g0|%g0, %g1, %g2, 0x99}";
-}
-  [(set_attr "type" "sselog")
-   (set_attr "length_immediate" "1")
-   (set_attr "prefix" "evex")
-   (set (attr "mode")
-        (if_then_else (match_test "TARGET_AVX512VL")
-		      (const_string "<sseinsnmode>")
-		      (const_string "XI")))
-   (set (attr "enabled")
-	(if_then_else (eq_attr "alternative" "0")
-		      (symbol_ref "<MODE_SIZE> == 64 || TARGET_AVX512VL")
-		      (const_string "*")))])
-
-(define_code_iterator andor [and ior])
-(define_code_attr nlogic [(and "nor") (ior "nand")])
-(define_code_attr ternlog_nlogic [(and "0x11") (ior "0x77")])
-
-(define_insn "*<nlogic><mode>3"
-  [(set (match_operand:VI 0 "register_operand" "=v,v")
-	(andor:VI
-	  (not:VI (match_operand:VI 1 "bcst_vector_operand" "%0, 0"))
-	  (not:VI (match_operand:VI 2 "bcst_vector_operand" "m,vBr"))))]
-  "(<MODE_SIZE> == 64 || TARGET_AVX512VL
-    || (TARGET_AVX512F && TARGET_EVEX512 && !TARGET_PREFER_AVX256))
-   && (register_operand (operands[1], <MODE>mode)
-       || register_operand (operands[2], <MODE>mode))"
-{
-  if (TARGET_AVX512VL)
-    return "vpternlog<ternlogsuffix>\t{$<ternlog_nlogic>, %2, %1, %0|%0, %1, %2, <ternlog_nlogic>}";
-  else
-    return "vpternlog<ternlogsuffix>\t{$<ternlog_nlogic>, %g2, %g1, %g0|%g0, %g1, %g2, <ternlog_nlogic>}";
-}
-  [(set_attr "type" "sselog")
-   (set_attr "length_immediate" "1")
-   (set_attr "prefix" "evex")
-   (set (attr "mode")
-        (if_then_else (match_test "TARGET_AVX512VL")
-		      (const_string "<sseinsnmode>")
-		      (const_string "XI")))
-   (set (attr "enabled")
-	(if_then_else (eq_attr "alternative" "0")
-		      (symbol_ref "<MODE_SIZE> == 64 || TARGET_AVX512VL")
-		      (const_string "*")))])
-
 (define_mode_iterator AVX512ZEXTMASK
   [(DI "TARGET_AVX512BW && TARGET_EVEX512") (SI "TARGET_AVX512BW") HI])
 
diff --git a/gcc/testsuite/gcc.target/i386/pr100711-6.c b/gcc/testsuite/gcc.target/i386/pr100711-6.c
index 8085074..623e555 100644
--- a/gcc/testsuite/gcc.target/i386/pr100711-6.c
+++ b/gcc/testsuite/gcc.target/i386/pr100711-6.c
@@ -15,4 +15,4 @@  v8di foo_v8di (const long long *a)
     return (__extension__ (v8di) {~*a, ~*a, ~*a, ~*a, ~*a, ~*a, ~*a, ~*a});
 }
 
-/* { dg-final { scan-assembler-times "vpternlog\[dq\]\[ \\t\]+\\\$0x55, \\(%(?:eax|rdi|edi)\\)\\\{1to\[1-8\]+\\\}" 2 } } */
+/* { dg-final { scan-assembler-times "vpternlog\[dq\]\[ \\t\]+\\\$85, \\(%(?:eax|rdi|edi)\\)\\\{1to\[1-8\]+\\\}" 2 } } */