Show patches with: Submitter = Tamar Christina       |    State = Action Required       |    Archived = No       |   17 patches
Patch Series rb/tb S/W/F Date Submitter Delegate State
middle-end: move bitmask match.pd pattern and update tests middle-end: move bitmask match.pd pattern and update tests - - --- 2021-11-29 Tamar Christina New
middle-end cse: Make sure duplicate elements are not entered into the equivalence set [PR103404] middle-end cse: Make sure duplicate elements are not entered into the equivalence set [PR103404] - - --- 2021-11-29 Tamar Christina New
middle-end: Handle FMA_CONJ correctly after SLP layout update. middle-end: Handle FMA_CONJ correctly after SLP layout update. - - --- 2021-11-19 Tamar Christina New
AArch64 Optimize right shift rounding narrowing AArch64 Optimize right shift rounding narrowing - - --- 2021-11-12 Tamar Christina New
Arm Update missing entries of cost tables Arm Update missing entries of cost tables - - --- 2021-11-10 Tamar Christina New
middle-end Add an RPO pass after successful vectorization middle-end Add an RPO pass after successful vectorization - - --- 2021-11-02 Tamar Christina New
[1/2] middle-end Update the complex numbers auto-vec detection to the new format of the SLP tree. [1/2] middle-end Update the complex numbers auto-vec detection to the new format of the SLP tree. - - --- 2021-10-29 Tamar Christina New
middle-end: fix de-optimizations with bitclear patterns on signed values middle-end: fix de-optimizations with bitclear patterns on signed values - - --- 2021-10-15 Tamar Christina New
AArch64 Lower intrinsics shift to GIMPLE when possible. AArch64 Lower intrinsics shift to GIMPLE when possible. - - --- 2021-10-15 Tamar Christina New
middle-end convert negate + right shift into compare greater. middle-end convert negate + right shift into compare greater. - - --- 2021-10-05 Tamar Christina New
[7/7] AArch64 Combine cmeq 0 + not into cmtst AArch64 Optimize truncation, shifts and bitmask comparisons - - --- 2021-09-29 Tamar Christina New
[6/7] AArch64 Add neg + cmle into cmgt AArch64 Optimize truncation, shifts and bitmask comparisons - - --- 2021-09-29 Tamar Christina New
[5/7] middle-end Convert bitclear <imm> + cmp<cc> #0 into cm<cc2> <imm2> AArch64 Optimize truncation, shifts and bitmask comparisons - - --- 2021-09-29 Tamar Christina New
[4/7] AArch64 Add pattern xtn+xtn2 to uzp2 AArch64 Optimize truncation, shifts and bitmask comparisons - - --- 2021-09-29 Tamar Christina New
[3/7] AArch64 Add pattern for sshr to cmlt AArch64 Optimize truncation, shifts and bitmask comparisons - - --- 2021-09-29 Tamar Christina New
[2/7] AArch64 Add combine patterns for narrowing shift of half top bits (shuffle) AArch64 Optimize truncation, shifts and bitmask comparisons - - --- 2021-09-29 Tamar Christina New
[1/7] AArch64 Add combine patterns for right shift and narrow AArch64 Optimize truncation, shifts and bitmask comparisons - - --- 2021-09-29 Tamar Christina New