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Patch Series rb/tb S/W/F Date Submitter Delegate State
[Committed] RISC-V: Add VLS unary combine patterns [Committed] RISC-V: Add VLS unary combine patterns - - -3- 2023-09-23 钟居哲 New
[v3] RISC-V: Suport FP floor auto-vectorization [v3] RISC-V: Suport FP floor auto-vectorization - - -3- 2023-09-23 Li, Pan2 New
[v1] RISC-V: Remove FP run test for ceil. [v1] RISC-V: Remove FP run test for ceil. - - 13- 2023-09-23 Li, Pan2 New
PHIOPT: Fix minmax_replacement for three way PHIOPT: Fix minmax_replacement for three way - - 4-- 2023-09-23 Andrew Pinski New
[v2] RISC-V: Suport FP floor auto-vectorization [v2] RISC-V: Suport FP floor auto-vectorization - - 4-- 2023-09-23 Li, Pan2 New
RISC-V/testsuite: Fix ILP32 RVV failures from missing <gnu/stubs-ilp32d.h> RISC-V/testsuite: Fix ILP32 RVV failures from missing <gnu/stubs-ilp32d.h> - - 4-- 2023-09-22 Maciej W. Rozycki New
fortran: error recovery on duplicate declaration of class variable [PR95710] fortran: error recovery on duplicate declaration of class variable [PR95710] - - 4-- 2023-09-22 Harald Anlauf New
[v4] c++: Check for indirect change of active union member in constexpr [PR101631,PR102286] [v4] c++: Check for indirect change of active union member in constexpr [PR101631,PR102286] - - 2-2 2023-09-22 Nathaniel Shead New
[pushed] c++ __integer_pack conversion again [PR111357] [pushed] c++ __integer_pack conversion again [PR111357] - - 13- 2023-09-22 Jason Merrill New
[pushed] c++: constexpr and designated initializer [pushed] c++: constexpr and designated initializer - - -4- 2023-09-22 Jason Merrill New
[pushed] c++: unroll pragma in templates [PR111529] [pushed] c++: unroll pragma in templates [PR111529] - - 13- 2023-09-22 Jason Merrill New
[v2] RISC-V: Refine the code gen for ceil auto vectorization. [v2] RISC-V: Refine the code gen for ceil auto vectorization. - - -4- 2023-09-22 Li, Pan2 New
[v1] RISC-V: Refine the code gen for ceil auto vectorization. [v1] RISC-V: Refine the code gen for ceil auto vectorization. - - --4 2023-09-22 Li, Pan2 New
[13/13,APX,EGPR] Handle vex insns that only support GPR16 (5/5) Support Intel APX EGPR - - 4-- 2023-09-22 Hongyu Wang New
[12/13,APX_EGPR] Handle legacy insns that only support GPR16 (4/5) Support Intel APX EGPR - - 4-- 2023-09-22 Hongyu Wang New
[11/13,APX,EGPR] Handle legacy insns that only support GPR16 (3/5) Support Intel APX EGPR - - 2-- 2023-09-22 Hongyu Wang New
[10/13,APX,EGPR] Handle legacy insns that only support GPR16 (2/5) Support Intel APX EGPR - - --- 2023-09-22 Hongyu Wang New
[09/13,APX,EGPR] Handle legacy insn that only support GPR16 (1/5) Support Intel APX EGPR - - --- 2023-09-22 Hongyu Wang New
[08/13,APX,EGPR] Handle GPR16 only vector move insns Support Intel APX EGPR - - --- 2023-09-22 Hongyu Wang New
[07/13,APX,EGPR] Map reg/mem constraints in inline asm to non-EGPR constraint. Support Intel APX EGPR - - --- 2023-09-22 Hongyu Wang New
[06/13,APX,EGPR] Add backend hook for base_reg_class/index_reg_class. Support Intel APX EGPR - - --- 2023-09-22 Hongyu Wang New
[05/13,APX,EGPR] Add register and memory constraints that disallow EGPR Support Intel APX EGPR - - --- 2023-09-22 Hongyu Wang New
[04/13,APX,EGPR] Add 16 new integer general purpose registers Support Intel APX EGPR - - --- 2023-09-22 Hongyu Wang New
[03/13,APX_EGPR] Initial support for APX_F Support Intel APX EGPR - - --- 2023-09-22 Hongyu Wang New
[02/13,APX,EGPR] middle-end: Add index_reg_class with insn argument. Support Intel APX EGPR - - --- 2023-09-22 Hongyu Wang New
[01/13,APX,EGPR] middle-end: Add insn argument to base_reg_class Support Intel APX EGPR - - --- 2023-09-22 Hongyu Wang New
light expander sra light expander sra - - 4-- 2023-09-22 Jiufu Guo New
[v1] RISC-V: Move ceil test cases to unop folder [v1] RISC-V: Move ceil test cases to unop folder - - 2-2 2023-09-22 Li, Pan2 New
[Committed] RISC-V: Remove @ of vec_duplicate pattern [Committed] RISC-V: Remove @ of vec_duplicate pattern - - 22- 2023-09-22 钟居哲 New
[2/3] recog: Support space in "[ cons" [1/3] recog: Improve parser for pattern new compact syntax - - --- 2023-09-22 Andrea Corallo New
[1/3] recog: Improve parser for pattern new compact syntax [1/3] recog: Improve parser for pattern new compact syntax - - --- 2023-09-22 Andrea Corallo New
RISC-V: Add VLS conditional patterns support RISC-V: Add VLS conditional patterns support - - 13- 2023-09-22 钟居哲 New
[2/2] RISC-V: Fix ICE by expansion and register coercion RISC-V: Define not broken prefetch builtins - - 4-- 2023-09-22 Tsukasa OI New
[1/2] RISC-V: Define not broken prefetch builtins RISC-V: Define not broken prefetch builtins - - 4-- 2023-09-22 Tsukasa OI New
[v1] RISCV-V: Suport FP floor auto-vectorization [v1] RISCV-V: Suport FP floor auto-vectorization - - 4-- 2023-09-22 Li, Pan2 New
[v1] RISC-V: Rename the test macro for math autovec test [v1] RISC-V: Rename the test macro for math autovec test - - 13- 2023-09-22 Li, Pan2 New
[v1] RISC-V: Remove arch and abi option for run test case. [v1] RISC-V: Remove arch and abi option for run test case. - - 13- 2023-09-22 Li, Pan2 New
[COMMITTED,V4] RISC-V: Support combine cond extend and reduce sum to widen reduce sum [COMMITTED,V4] RISC-V: Support combine cond extend and reduce sum to widen reduce sum - - 13- 2023-09-22 Lehua Ding New
[COMMITTED] RISC-V: Split VLS avl_type from NONVLMAX avl_type [COMMITTED] RISC-V: Split VLS avl_type from NONVLMAX avl_type - - 13- 2023-09-22 Lehua Ding New
[V2] RISC-V: Optimization of vrgather.vv into vrgatherei16.vv[PR111451] [V2] RISC-V: Optimization of vrgather.vv into vrgatherei16.vv[PR111451] - - 31- 2023-09-22 Li Xu New
RISC-V: Optimization of vrgather.vv into vrgatherei16.vv[PR111451] RISC-V: Optimization of vrgather.vv into vrgatherei16.vv[PR111451] - - 3-1 2023-09-22 Li Xu New
[v1] RISC-V: Leverage __builtin_xx instead of math.h for test [v1] RISC-V: Leverage __builtin_xx instead of math.h for test - - -4- 2023-09-22 Li, Pan2 New
[v4] RISC-V: Support ceil and ceilf auto-vectorization [v4] RISC-V: Support ceil and ceilf auto-vectorization - - 13- 2023-09-22 Li, Pan2 New
[Committed] RISC-V: Add VLS integer ABS support [Committed] RISC-V: Add VLS integer ABS support - - -4- 2023-09-21 钟居哲 New
AArch64: Add inline memmove expansion AArch64: Add inline memmove expansion - - --4 2023-09-21 Wilco Dijkstra New
[v3] RISC-V: Support ceil and ceilf auto-vectorization [v3] RISC-V: Support ceil and ceilf auto-vectorization - - --4 2023-09-21 Li, Pan2 Changes Requested
[v2] AArch64: Fix strict-align cpymem/setmem [PR103100] [v2] AArch64: Fix strict-align cpymem/setmem [PR103100] - - 4-- 2023-09-21 Wilco Dijkstra New
[v3] c++: Catch indirect change of active union member in constexpr [PR101631] [v3] c++: Catch indirect change of active union member in constexpr [PR101631] - - 4-- 2023-09-21 Nathaniel Shead New
[Committed] RISC-V: Add more VLS unary tests [Committed] RISC-V: Add more VLS unary tests - - -4- 2023-09-21 钟居哲 Committed
[Committed] RISC-V: Support VLS mult high [Committed] RISC-V: Support VLS mult high - - -4- 2023-09-21 钟居哲 Committed
[v2] RISC-V: Support ceil and ceilf auto-vectorization [v2] RISC-V: Support ceil and ceilf auto-vectorization - - --4 2023-09-21 Li, Pan2 Superseded
[V2] RISC-V: Adjusting the comments of the emit_vlmax_insn/emit_vlmax_insn_lra/emit_nonvlmax_insn f… [V2] RISC-V: Adjusting the comments of the emit_vlmax_insn/emit_vlmax_insn_lra/emit_nonvlmax_insn f… - - -4- 2023-09-21 Lehua Ding Committed
[3/3,v2] build: Regenerate build files Untitled series #24930 - - --- 2023-09-21 Arthur Cohen New
[wwwdocs] OpenMP: gcc-14/changes.html and projects/gomp/ update [wwwdocs] OpenMP: gcc-14/changes.html and projects/gomp/ update - - --4 2023-09-21 Tobias Burnus New
[3/3] build: Regenerate build files Untitled series #24928 - - --- 2023-09-21 Arthur Cohen New
RISC-V: Enable undefined support for RVV auto-vectorization[PR110751] RISC-V: Enable undefined support for RVV auto-vectorization[PR110751] - - 31- 2023-09-21 钟居哲 Committed
PHIOPT: Fix minmax_replacement for three way PHIOPT: Fix minmax_replacement for three way - - 4-- 2023-09-21 Andrew Pinski New
[18/18] Allow -mno-evex512 usage Support -mevex512 for AVX512 - - --- 2023-09-21 Hu, Lin1 New
[17/18] Support -mevex512 for AVX512FP16 intrins Support -mevex512 for AVX512 - - --- 2023-09-21 Hu, Lin1 New
[16/18] Support -mevex512 for AVX512{IFMA, VBMI, VNNI, BF16, VPOPCNTDQ, VBMI2, BITALG, VP2INTERSECT… Support -mevex512 for AVX512 - - --- 2023-09-21 Hu, Lin1 New
[15/18] Support -mevex512 for AVX512BW intrins Support -mevex512 for AVX512 - - --- 2023-09-21 Hu, Lin1 New
[14/18] Support -mevex512 for AVX512DQ intrins Support -mevex512 for AVX512 - - --- 2023-09-21 Hu, Lin1 New
[13/18] Support -mevex512 for AVX512F intrins Support -mevex512 for AVX512 - - --- 2023-09-21 Hu, Lin1 New
[12/18] Disable zmm register and 512 bit libmvec call when !TARGET_EVEX512 Support -mevex512 for AVX512 - - --- 2023-09-21 Hu, Lin1 New
[11/18,5/5] Add OPTION_MASK_ISA2_EVEX512 for 512 bit builtins Support -mevex512 for AVX512 - - --- 2023-09-21 Hu, Lin1 New
[10/18,4/5] Add OPTION_MASK_ISA2_EVEX512 for 512 bit builtins Support -mevex512 for AVX512 - - --- 2023-09-21 Hu, Lin1 New
[09/18,3/5] Add OPTION_MASK_ISA2_EVEX512 for 512 bit builtins Support -mevex512 for AVX512 - - --- 2023-09-21 Hu, Lin1 New
[08/18,2/5] Add OPTION_MASK_ISA2_EVEX512 for 512 bit builtins Support -mevex512 for AVX512 - - --- 2023-09-21 Hu, Lin1 New
[07/18,1/5] Add OPTION_MASK_ISA2_EVEX512 for 512 bit builtins Support -mevex512 for AVX512 - - --- 2023-09-21 Hu, Lin1 New
[06/18,5/5] Push evex512 target for 512 bit intrins Support -mevex512 for AVX512 - - --- 2023-09-21 Hu, Lin1 New
[05/18,4/5] Push evex512 target for 512 bit intrins Support -mevex512 for AVX512 - - --- 2023-09-21 Hu, Lin1 New
[04/18,3/5] Push evex512 target for 512 bit intrins Support -mevex512 for AVX512 - - --- 2023-09-21 Hu, Lin1 New
[03/18,2/5] Push evex512 target for 512 bit intrins Support -mevex512 for AVX512 - - --- 2023-09-21 Hu, Lin1 New
[01/18] Initial support for -mevex512 Support -mevex512 for AVX512 - - --- 2023-09-21 Hu, Lin1 New
RISC-V: Adjusting the comments of the emit_vlmax_insn/emit_vlmax_insn_lra/emit_nonvlmax_insn functi… RISC-V: Adjusting the comments of the emit_vlmax_insn/emit_vlmax_insn_lra/emit_nonvlmax_insn functi… - - 3-1 2023-09-21 Lehua Ding Superseded
[v2] Re: Introduce -finline-stringops [v2] Re: Introduce -finline-stringops - - 2-1 2023-09-21 Alexandre Oliva New
[V3] RISC-V: Support combine cond extend and reduce sum to widen reduce sum [V3] RISC-V: Support combine cond extend and reduce sum to widen reduce sum - - 4-- 2023-09-21 Lehua Ding New
RISC-V: Rename predicate vector_gs_scale_operand_16/32 to more generic names RISC-V: Rename predicate vector_gs_scale_operand_16/32 to more generic names - - 13- 2023-09-21 Lehua Ding Committed
RISC-V: Optimized for strided load/store with stride == element width[PR111450] RISC-V: Optimized for strided load/store with stride == element width[PR111450] - - 22- 2023-09-21 Li Xu Committed
MATCH: Simplify `(A ==/!= B) &/| (((cast)A) CMP C)` MATCH: Simplify `(A ==/!= B) &/| (((cast)A) CMP C)` - - 4-- 2023-09-21 Andrew Pinski New
check undefine_p for one more vr check undefine_p for one more vr - - 31- 2023-09-21 Jiufu Guo New
[Committed] RISC-V: Support VLS INT <-> FP conversions [Committed] RISC-V: Support VLS INT <-> FP conversions - - -4- 2023-09-21 钟居哲 Committed
LoongArch: Optimizations of vector construction. LoongArch: Optimizations of vector construction. - - 4-- 2023-09-21 Guo Jie New
LoongArch: Optimizations of vector construction. LoongArch: Optimizations of vector construction. - - 4-- 2023-09-21 Guo Jie New
[COMMITTED] Tweak ssa_cache::merge_range API. [COMMITTED] Tweak ssa_cache::merge_range API. - - -4- 2023-09-20 Andrew MacLeod New
c++: constraint rewriting during ttp coercion [PR111485] c++: constraint rewriting during ttp coercion [PR111485] - - 4-- 2023-09-20 Patrick Palka New
RISC-V: Remove math.h import to resolve missing stubs failures RISC-V: Remove math.h import to resolve missing stubs failures - 2 13- 2023-09-20 Patrick O'Neill Committed
[v2] AArch64: Fix memmove operand corruption [PR111121] [v2] AArch64: Fix memmove operand corruption [PR111121] - - 4-- 2023-09-20 Wilco Dijkstra New
[frange] Remove special casing from unordered operators. [frange] Remove special casing from unordered operators. - - 31- 2023-09-20 Aldy Hernandez New
[Committed,V4] internal-fn: Support undefined rtx for uninitialized SSA_NAME[PR110751] [Committed,V4] internal-fn: Support undefined rtx for uninitialized SSA_NAME[PR110751] - - 22- 2023-09-20 钟居哲 New
c++: missing SFINAE in grok_array_decl [PR111493] c++: missing SFINAE in grok_array_decl [PR111493] - - 4-- 2023-09-20 Patrick Palka New
ifcvt/vect: Emit COND_ADD for conditional scalar reduction. ifcvt/vect: Emit COND_ADD for conditional scalar reduction. - - 3-1 2023-09-20 Robin Dapp New
AArch64: Fix strict-align cpymem/setmem [PR103100] AArch64: Fix strict-align cpymem/setmem [PR103100] - - 4-- 2023-09-20 Wilco Dijkstra New
[2/2] RISC-V: Add assert of the number of vmerge in autovec cond testcases [1/2] match.pd: Support combine cond_len_op + vec_cond similar to cond_op - - 4-- 2023-09-20 Lehua Ding New
[1/2] match.pd: Support combine cond_len_op + vec_cond similar to cond_op [1/2] match.pd: Support combine cond_len_op + vec_cond similar to cond_op - - 4-- 2023-09-20 Lehua Ding New
[Committed] RISC-V: Support VLS floating-point extend/truncate [Committed] RISC-V: Support VLS floating-point extend/truncate - - -31 2023-09-20 钟居哲 Committed
[2/3] build: Add libgrust as compilation modules [1/3] librust: Add libproc_macro and build system - - --- 2023-09-20 Arthur Cohen New
[1/3] librust: Add libproc_macro and build system [1/3] librust: Add libproc_macro and build system - - --- 2023-09-20 Arthur Cohen New
Add a GCC Security policy Add a GCC Security policy - - 4-- 2023-09-20 Siddhesh Poyarekar New
OpenMP: Support accelerated 2D/3D memory copies for AMD GCN OpenMP: Support accelerated 2D/3D memory copies for AMD GCN - - --4 2023-09-20 Julian Brown New
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