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Wed, 5 Aug 2026 10:02:35 +0000 From: Luis Silva To: gcc-patches@gcc.gnu.org Cc: Jeff Law , Kito Cheng , Palmer Dabbelt , Robin Dapp , Luis Silva , Artemiy Volkov , Michiel Derhaeg , Loeka Rogge , Alex Turjan , Luis Silva Subject: [PATCH v2 0/4] RISC-V: ARC-V RHX-100 fusion and scheduling Date: Wed, 5 Aug 2026 11:02:08 +0100 Message-ID: X-Mailer: git-send-email 2.39.5 X-ClientProxiedBy: MA4P292CA0012.ESPP292.PROD.OUTLOOK.COM (2603:10a6:250:2d::9) To LO6P265MB6224.GBRP265.PROD.OUTLOOK.COM (2603:10a6:600:2b1::6) X-Microsoft-Original-Message-ID: <20260805100212.10852-1-luismgsilva@outlook.com> MIME-Version: 1.0 X-MS-Exchange-MessageSentRepresentingType: 1 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: LO6P265MB6224:EE_|CWLP265MB5868:EE_ X-MS-Office365-Filtering-Correlation-Id: 49413165-9e28-416d-2bf8-08def2d8aaee X-Microsoft-Antispam: BCL:0; ARA:14566002|41001999006|5062599005|5072599009|4140399003|19110799012|8060799015|25010399006|15080799012|23021999003|19101099003|440099028|3412199025|2607281247196008|10035399007|52005399003|40105399003|1710799026; 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The pipeline description is already upstream, so this series is four patches around the generic table in riscv-fusion.cc: 1/4 RHX-100 fusion cases 2/4 TARGET_SCHED_FUSION_PRIORITY 3/4 dual-issue scheduling hooks 4/4 RTL patterns for mul+add (and BFEXT costs) Regtested for rv32 with --with-tune=arc-v-rhx-100-series and --enable-checking=rtl. Changes since v1: Drop arcv_macro_fusion_pair_p / RISCV_FUSE_ARCV. Each pair is its own riscv_fuse_* checker and RISCV_FUSE_* bit, selected from the RHX-100 fusible_ops field. Hooks that are RHX-specific use TARGET_ARCV_RHX100. arcv.cc holds the RHX fusion-priority and scheduling code. It is introduced in patch 2 with the config.gcc / t-riscv bits (v1 created that file earlier in the series). Patch 1 adds the RHX fusion checkers to the table, splits BFEXT into BFEXT_SRLI / BFEXT_SRAI (RHX enables SRLI only), and enables LUI_LD_REV for independent load+lui either order (not address-formation LUI_LD). Dump tests are new. Fused_MAC only matches mul rd; add rd,rd,rs (product in rs1). Patch 2 puts riscv_sched_fusion_priority in riscv-fusion.cc; it calls arcv_sched_fusion_priority and falls back when that returns false. The load/store mode limit is arcv_pair_fusion_mode_allowed_p. Patch 3 walks with next_nonnote_nondebug_insn_bb and calls riscv_macro_fusion_pair_p, mimicking the scheduler more precisely. Missing checks were added so scheduling is more correct. The ls-update dump XFAILs are removed. riscv_sched_reorder2 preserves the remaining issue count for non-RHX (cached_can_issue_more) so defining TARGET_SCHED_REORDER2 does not force single-issue on other tunes. Patch 4 adds madd_fused (RV32 mul+add) and madd_fused_extended (RV64 mulw+addw) for the scheduler, gated on RISCV_FUSE_MULT_ADD and !TARGET_XTHEADMAC. riscv_rtx_costs cheapens zero_extract / sign_extract when RISCV_FUSE_BFEXT_SRLI / RISCV_FUSE_BFEXT_SRAI is on. v1's imul_fused/alu_fused type attrs and pipeline reservations are gone: the fused madd patterns split before scheduling, so those types are not needed. *zero_extract_fused and the extract split guard on *3 are also dropped; the generic extract pattern already handles the destination the same way. Thanks, Luis Luis Silva (4): RISC-V: Implement riscv_macro_fusion_pair_p for ARC-V RHX-100 series RISC-V: Implement TARGET_SCHED_FUSION_PRIORITY for ARC-V RHX-100 series RISC-V: Implement scheduling for ARC-V RHX-100 series RISC-V: define_insn_and_split for multiply-add and bit-extract fusion gcc/config.gcc | 2 +- gcc/config/riscv/arcv.cc | 409 ++++++++++++ gcc/config/riscv/riscv-fusion.cc | 583 +++++++++++++++++- gcc/config/riscv/riscv-protos.h | 23 +- gcc/config/riscv/riscv.cc | 106 +++- gcc/config/riscv/riscv.h | 4 + gcc/config/riscv/riscv.md | 122 +++- gcc/config/riscv/t-riscv | 6 + .../gcc.target/riscv/fusion-adjacent-load.c | 12 + .../gcc.target/riscv/fusion-adjacent-store.c | 13 + .../gcc.target/riscv/fusion-bfext-2.c | 14 + .../gcc.target/riscv/fusion-bfext-srai.c | 18 + gcc/testsuite/gcc.target/riscv/fusion-bfext.c | 15 + .../gcc.target/riscv/fusion-li-branch.c | 14 + .../gcc.target/riscv/fusion-li-store.c | 12 + .../gcc.target/riscv/fusion-limm-condbr.c | 12 + .../gcc.target/riscv/fusion-ls-update-2.c | 16 + .../gcc.target/riscv/fusion-ls-update-3.c | 81 +++ .../gcc.target/riscv/fusion-ls-update-4.c | 53 ++ .../gcc.target/riscv/fusion-ls-update-5.c | 13 + .../gcc.target/riscv/fusion-ls-update.c | 15 + .../gcc.target/riscv/fusion-lui-ld.c | 25 + .../gcc.target/riscv/fusion-lui-st.c | 19 + gcc/testsuite/gcc.target/riscv/fusion-madd.c | 13 + .../gcc.target/riscv/fusion-mult-add.c | 13 + 25 files changed, 1580 insertions(+), 33 deletions(-) create mode 100644 gcc/config/riscv/arcv.cc create mode 100644 gcc/testsuite/gcc.target/riscv/fusion-adjacent-load.c create mode 100644 gcc/testsuite/gcc.target/riscv/fusion-adjacent-store.c create mode 100644 gcc/testsuite/gcc.target/riscv/fusion-bfext-2.c create mode 100644 gcc/testsuite/gcc.target/riscv/fusion-bfext-srai.c create mode 100644 gcc/testsuite/gcc.target/riscv/fusion-bfext.c create mode 100644 gcc/testsuite/gcc.target/riscv/fusion-li-branch.c create mode 100644 gcc/testsuite/gcc.target/riscv/fusion-li-store.c create mode 100644 gcc/testsuite/gcc.target/riscv/fusion-limm-condbr.c create mode 100644 gcc/testsuite/gcc.target/riscv/fusion-ls-update-2.c create mode 100644 gcc/testsuite/gcc.target/riscv/fusion-ls-update-3.c create mode 100644 gcc/testsuite/gcc.target/riscv/fusion-ls-update-4.c create mode 100644 gcc/testsuite/gcc.target/riscv/fusion-ls-update-5.c create mode 100644 gcc/testsuite/gcc.target/riscv/fusion-ls-update.c create mode 100644 gcc/testsuite/gcc.target/riscv/fusion-lui-ld.c create mode 100644 gcc/testsuite/gcc.target/riscv/fusion-lui-st.c create mode 100644 gcc/testsuite/gcc.target/riscv/fusion-madd.c create mode 100644 gcc/testsuite/gcc.target/riscv/fusion-mult-add.c