[v2,0/4] RISC-V: ARC-V RHX-100 fusion and scheduling

  From: Luis Silva <luis.silva@globalfoundries.com>

Hi,

This is v2 of the RHX-100 fusion/scheduling series.  v1 was:

  https://gcc.gnu.org/pipermail/gcc-patches/2026-January/705022.html

v1 had five patches (pipeline description, fusion, fusion priority,
scheduling, and RTL patterns).  The pipeline description is already
upstream, so this series is four patches around the generic table in
riscv-fusion.cc:

  1/4  RHX-100 fusion cases
  2/4  TARGET_SCHED_FUSION_PRIORITY
  3/4  dual-issue scheduling hooks
  4/4  RTL patterns for mul+add (and BFEXT costs)

Regtested for rv32 with --with-tune=arc-v-rhx-100-series and
--enable-checking=rtl.

Changes since v1:

Drop arcv_macro_fusion_pair_p / RISCV_FUSE_ARCV.  Each pair is its own
riscv_fuse_* checker and RISCV_FUSE_* bit, selected from the RHX-100
fusible_ops field.  Hooks that are RHX-specific use TARGET_ARCV_RHX100.

arcv.cc holds the RHX fusion-priority and scheduling code.  It is
introduced in patch 2 with the config.gcc / t-riscv bits (v1 created
that file earlier in the series).

Patch 1 adds the RHX fusion checkers to the table, splits BFEXT into
BFEXT_SRLI / BFEXT_SRAI (RHX enables SRLI only), and enables LUI_LD_REV
for independent load+lui either order (not address-formation LUI_LD).
Dump tests are new.  Fused_MAC only matches mul rd; add rd,rd,rs
(product in rs1).

Patch 2 puts riscv_sched_fusion_priority in riscv-fusion.cc; it calls
arcv_sched_fusion_priority and falls back when that returns false.
The load/store mode limit is arcv_pair_fusion_mode_allowed_p.

Patch 3 walks with next_nonnote_nondebug_insn_bb and calls
riscv_macro_fusion_pair_p, mimicking the scheduler more precisely.
Missing checks were added so scheduling is more correct.  The
ls-update dump XFAILs are removed.  riscv_sched_reorder2 preserves the
remaining issue count for non-RHX (cached_can_issue_more) so defining
TARGET_SCHED_REORDER2 does not force single-issue on other tunes.

Patch 4 adds madd_fused (RV32 mul+add) and madd_fused_extended
(RV64 mulw+addw) for the scheduler, gated on RISCV_FUSE_MULT_ADD and
!TARGET_XTHEADMAC.  riscv_rtx_costs cheapens zero_extract / sign_extract
when RISCV_FUSE_BFEXT_SRLI / RISCV_FUSE_BFEXT_SRAI is on.
v1's imul_fused/alu_fused type attrs and pipeline reservations are gone:
the fused madd patterns split before scheduling, so those types are not
needed.  *zero_extract_fused and the extract split guard on
*<any_extract:optab><GPR:mode>3 are also dropped; the generic extract
pattern already handles the destination the same way.

Thanks,
Luis

Luis Silva (4):
  RISC-V: Implement riscv_macro_fusion_pair_p for ARC-V RHX-100 series
  RISC-V: Implement TARGET_SCHED_FUSION_PRIORITY for ARC-V RHX-100
    series
  RISC-V: Implement scheduling for ARC-V RHX-100 series
  RISC-V: define_insn_and_split for multiply-add and bit-extract fusion

 gcc/config.gcc                                |   2 +-
 gcc/config/riscv/arcv.cc                      | 409 ++++++++++++
 gcc/config/riscv/riscv-fusion.cc              | 583 +++++++++++++++++-
 gcc/config/riscv/riscv-protos.h               |  23 +-
 gcc/config/riscv/riscv.cc                     | 106 +++-
 gcc/config/riscv/riscv.h                      |   4 +
 gcc/config/riscv/riscv.md                     | 122 +++-
 gcc/config/riscv/t-riscv                      |   6 +
 .../gcc.target/riscv/fusion-adjacent-load.c   |  12 +
 .../gcc.target/riscv/fusion-adjacent-store.c  |  13 +
 .../gcc.target/riscv/fusion-bfext-2.c         |  14 +
 .../gcc.target/riscv/fusion-bfext-srai.c      |  18 +
 gcc/testsuite/gcc.target/riscv/fusion-bfext.c |  15 +
 .../gcc.target/riscv/fusion-li-branch.c       |  14 +
 .../gcc.target/riscv/fusion-li-store.c        |  12 +
 .../gcc.target/riscv/fusion-limm-condbr.c     |  12 +
 .../gcc.target/riscv/fusion-ls-update-2.c     |  16 +
 .../gcc.target/riscv/fusion-ls-update-3.c     |  81 +++
 .../gcc.target/riscv/fusion-ls-update-4.c     |  53 ++
 .../gcc.target/riscv/fusion-ls-update-5.c     |  13 +
 .../gcc.target/riscv/fusion-ls-update.c       |  15 +
 .../gcc.target/riscv/fusion-lui-ld.c          |  25 +
 .../gcc.target/riscv/fusion-lui-st.c          |  19 +
 gcc/testsuite/gcc.target/riscv/fusion-madd.c  |  13 +
 .../gcc.target/riscv/fusion-mult-add.c        |  13 +
 25 files changed, 1580 insertions(+), 33 deletions(-)
 create mode 100644 gcc/config/riscv/arcv.cc
 create mode 100644 gcc/testsuite/gcc.target/riscv/fusion-adjacent-load.c
 create mode 100644 gcc/testsuite/gcc.target/riscv/fusion-adjacent-store.c
 create mode 100644 gcc/testsuite/gcc.target/riscv/fusion-bfext-2.c
 create mode 100644 gcc/testsuite/gcc.target/riscv/fusion-bfext-srai.c
 create mode 100644 gcc/testsuite/gcc.target/riscv/fusion-bfext.c
 create mode 100644 gcc/testsuite/gcc.target/riscv/fusion-li-branch.c
 create mode 100644 gcc/testsuite/gcc.target/riscv/fusion-li-store.c
 create mode 100644 gcc/testsuite/gcc.target/riscv/fusion-limm-condbr.c
 create mode 100644 gcc/testsuite/gcc.target/riscv/fusion-ls-update-2.c
 create mode 100644 gcc/testsuite/gcc.target/riscv/fusion-ls-update-3.c
 create mode 100644 gcc/testsuite/gcc.target/riscv/fusion-ls-update-4.c
 create mode 100644 gcc/testsuite/gcc.target/riscv/fusion-ls-update-5.c
 create mode 100644 gcc/testsuite/gcc.target/riscv/fusion-ls-update.c
 create mode 100644 gcc/testsuite/gcc.target/riscv/fusion-lui-ld.c
 create mode 100644 gcc/testsuite/gcc.target/riscv/fusion-lui-st.c
 create mode 100644 gcc/testsuite/gcc.target/riscv/fusion-madd.c
 create mode 100644 gcc/testsuite/gcc.target/riscv/fusion-mult-add.c
  

Hi,

Gentle ping.

I suspect review is being held off until Jin Ma's fusion patches land.
If so, I think we can already start preparing a v3 based on those and
reuse whatever is introduced there.

If there is anything else that can facilitate review let me know. E.g.
We can split up the fusion cases in separate patches as well.

Kind regards,
Michiel

Luis Silva <luismgsilva@outlook.com> writes:

> From: Luis Silva <luis.silva@globalfoundries.com>
>
> Hi,
>
> This is v2 of the RHX-100 fusion/scheduling series.  v1 was:
>
>   https://gcc.gnu.org/pipermail/gcc-patches/2026-January/705022.html
>
> v1 had five patches (pipeline description, fusion, fusion priority,
> scheduling, and RTL patterns).  The pipeline description is already
> upstream, so this series is four patches around the generic table in
> riscv-fusion.cc:
>
>   1/4  RHX-100 fusion cases
>   2/4  TARGET_SCHED_FUSION_PRIORITY
>   3/4  dual-issue scheduling hooks
>   4/4  RTL patterns for mul+add (and BFEXT costs)
>
> Regtested for rv32 with --with-tune=arc-v-rhx-100-series and
> --enable-checking=rtl.
>
> Changes since v1:
>
> Drop arcv_macro_fusion_pair_p / RISCV_FUSE_ARCV.  Each pair is its own
> riscv_fuse_* checker and RISCV_FUSE_* bit, selected from the RHX-100
> fusible_ops field.  Hooks that are RHX-specific use TARGET_ARCV_RHX100.
>
> arcv.cc holds the RHX fusion-priority and scheduling code.  It is
> introduced in patch 2 with the config.gcc / t-riscv bits (v1 created
> that file earlier in the series).
>
> Patch 1 adds the RHX fusion checkers to the table, splits BFEXT into
> BFEXT_SRLI / BFEXT_SRAI (RHX enables SRLI only), and enables LUI_LD_REV
> for independent load+lui either order (not address-formation LUI_LD).
> Dump tests are new.  Fused_MAC only matches mul rd; add rd,rd,rs
> (product in rs1).
>
> Patch 2 puts riscv_sched_fusion_priority in riscv-fusion.cc; it calls
> arcv_sched_fusion_priority and falls back when that returns false.
> The load/store mode limit is arcv_pair_fusion_mode_allowed_p.
>
> Patch 3 walks with next_nonnote_nondebug_insn_bb and calls
> riscv_macro_fusion_pair_p, mimicking the scheduler more precisely.
> Missing checks were added so scheduling is more correct.  The
> ls-update dump XFAILs are removed.  riscv_sched_reorder2 preserves the
> remaining issue count for non-RHX (cached_can_issue_more) so defining
> TARGET_SCHED_REORDER2 does not force single-issue on other tunes.
>
> Patch 4 adds madd_fused (RV32 mul+add) and madd_fused_extended
> (RV64 mulw+addw) for the scheduler, gated on RISCV_FUSE_MULT_ADD and
> !TARGET_XTHEADMAC.  riscv_rtx_costs cheapens zero_extract / sign_extract
> when RISCV_FUSE_BFEXT_SRLI / RISCV_FUSE_BFEXT_SRAI is on.
> v1's imul_fused/alu_fused type attrs and pipeline reservations are gone:
> the fused madd patterns split before scheduling, so those types are not
> needed.  *zero_extract_fused and the extract split guard on
> *<any_extract:optab><GPR:mode>3 are also dropped; the generic extract
> pattern already handles the destination the same way.
>
> Thanks,
> Luis
>
> Luis Silva (4):
>   RISC-V: Implement riscv_macro_fusion_pair_p for ARC-V RHX-100 series
>   RISC-V: Implement TARGET_SCHED_FUSION_PRIORITY for ARC-V RHX-100
>     series
>   RISC-V: Implement scheduling for ARC-V RHX-100 series
>   RISC-V: define_insn_and_split for multiply-add and bit-extract fusion
>
>  gcc/config.gcc                                |   2 +-
>  gcc/config/riscv/arcv.cc                      | 409 ++++++++++++
>  gcc/config/riscv/riscv-fusion.cc              | 583 +++++++++++++++++-
>  gcc/config/riscv/riscv-protos.h               |  23 +-
>  gcc/config/riscv/riscv.cc                     | 106 +++-
>  gcc/config/riscv/riscv.h                      |   4 +
>  gcc/config/riscv/riscv.md                     | 122 +++-
>  gcc/config/riscv/t-riscv                      |   6 +
>  .../gcc.target/riscv/fusion-adjacent-load.c   |  12 +
>  .../gcc.target/riscv/fusion-adjacent-store.c  |  13 +
>  .../gcc.target/riscv/fusion-bfext-2.c         |  14 +
>  .../gcc.target/riscv/fusion-bfext-srai.c      |  18 +
>  gcc/testsuite/gcc.target/riscv/fusion-bfext.c |  15 +
>  .../gcc.target/riscv/fusion-li-branch.c       |  14 +
>  .../gcc.target/riscv/fusion-li-store.c        |  12 +
>  .../gcc.target/riscv/fusion-limm-condbr.c     |  12 +
>  .../gcc.target/riscv/fusion-ls-update-2.c     |  16 +
>  .../gcc.target/riscv/fusion-ls-update-3.c     |  81 +++
>  .../gcc.target/riscv/fusion-ls-update-4.c     |  53 ++
>  .../gcc.target/riscv/fusion-ls-update-5.c     |  13 +
>  .../gcc.target/riscv/fusion-ls-update.c       |  15 +
>  .../gcc.target/riscv/fusion-lui-ld.c          |  25 +
>  .../gcc.target/riscv/fusion-lui-st.c          |  19 +
>  gcc/testsuite/gcc.target/riscv/fusion-madd.c  |  13 +
>  .../gcc.target/riscv/fusion-mult-add.c        |  13 +
>  25 files changed, 1580 insertions(+), 33 deletions(-)
>  create mode 100644 gcc/config/riscv/arcv.cc
>  create mode 100644 gcc/testsuite/gcc.target/riscv/fusion-adjacent-load.c
>  create mode 100644 gcc/testsuite/gcc.target/riscv/fusion-adjacent-store.c
>  create mode 100644 gcc/testsuite/gcc.target/riscv/fusion-bfext-2.c
>  create mode 100644 gcc/testsuite/gcc.target/riscv/fusion-bfext-srai.c
>  create mode 100644 gcc/testsuite/gcc.target/riscv/fusion-bfext.c
>  create mode 100644 gcc/testsuite/gcc.target/riscv/fusion-li-branch.c
>  create mode 100644 gcc/testsuite/gcc.target/riscv/fusion-li-store.c
>  create mode 100644 gcc/testsuite/gcc.target/riscv/fusion-limm-condbr.c
>  create mode 100644 gcc/testsuite/gcc.target/riscv/fusion-ls-update-2.c
>  create mode 100644 gcc/testsuite/gcc.target/riscv/fusion-ls-update-3.c
>  create mode 100644 gcc/testsuite/gcc.target/riscv/fusion-ls-update-4.c
>  create mode 100644 gcc/testsuite/gcc.target/riscv/fusion-ls-update-5.c
>  create mode 100644 gcc/testsuite/gcc.target/riscv/fusion-ls-update.c
>  create mode 100644 gcc/testsuite/gcc.target/riscv/fusion-lui-ld.c
>  create mode 100644 gcc/testsuite/gcc.target/riscv/fusion-lui-st.c
>  create mode 100644 gcc/testsuite/gcc.target/riscv/fusion-madd.c
>  create mode 100644 gcc/testsuite/gcc.target/riscv/fusion-mult-add.c
>
> -- 
> 2.47.3
  

On 8/28/2026 11:06 AM, Michiel Derhaeg wrote:
> Hi,
>
> Gentle ping.
>
> I suspect review is being held off until Jin Ma's fusion patches land.
> If so, I think we can already start preparing a v3 based on those and
> reuse whatever is introduced there.
>
> If there is anything else that can facilitate review let me know. E.g.
> We can split up the fusion cases in separate patches as well.
It's a combination of my unavailability the last few weeks and needing 
to see how the two kits interact.  Not forgotten.

jeff