From patchwork Tue Dec 5 02:29:31 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Hongyu Wang X-Patchwork-Id: 56453 Return-Path: X-Original-To: patchwork@sourceware.org Delivered-To: patchwork@sourceware.org Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id E25833835005 for ; Tue, 5 Dec 2023 02:31:30 +0000 (GMT) X-Original-To: gcc-patches@gcc.gnu.org Delivered-To: gcc-patches@gcc.gnu.org Received: from eggs.gnu.org (eggs.gnu.org [IPv6:2001:470:142:3::10]) by sourceware.org (Postfix) with ESMTPS id 66F1738312D0 for ; Tue, 5 Dec 2023 02:31:02 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.2 sourceware.org 66F1738312D0 Authentication-Results: sourceware.org; dmarc=fail (p=none dis=none) header.from=intel.com Authentication-Results: sourceware.org; spf=fail smtp.mailfrom=gmail.com ARC-Filter: OpenARC Filter v1.0.0 sourceware.org 66F1738312D0 Authentication-Results: server2.sourceware.org; arc=none smtp.remote-ip=2001:470:142:3::10 ARC-Seal: i=1; a=rsa-sha256; d=sourceware.org; s=key; t=1701743470; cv=none; b=sj0OHPj8nsdXn7otZ9T+s0x/iAS3T4Qsdn0KvP3+/YNi18kYBmV2K4pcMODZW0elxbHJV4krgMScjkURYk2yeaoPyc8qHflCE+ShaVpHFxdvpTQi9WITYE5/4p8tr/1ePiA4Butd7WK2So1FsbCgTRpEHqipZ8pPmpZRIgbYYEs= ARC-Message-Signature: i=1; a=rsa-sha256; d=sourceware.org; s=key; t=1701743470; c=relaxed/simple; bh=Swj3rihy3s7bv3VZ+gP1WoEMCvkwFWeIiul9P7CV5+8=; h=DKIM-Signature:From:To:Subject:Date:Message-Id:MIME-Version; b=qSowogx805px0M6S2X9z7YoTzkNOzoTF+wMpYUEgmKGNGbY9eMcpAOxFzbuntQLt5TfJx46LsjZ7D6ylPtwdFVvIg9G5FHK39REKeoNHbf1ZoII0Sf/OpSZBXygzenoT4MQDO436RoaNi8nZ0AHnU3QkagzJGozq8WELa709ShE= ARC-Authentication-Results: i=1; server2.sourceware.org Received: from mgamail.intel.com ([192.55.52.136]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1rALD6-0001YX-Ox for gcc-patches@gcc.gnu.org; Mon, 04 Dec 2023 21:31:00 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1701743456; x=1733279456; h=from:to:cc:subject:date:message-id:mime-version: content-transfer-encoding; bh=Swj3rihy3s7bv3VZ+gP1WoEMCvkwFWeIiul9P7CV5+8=; b=SDsGLKT5YEYHBNwIe47JyaSOYQV0HvFvcKsI/JYdewtShnlJrIxmZMiN yx57QEb+f1mY9krvX76BlTig5Dv9PxxSvZli4G00VX/6f8rRxm+d1bCuz ti4N1rPRDJjnL+BF1xJ9xHPHad0N1FJMAcLMUaGEmaLNEGPBq0UTMYLua Bb+KrBWCzZngU778piJvuod0qNVZw8RF82xtf0iZk8eUBuVAnm7UrnD9e Yu9j1KyjWhdkH24MkrMDh/jAUb3cpfzsUvWIX5QPpXg+qNCTAJqElabOp yza35H+ATm/teiydGTzuVguZvl3Lut/K668z3zCeBxu6taFPSPAOfpTI2 A==; X-IronPort-AV: E=McAfee;i="6600,9927,10914"; a="373277778" X-IronPort-AV: E=Sophos;i="6.04,251,1695711600"; d="scan'208";a="373277778" Received: from fmsmga004.fm.intel.com ([10.253.24.48]) by fmsmga106.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 04 Dec 2023 18:29:50 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10914"; a="841275491" X-IronPort-AV: E=Sophos;i="6.04,251,1695711600"; d="scan'208";a="841275491" Received: from shvmail03.sh.intel.com ([10.239.245.20]) by fmsmga004.fm.intel.com with ESMTP; 04 Dec 2023 18:29:49 -0800 Received: from shliclel4217.sh.intel.com (shliclel4217.sh.intel.com [10.239.240.127]) by shvmail03.sh.intel.com (Postfix) with ESMTP id 347ED100570C; Tue, 5 Dec 2023 10:29:48 +0800 (CST) From: Hongyu Wang To: gcc-patches@gcc.gnu.org Cc: ubizjak@gmail.com, hongtao.liu@intel.com Subject: [PATCH v2 00/17] Support Intel APX NDD Date: Tue, 5 Dec 2023 10:29:31 +0800 Message-Id: <20231205022948.504790-1-hongyu.wang@intel.com> X-Mailer: git-send-email 2.31.1 MIME-Version: 1.0 Received-SPF: softfail client-ip=192.55.52.136; envelope-from=wwwhhhyyy333@gmail.com; helo=mgamail.intel.com X-Spam_score_int: -28 X-Spam_score: -2.9 X-Spam_bar: -- X-Spam_report: (-2.9 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, FREEMAIL_ENVFROM_END_DIGIT=0.25, FREEMAIL_FORGED_FROMDOMAIN=0.249, FREEMAIL_FROM=0.001, HEADER_FROM_DIFFERENT_DOMAINS=0.25, RCVD_IN_DNSWL_MED=-2.3, SPF_HELO_NONE=0.001, SPF_SOFTFAIL=0.665, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-Spam-Status: No, score=-4.7 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, FREEMAIL_ENVFROM_END_DIGIT, FREEMAIL_FORGED_FROMDOMAIN, FREEMAIL_FROM, HEADER_FROM_DIFFERENT_DOMAINS, KAM_SHORT, SPF_HELO_PASS, SPF_SOFTFAIL, TXREP, T_SCC_BODY_TEXT_LINE autolearn=no autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.30 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: gcc-patches-bounces+patchwork=sourceware.org@gcc.gnu.org Hi, APX NDD patches have been posted at https://gcc.gnu.org/pipermail/gcc-patches/2023-November/636604.html Thanks to Hongtao's review, the V2 patch adds support of zext sematic with memory input as NDD by default clear upper bits of dest for any operand size. Also we support TImode shift with new split helper functions, which allows NDD form split but still restric the memory src usage as in post-reload splitter the register number is restricted, and no new register can be used for shld/shrd. Also fixed several typo/formatting/redundant code. Bootstrapped/regtested on x86_64-pc-linux-gnu{-m32,} and sde. OK for trunk? Hongyu Wang (8): [APX NDD] Restrict TImode register usage when NDD enabled [APX NDD] Disable seg_prefixed memory usage for NDD add [APX NDD] Support APX NDD for left shift insns [APX NDD] Support APX NDD for right shift insns [APX NDD] Support APX NDD for rotate insns [APX NDD] Support APX NDD for shld/shrd insns [APX NDD] Support APX NDD for cmove insns [APX NDD] Support TImode shift for NDD Kong Lingling (9): [APX NDD] Support Intel APX NDD for legacy add insn [APX NDD] Support APX NDD for optimization patterns of add [APX NDD] Support APX NDD for adc insns [APX NDD] Support APX NDD for sub insns [APX NDD] Support APX NDD for sbb insn [APX NDD] Support APX NDD for neg insn [APX NDD] Support APX NDD for not insn [APX NDD] Support APX NDD for and insn [APX NDD] Support APX NDD for or/xor insn gcc/config/i386/constraints.md | 5 + gcc/config/i386/i386-expand.cc | 164 +- gcc/config/i386/i386-options.cc | 2 + gcc/config/i386/i386-protos.h | 16 +- gcc/config/i386/i386.cc | 40 +- gcc/config/i386/i386.md | 2323 +++++++++++------ gcc/testsuite/gcc.target/i386/apx-ndd-adc.c | 15 + gcc/testsuite/gcc.target/i386/apx-ndd-cmov.c | 16 + gcc/testsuite/gcc.target/i386/apx-ndd-sbb.c | 6 + .../gcc.target/i386/apx-ndd-shld-shrd.c | 24 + .../gcc.target/i386/apx-ndd-ti-shift.c | 91 + gcc/testsuite/gcc.target/i386/apx-ndd.c | 202 ++ 12 files changed, 2149 insertions(+), 755 deletions(-) create mode 100644 gcc/testsuite/gcc.target/i386/apx-ndd-adc.c create mode 100644 gcc/testsuite/gcc.target/i386/apx-ndd-cmov.c create mode 100644 gcc/testsuite/gcc.target/i386/apx-ndd-sbb.c create mode 100644 gcc/testsuite/gcc.target/i386/apx-ndd-shld-shrd.c create mode 100644 gcc/testsuite/gcc.target/i386/apx-ndd-ti-shift.c create mode 100644 gcc/testsuite/gcc.target/i386/apx-ndd.c