[0/5] LoongArch: Add -mrecip option support

Message ID 20231128032938.17202-1-xujiahao@loongson.cn
Headers
Series LoongArch: Add -mrecip option support |

Message

Jiahao Xu Nov. 28, 2023, 3:29 a.m. UTC
  LoongArch V1.1 instructions adds support for approximate instructions, which are utilized along
with additional Newton-Raphson steps implement single precision floating-point division, square
root and reciprocal square root operations for better throughput. Control the generation of
approximate instructions by implementing '-mrecip' and '-mrecip='.

Jiahao Xu (5):
  LoongArch: Add support for approximate instructions.
  LoongArch: Use standard pattern name for xvfrsqrt/vfrsqrt
    instructions.
  LoongArch: Redefine pattern for xvfrecip/vfrecip instructions.
  LoongArch: New options -mrecip and -mrecip= with ffast-math.
  LoongArch: Vectorized loop unrolling is not performed on
    divf/sqrtf/rsqrtf with turns on -mrecip.

 gcc/config/loongarch/genopts/loongarch.opt.in |  11 +
 gcc/config/loongarch/lasx.md                  |  89 ++++++-
 gcc/config/loongarch/lasxintrin.h             |  32 +++
 gcc/config/loongarch/loongarch-builtins.cc    |  32 +++
 gcc/config/loongarch/loongarch-protos.h       |   2 +
 gcc/config/loongarch/loongarch.cc             | 252 +++++++++++++++++-
 gcc/config/loongarch/loongarch.h              |  18 ++
 gcc/config/loongarch/loongarch.md             | 104 ++++++--
 gcc/config/loongarch/loongarch.opt            |  11 +
 gcc/config/loongarch/lsx.md                   |  89 ++++++-
 gcc/config/loongarch/lsxintrin.h              |  32 +++
 gcc/config/loongarch/predicates.md            |   8 +
 gcc/doc/invoke.texi                           |  52 ++++
 .../gcc.target/loongarch/recip-divf.c         |   9 +
 .../gcc.target/loongarch/recip-sqrtf.c        |  23 ++
 .../loongarch/vector/lasx/lasx-recip-divf.c   |  12 +
 .../loongarch/vector/lasx/lasx-recip-sqrtf.c  |  28 ++
 .../loongarch/vector/lsx/lsx-recip-divf.c     |  12 +
 .../loongarch/vector/lsx/lsx-recip-sqrtf.c    |  28 ++
 19 files changed, 803 insertions(+), 41 deletions(-)
 create mode 100644 gcc/testsuite/gcc.target/loongarch/recip-divf.c
 create mode 100644 gcc/testsuite/gcc.target/loongarch/recip-sqrtf.c
 create mode 100644 gcc/testsuite/gcc.target/loongarch/vector/lasx/lasx-recip-divf.c
 create mode 100644 gcc/testsuite/gcc.target/loongarch/vector/lasx/lasx-recip-sqrtf.c
 create mode 100644 gcc/testsuite/gcc.target/loongarch/vector/lsx/lsx-recip-divf.c
 create mode 100644 gcc/testsuite/gcc.target/loongarch/vector/lsx/lsx-recip-sqrtf.c