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Ip=[63.35.35.123]; Helo=[64aa7808-outbound-1.mta.getcheckrecipient.com] X-MS-Exchange-CrossTenant-AuthSource: DBAEUR03FT012.eop-EUR03.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: GVXPR08MB7869 X-Spam-Status: No, score=-5.9 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, FORGED_SPF_HELO, KAM_DMARC_NONE, KAM_SHORT, RCVD_IN_DNSWL_NONE, RCVD_IN_MSPIKE_H2, SPF_HELO_PASS, SPF_NONE, TXREP, UNPARSEABLE_RELAY autolearn=no autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-Patchwork-Original-From: Andrea Corallo via Gcc-patches From: Andrea Corallo Reply-To: Andrea Corallo Errors-To: gcc-patches-bounces+patchwork=sourceware.org@gcc.gnu.org Sender: "Gcc-patches" Hi all, this is the first patch series about improving the current MVE implementation and testsuite for: - Complete intrinsic implementation and coverage (the list of intrinsics is specified by [1]) - Verifying all instructions supposedly emitted by each intrinsic - Verifying register usage - Fixing the current scan assemblers to really match the wanted mnemonics - Verifying no external calls are emitted This series fixes the backend where necessary. Best Regards Andrea Andrea Corallo (31): arm: improve vcreateq* tests arm: fix 'vmsr' spacing and register capitalization arm: improve tests and fix vddupq* arm: improve tests and fix vdwdupq* arm: improve vidupq* tests arm: improve tests and fix vdupq* arm: improve tests and fix vcmp* arm: improve tests for vmin* arm: improve tests for vmax* arm: improve tests for vabavq* arm: improve tests for vabdq* arm: improve tests and fix vabsq* arm: improve tests and fix vadd* arm: improve tests for vmulq* arm: improve tests and fix vsubq* arm: improve tests for vfmasq_m* arm: improve tests for vhaddq_m* arm: improve tests for vhsubq_m* arm: improve tests for viwdupq* arm: improve tests for vmladavaq* arm: improve tests and fix vmlaldavaxq* arm: improve tests for vmlasq* arm: improve tests for vqaddq_m* arm: improve tests for vqdmlahq_m* arm: improve tests for vqdmul* arm: improve tests for vqrdmlahq* arm: improve tests for vqrdmlashq_m* arm: improve tests for vqsubq* arm: improve tests and fix vrmlaldavhaq* arm: improve tests for vrshlq* arm: improve tests for vsetq_lane* Stam Markianos-Wright (4): arm: further fix overloading of MVE vaddq[_m]_n intrinsic arm: propagate fixed overloading of MVE intrinsic scalar parameters arm: Explicitly specify other float types for _Generic overloading [PR107515] arm: Add integer vector overloading of vsubq_x instrinsic gcc/config/arm/arm_mve.h | 1232 +++++++++-------- gcc/config/arm/mve.md | 48 +- gcc/config/arm/vfp.md | 8 +- .../arm/mve/intrinsics/vabavq_p_s16.c | 40 +- .../arm/mve/intrinsics/vabavq_p_s32.c | 40 +- .../arm/mve/intrinsics/vabavq_p_s8.c | 40 +- .../arm/mve/intrinsics/vabavq_p_u16.c | 40 +- .../arm/mve/intrinsics/vabavq_p_u32.c | 40 +- .../arm/mve/intrinsics/vabavq_p_u8.c | 40 +- .../arm/mve/intrinsics/vabavq_s16.c | 28 +- .../arm/mve/intrinsics/vabavq_s32.c | 28 +- .../gcc.target/arm/mve/intrinsics/vabavq_s8.c | 28 +- .../arm/mve/intrinsics/vabavq_u16.c | 28 +- .../arm/mve/intrinsics/vabavq_u32.c | 28 +- .../gcc.target/arm/mve/intrinsics/vabavq_u8.c | 28 +- .../gcc.target/arm/mve/intrinsics/vabdq_f16.c | 16 +- .../gcc.target/arm/mve/intrinsics/vabdq_f32.c | 16 +- .../arm/mve/intrinsics/vabdq_m_f16.c | 26 +- .../arm/mve/intrinsics/vabdq_m_f32.c | 26 +- .../arm/mve/intrinsics/vabdq_m_s16.c | 26 +- .../arm/mve/intrinsics/vabdq_m_s32.c | 26 +- .../arm/mve/intrinsics/vabdq_m_s8.c | 26 +- .../arm/mve/intrinsics/vabdq_m_u16.c | 26 +- .../arm/mve/intrinsics/vabdq_m_u32.c | 26 +- .../arm/mve/intrinsics/vabdq_m_u8.c | 26 +- .../gcc.target/arm/mve/intrinsics/vabdq_s16.c | 16 +- .../gcc.target/arm/mve/intrinsics/vabdq_s32.c | 16 +- .../gcc.target/arm/mve/intrinsics/vabdq_s8.c | 16 +- .../gcc.target/arm/mve/intrinsics/vabdq_u16.c | 16 +- .../gcc.target/arm/mve/intrinsics/vabdq_u32.c | 16 +- .../gcc.target/arm/mve/intrinsics/vabdq_u8.c | 16 +- .../arm/mve/intrinsics/vabdq_x_f16.c | 25 +- .../arm/mve/intrinsics/vabdq_x_f32.c | 25 +- .../arm/mve/intrinsics/vabdq_x_s16.c | 26 +- .../arm/mve/intrinsics/vabdq_x_s32.c | 25 +- .../arm/mve/intrinsics/vabdq_x_s8.c | 25 +- .../arm/mve/intrinsics/vabdq_x_u16.c | 25 +- .../arm/mve/intrinsics/vabdq_x_u32.c | 25 +- .../arm/mve/intrinsics/vabdq_x_u8.c | 25 +- .../gcc.target/arm/mve/intrinsics/vabsq_f16.c | 22 +- .../gcc.target/arm/mve/intrinsics/vabsq_f32.c | 22 +- .../arm/mve/intrinsics/vabsq_m_f16.c | 25 +- .../arm/mve/intrinsics/vabsq_m_f32.c | 25 +- .../arm/mve/intrinsics/vabsq_m_s16.c | 25 +- .../arm/mve/intrinsics/vabsq_m_s32.c | 25 +- .../arm/mve/intrinsics/vabsq_m_s8.c | 25 +- .../gcc.target/arm/mve/intrinsics/vabsq_s16.c | 20 +- .../gcc.target/arm/mve/intrinsics/vabsq_s32.c | 20 +- .../gcc.target/arm/mve/intrinsics/vabsq_s8.c | 16 +- .../arm/mve/intrinsics/vabsq_x_f16.c | 25 +- .../arm/mve/intrinsics/vabsq_x_f32.c | 25 +- .../arm/mve/intrinsics/vabsq_x_s16.c | 25 +- .../arm/mve/intrinsics/vabsq_x_s32.c | 25 +- .../arm/mve/intrinsics/vabsq_x_s8.c | 25 +- .../arm/mve/intrinsics/vaddlvaq_p_s32.c | 24 +- .../arm/mve/intrinsics/vaddlvaq_p_u32.c | 40 +- .../arm/mve/intrinsics/vaddlvaq_s32.c | 16 +- .../arm/mve/intrinsics/vaddlvaq_u32.c | 28 +- .../arm/mve/intrinsics/vaddlvq_p_s32.c | 24 +- .../arm/mve/intrinsics/vaddlvq_p_u32.c | 24 +- .../arm/mve/intrinsics/vaddlvq_s32.c | 22 +- .../arm/mve/intrinsics/vaddlvq_u32.c | 20 +- .../gcc.target/arm/mve/intrinsics/vaddq_f16.c | 16 +- .../gcc.target/arm/mve/intrinsics/vaddq_f32.c | 16 +- .../arm/mve/intrinsics/vaddq_m_f16.c | 26 +- .../arm/mve/intrinsics/vaddq_m_f32.c | 26 +- .../arm/mve/intrinsics/vaddq_m_n_f16.c | 42 +- .../arm/mve/intrinsics/vaddq_m_n_f32.c | 42 +- .../arm/mve/intrinsics/vaddq_m_n_s16.c | 26 +- .../arm/mve/intrinsics/vaddq_m_n_s32.c | 26 +- .../arm/mve/intrinsics/vaddq_m_n_s8.c | 26 +- .../arm/mve/intrinsics/vaddq_m_n_u16.c | 42 +- .../arm/mve/intrinsics/vaddq_m_n_u32.c | 42 +- .../arm/mve/intrinsics/vaddq_m_n_u8.c | 42 +- .../arm/mve/intrinsics/vaddq_m_s16.c | 26 +- .../arm/mve/intrinsics/vaddq_m_s32.c | 26 +- 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.../gcc.target/arm/mve/intrinsics/vsubq_u16.c | 16 +- .../gcc.target/arm/mve/intrinsics/vsubq_u32.c | 16 +- .../gcc.target/arm/mve/intrinsics/vsubq_u8.c | 16 +- .../arm/mve/intrinsics/vsubq_x_f16.c | 32 +- .../arm/mve/intrinsics/vsubq_x_f32.c | 32 +- .../arm/mve/intrinsics/vsubq_x_n_f16.c | 48 +- .../arm/mve/intrinsics/vsubq_x_n_f32.c | 48 +- .../arm/mve/intrinsics/vsubq_x_n_s16.c | 32 +- .../arm/mve/intrinsics/vsubq_x_n_s32.c | 32 +- .../arm/mve/intrinsics/vsubq_x_n_s8.c | 32 +- .../arm/mve/intrinsics/vsubq_x_n_u16.c | 48 +- .../arm/mve/intrinsics/vsubq_x_n_u32.c | 48 +- .../arm/mve/intrinsics/vsubq_x_n_u8.c | 48 +- .../arm/mve/intrinsics/vsubq_x_s16.c | 32 +- .../arm/mve/intrinsics/vsubq_x_s32.c | 32 +- .../arm/mve/intrinsics/vsubq_x_s8.c | 32 +- .../arm/mve/intrinsics/vsubq_x_u16.c | 32 +- .../arm/mve/intrinsics/vsubq_x_u32.c | 32 +- .../arm/mve/intrinsics/vsubq_x_u8.c | 32 +- 868 files changed, 22007 insertions(+), 3613 deletions(-) --- 2.25.1