From patchwork Tue May 24 21:47:00 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Philipp Tomsich X-Patchwork-Id: 54356 Return-Path: X-Original-To: patchwork@sourceware.org Delivered-To: patchwork@sourceware.org Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id 06DB8385482D for ; Tue, 24 May 2022 21:47:27 +0000 (GMT) X-Original-To: gcc-patches@gcc.gnu.org Delivered-To: gcc-patches@gcc.gnu.org Received: from mail-lf1-x12c.google.com (mail-lf1-x12c.google.com [IPv6:2a00:1450:4864:20::12c]) by sourceware.org (Postfix) with ESMTPS id 0188F3857BAC for ; Tue, 24 May 2022 21:47:11 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.1 sourceware.org 0188F3857BAC Authentication-Results: sourceware.org; dmarc=none (p=none dis=none) header.from=vrull.eu Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=vrull.eu Received: by mail-lf1-x12c.google.com with SMTP id p22so32991949lfo.10 for ; Tue, 24 May 2022 14:47:10 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=vrull.eu; s=google; h=from:to:cc:subject:date:message-id:mime-version :content-transfer-encoding; bh=kaTqChh50gfu0KpqIDCQuEVTa0mn4xYV5xPUtI+HH+Q=; b=huAdEe9LlKsi6KfyiWsqc+so1zJpfCrrYpFQQmahACmF5l73LpV55bdkcSWsL5WiMV vCcA8ln80T4Es4+Z0kNcrDTGgdGqjfWSMzjL3OpRbP76n9l4XhCh/n0sQfaLZEk3loE/ 1vdhDw3crww6kvSs9rSbKQnMol4t8s9pw5+fuzrUREuKCzsE3031Xhwha+Bcpw2xazYj PefrS+d3lwsRHZyz1FdZguKIUKjWlz2xFQkbziQa+JmaMCzzvXuL2i0bjsHXwvKuw+3o rp68/q1ffozTG9VPEI3iDi9i/eEW40M/XXvBHXBJZ+GvMmYYqQh6AHfKbEU77BN090Dy YWUA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:mime-version :content-transfer-encoding; bh=kaTqChh50gfu0KpqIDCQuEVTa0mn4xYV5xPUtI+HH+Q=; b=Atw8dWAn1yoYz3fik82Sc+ACbR9fLvwSujVIOqX+FtbfZEsFqRiLCBgR+lo9tREspv U3ENS5MphAUBS/Fp+XJawsHS51p5eRF5Vif5fS1DHPJeTDHFamTKGZ3yJZll5ip0AER6 mR7/f/RlHoV5Pnt1il0hk5C1L5fpFCkpu6IOj1uzGtlmHe3yHUtHdYypqOHBQUXv9hWV FZUsgiPhJazzeMKV8UuOlvxYOmipfWyWrmuY5yat+aRbWzHPnb+33ia6phxqWfwqEo0u OnY8GXyDEuy+5P+fobHlCx29sCNKRMV6NsDZAD6qAi5xDFDACFihvatq5Lc7KHodIeu6 3Paw== X-Gm-Message-State: AOAM5338W1DRplYnNXBB563Z5NG6+2AFF/JGLvTzAhEUN/q9rN0acGj9 HB49AwIb1q5NtG8rmNNMsay+hS79p5yQeu4E X-Google-Smtp-Source: ABdhPJzrtce1rYf+db+9fJxatWIycdb17i48FgeZeWOgOVHBLvLi1xcBmkL+jNDavza8WgdY4v28dA== X-Received: by 2002:a05:6512:1321:b0:477:9f1a:a5dd with SMTP id x33-20020a056512132100b004779f1aa5ddmr20907312lfu.443.1653428829208; Tue, 24 May 2022 14:47:09 -0700 (PDT) Received: from ubuntu-focal.. ([2a01:4f9:3a:1e26::2]) by smtp.gmail.com with ESMTPSA id c17-20020a2e9d91000000b0024f3d1dae98sm2724165ljj.32.2022.05.24.14.47.07 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 24 May 2022 14:47:08 -0700 (PDT) From: Philipp Tomsich To: gcc-patches@gcc.gnu.org Subject: [PATCH v1 0/3] RISC-V: Improve sequences with shifted zero-extended operands Date: Tue, 24 May 2022 23:47:00 +0200 Message-Id: <20220524214703.4022737-1-philipp.tomsich@vrull.eu> X-Mailer: git-send-email 2.34.1 MIME-Version: 1.0 X-Spam-Status: No, score=-5.4 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, DKIM_VALID_EF, JMQ_SPF_NEUTRAL, KAM_SHORT, RCVD_IN_DNSWL_NONE, SPF_HELO_NONE, SPF_PASS, TXREP, T_SCC_BODY_TEXT_LINE autolearn=no autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Andrew Waterman , Vineet Gupta , Kito Cheng , Philipp Tomsich Errors-To: gcc-patches-bounces+patchwork=sourceware.org@gcc.gnu.org Sender: "Gcc-patches" Code-generation currently misses some opportunities for optimized sequences when zero-extension is combined with shifts. Philipp Tomsich (3): RISC-V: add consecutive_bits_operand predicate RISC-V: Split slli+sh[123]add.uw opportunities to avoid zext.w RISC-V: Replace zero_extendsidi2_shifted with generalized split gcc/config/riscv/bitmanip.md | 44 ++++++++++++++++++++++ gcc/config/riscv/predicates.md | 11 ++++++ gcc/config/riscv/riscv.md | 37 +++++++++--------- gcc/testsuite/gcc.target/riscv/zba-shadd.c | 13 +++++++ 4 files changed, 88 insertions(+), 17 deletions(-) create mode 100644 gcc/testsuite/gcc.target/riscv/zba-shadd.c