From patchwork Tue May 10 03:25:23 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: yulong X-Patchwork-Id: 53690 Return-Path: X-Original-To: patchwork@sourceware.org Delivered-To: patchwork@sourceware.org Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id F0D823870C27 for ; Tue, 10 May 2022 03:26:10 +0000 (GMT) X-Original-To: gcc-patches@gcc.gnu.org Delivered-To: gcc-patches@gcc.gnu.org Received: from cstnet.cn (smtp21.cstnet.cn [159.226.251.21]) by sourceware.org (Postfix) with ESMTP id 059883856DC5 for ; Tue, 10 May 2022 03:25:52 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.1 sourceware.org 059883856DC5 Authentication-Results: sourceware.org; dmarc=none (p=none dis=none) header.from=iscas.ac.cn Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=iscas.ac.cn Received: from localhost.localdomain (unknown [47.88.16.30]) by APP-01 (Coremail) with SMTP id qwCowAAHnhU323lioBtBBQ--.37585S2; Tue, 10 May 2022 11:25:46 +0800 (CST) From: shiyulong@iscas.ac.cn To: gcc-patches@gcc.gnu.org Subject: [PATCH V4 0/3] RISC-V:Add mininal support for Zicbo[mzp] Date: Tue, 10 May 2022 11:25:23 +0800 Message-Id: <20220510032526.11560-1-shiyulong@iscas.ac.cn> X-Mailer: git-send-email 2.17.1 X-CM-TRANSID: qwCowAAHnhU323lioBtBBQ--.37585S2 X-Coremail-Antispam: 1UD129KBjvJXoW7uF4UZrWrGw15tr4rJr4fZrb_yoW8tr4kpF 47Gw1Yyry5AF97Grs3KFyUXa15GrsagrW5uwn7Aw1xtrWSyrW2yF1ktw17CF45XFyUJryx CF4a93W5uw1Yv3DanT9S1TB71UUUUUUqnTZGkaVYY2UrUUUUjbIjqfuFe4nvWSU5nxnvy2 9KBjDU0xBIdaVrnRJUUUkm14x267AKxVW8JVW5JwAFc2x0x2IEx4CE42xK8VAvwI8IcIk0 rVWrJVCq3wAFIxvE14AKwVWUJVWUGwA2ocxC64kIII0Yj41l84x0c7CEw4AK67xGY2AK02 1l84ACjcxK6xIIjxv20xvE14v26r4j6ryUM28EF7xvwVC0I7IYx2IY6xkF7I0E14v26r4j 6F4UM28EF7xvwVC2z280aVAFwI0_Gr1j6F4UJwA2z4x0Y4vEx4A2jsIEc7CjxVAFwI0_Cr 1j6rxdM2AIxVAIcxkEcVAq07x20xvEncxIr21l5I8CrVACY4xI64kE6c02F40Ex7xfMcIj 6xIIjxv20xvE14v26r1j6r18McIj6I8E87Iv67AKxVWUJVW8JwAm72CE4IkC6x0Yz7v_Jr 0_Gr1lF7xvr2IYc2Ij64vIr41lF7I21c0EjII2zVCS5cI20VAGYxC7M4kE6xkIj40Ew7xC 0wCF04k20xvY0x0EwIxGrwCFx2IqxVCFs4IE7xkEbVWUJVW8JwC20s026c02F40E14v26r 1j6r18MI8I3I0E7480Y4vE14v26r106r1rMI8E67AF67kF1VAFwI0_Jw0_GFylIxkGc2Ij 64vIr41lIxAIcVC0I7IYx2IY67AKxVWUJVWUCwCI42IY6xIIjxv20xvEc7CjxVAFwI0_Jr 0_Gr1lIxAIcVCF04k26cxKx2IYs7xG6rW3Jr0E3s1lIxAIcVC2z280aVAFwI0_Jr0_Gr1l IxAIcVC2z280aVCY1x0267AKxVWUJVW8JbIYCTnIWIevJa73UjIFyTuYvjfUOxhLUUUUU X-Originating-IP: [47.88.16.30] X-CM-SenderInfo: 5vkl53porqwq5lvft2wodfhubq/ X-Spam-Status: No, score=-6.1 required=5.0 tests=BAYES_00, KAM_DMARC_STATUS, KAM_SHORT, SPF_HELO_PASS, SPF_PASS, TXREP, T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.4 X-Spam-Checker-Version: SpamAssassin 3.4.4 (2020-01-24) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: andrew@sifive.com, yulong , kito.cheng@gmail.com, jiawei@iscas.ac.cn, wuwei2016@iscas.ac.cn, shihua@iscas.ac.cn Errors-To: gcc-patches-bounces+patchwork=sourceware.org@gcc.gnu.org Sender: "Gcc-patches" From: yulong This patchset adds support for three recently ratified RISC-V extensions: - Zicbom (Cache-Block Management Instructions) - Zicbop (Cache-Block Prefetch hint instructions) - Zicboz (Cache-Block Zero Instructions) Patch 1: Add Zicbom/z/p mininal support Patch 2: Add Zicbom/z/p instructions arch support Patch 3: Add Zicbom/z/p instructions testcases diff with the previous version: We use unspec_volatile instead of unspec for those cache operations, and move those UNSPEC from unspec to unspecv. 19 20 cf. ; yulong (3): RISC-V: Add mininal support for Zicbo[mzp] RISC-V:Cache Management Operation instructions RISC-V:Cache Management Operation instructions testcases gcc/common/config/riscv/riscv-common.cc | 8 +++ gcc/config/riscv/predicates.md | 4 ++ gcc/config/riscv/riscv-builtins.cc | 16 ++++++ gcc/config/riscv/riscv-cmo.def | 17 +++++++ gcc/config/riscv/riscv-ftypes.def | 4 ++ gcc/config/riscv/riscv-opts.h | 8 +++ gcc/config/riscv/riscv.md | 51 +++++++++++++++++++ gcc/config/riscv/riscv.opt | 3 ++ gcc/testsuite/gcc.target/riscv/cmo-zicbom-1.c | 21 ++++++++ gcc/testsuite/gcc.target/riscv/cmo-zicbom-2.c | 21 ++++++++ gcc/testsuite/gcc.target/riscv/cmo-zicbop-1.c | 23 +++++++++ gcc/testsuite/gcc.target/riscv/cmo-zicbop-2.c | 23 +++++++++ gcc/testsuite/gcc.target/riscv/cmo-zicboz-1.c | 9 ++++ gcc/testsuite/gcc.target/riscv/cmo-zicboz-2.c | 9 ++++ 14 files changed, 217 insertions(+) create mode 100644 gcc/config/riscv/riscv-cmo.def create mode 100644 gcc/testsuite/gcc.target/riscv/cmo-zicbom-1.c create mode 100644 gcc/testsuite/gcc.target/riscv/cmo-zicbom-2.c create mode 100644 gcc/testsuite/gcc.target/riscv/cmo-zicbop-1.c create mode 100644 gcc/testsuite/gcc.target/riscv/cmo-zicbop-2.c create mode 100644 gcc/testsuite/gcc.target/riscv/cmo-zicboz-1.c create mode 100644 gcc/testsuite/gcc.target/riscv/cmo-zicboz-2.c