From patchwork Fri Mar 25 06:20:52 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: yulong@nj.iscas.ac.cn X-Patchwork-Id: 52339 Return-Path: X-Original-To: patchwork@sourceware.org Delivered-To: patchwork@sourceware.org Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id 06FAC3888839 for ; Fri, 25 Mar 2022 06:21:38 +0000 (GMT) X-Original-To: gcc-patches@gcc.gnu.org Delivered-To: gcc-patches@gcc.gnu.org Received: from cstnet.cn (smtp25.cstnet.cn [159.226.251.25]) by sourceware.org (Postfix) with ESMTP id 7B5BB3858C2C for ; Fri, 25 Mar 2022 06:21:19 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.1 sourceware.org 7B5BB3858C2C Authentication-Results: sourceware.org; dmarc=none (p=none dis=none) header.from=nj.iscas.ac.cn Authentication-Results: sourceware.org; spf=none smtp.mailfrom=nj.iscas.ac.cn Received: from localhost.localdomain (unknown [47.88.16.30]) by APP-05 (Coremail) with SMTP id zQCowADHp_BWXz1irxxZBQ--.43295S2; Fri, 25 Mar 2022 14:21:13 +0800 (CST) From: yulong@nj.iscas.ac.cn To: gcc-patches@gcc.gnu.org Subject: [PATCH 0/3] RISC-V: Add Ratified Cache Management Operation ISA Extensions Date: Fri, 25 Mar 2022 14:20:52 +0800 Message-Id: <20220325062055.12816-1-yulong@nj.iscas.ac.cn> X-Mailer: git-send-email 2.17.1 X-CM-TRANSID: zQCowADHp_BWXz1irxxZBQ--.43295S2 X-Coremail-Antispam: 1UD129KBjvJXoW7uF4UZrW7XFWrAry8CFWrGrg_yoW8tFykpF 47Gw1Yyry5JF9rGrs3KFyUXa1akr9agrW5uwn7Aw1xtrWSvrW2yF1ktw17CF4UXFyUJryf uF4a9w15uw1jv3DanT9S1TB71UUUUU7qnTZGkaVYY2UrUUUUjbIjqfuFe4nvWSU5nxnvy2 9KBjDU0xBIdaVrnRJUUU9l14x267AKxVW8JVW5JwAFc2x0x2IEx4CE42xK8VAvwI8IcIk0 rVWrJVCq3wAFIxvE14AKwVWUJVWUGwA2ocxC64kIII0Yj41l84x0c7CEw4AK67xGY2AK02 1l84ACjcxK6xIIjxv20xvE14v26r1I6r4UM28EF7xvwVC0I7IYx2IY6xkF7I0E14v26r4j 6F4UM28EF7xvwVC2z280aVAFwI0_Cr0_Gr1UM28EF7xvwVC2z280aVCY1x0267AKxVW8Jr 0_Cr1UM2AIxVAIcxkEcVAq07x20xvEncxIr21l5I8CrVACY4xI64kE6c02F40Ex7xfMcIj 6xIIjxv20xvE14v26r106r15McIj6I8E87Iv67AKxVWUJVW8JwAm72CE4IkC6x0Yz7v_Jr 0_Gr1lF7xvr2IYc2Ij64vIr41lF7I21c0EjII2zVCS5cI20VAGYxC7M4IIrI8v6xkF7I0E 8cxan2IY04v7M4kE6xkIj40Ew7xC0wCY02Avz4vE174l42xK82IYc2Ij64vIr41l4I8I3I 0E4IkC6x0Yz7v_Jr0_Gr1lx2IqxVAqx4xG67AKxVWUJVWUGwC20s026x8GjcxK67AKxVWU GVWUWwC2zVAF1VAY17CE14v26r1q6r43MIIYrxkI7VAKI48JMIIF0xvE2Ix0cI8IcVAFwI 0_Jr0_JF4lIxAIcVC0I7IYx2IY6xkF7I0E14v26r4j6F4UMIIF0xvE42xK8VAvwI8IcIk0 rVWrJr0_WFyUJwCI42IY6I8E87Iv67AKxVWUJVW8JwCI42IY6I8E87Iv6xkF7I0E14v26r 4j6r4UJbIYCTnIWIevJa73UjIFyTuYvjfUbPfHUUUUU X-Originating-IP: [47.88.16.30] X-CM-SenderInfo: p1xo00fj6qyh5lvft2wodfhubq/ X-Spam-Status: No, score=-0.2 required=5.0 tests=BAYES_00, FORGED_SPF_HELO, KAM_DMARC_STATUS, KAM_LAZY_DOMAIN_SECURITY, KAM_SHORT, SPF_HELO_PASS, SPF_NONE, TXREP, T_SCC_BODY_TEXT_LINE autolearn=no autolearn_force=no version=3.4.4 X-Spam-Checker-Version: SpamAssassin 3.4.4 (2020-01-24) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: cmuellner@ventanamicro.com, ptomsich@ventanamicro.com, andrew@sifive.com, sinan@isrc.iscas.ac.cn, kito.cheng@gmail.com, jiawei@iscas.ac.cn, wuwei2016@iscas.ac.cn, yulong-plct , shihua@iscas.ac.cn Errors-To: gcc-patches-bounces+patchwork=sourceware.org@gcc.gnu.org Sender: "Gcc-patches" From: yulong-plct This patchset adds support for three recently ratified RISC-V extensions: - Zicbom (Cache-Block Management Instructions) - Zicbop (Cache-Block Prefetch hint instructions) - Zicboz (Cache-Block Zero Instructions) The naming of builtin caused oddities, so in this release we have changed the names of builtin. For example, change "__builtin_riscv_zero()" to "__builtin_riscv_zicboz_cbo_zero" Patch 1: Add Zicbom/z/p mininal support Patch 2: Add Zicbom/z/p instructions arch support Patch 3: Add Zicbom/z/p instructions testcases cf. ; *** BLURB HERE *** yulong-plct (3): RISC-V: Add mininal support for Zicbo[mzp] RISC-V:Cache Management Operation instructions RISC-V:Cache Management Operation instructions testcases gcc/common/config/riscv/riscv-common.cc | 6 +++ gcc/config/riscv/predicates.md | 4 ++ gcc/config/riscv/riscv-builtins.cc | 16 ++++++ gcc/config/riscv/riscv-cmo.def | 17 ++++++ gcc/config/riscv/riscv-ftypes.def | 4 ++ gcc/config/riscv/riscv-opts.h | 9 ++++ gcc/config/riscv/riscv.md | 52 +++++++++++++++++++ gcc/config/riscv/riscv.opt | 3 ++ gcc/testsuite/gcc.target/riscv/cmo-zicbom-1.c | 21 ++++++++ gcc/testsuite/gcc.target/riscv/cmo-zicbom-2.c | 21 ++++++++ gcc/testsuite/gcc.target/riscv/cmo-zicbop-1.c | 23 ++++++++ gcc/testsuite/gcc.target/riscv/cmo-zicbop-2.c | 23 ++++++++ gcc/testsuite/gcc.target/riscv/cmo-zicboz-1.c | 9 ++++ gcc/testsuite/gcc.target/riscv/cmo-zicboz-2.c | 9 ++++ 14 files changed, 217 insertions(+) create mode 100644 gcc/config/riscv/riscv-cmo.def create mode 100644 gcc/testsuite/gcc.target/riscv/cmo-zicbom-1.c create mode 100644 gcc/testsuite/gcc.target/riscv/cmo-zicbom-2.c create mode 100644 gcc/testsuite/gcc.target/riscv/cmo-zicbop-1.c create mode 100644 gcc/testsuite/gcc.target/riscv/cmo-zicbop-2.c create mode 100644 gcc/testsuite/gcc.target/riscv/cmo-zicboz-1.c create mode 100644 gcc/testsuite/gcc.target/riscv/cmo-zicboz-2.c