From patchwork Sun Oct 31 09:34:24 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: siyu@isrc.iscas.ac.cn X-Patchwork-Id: 46849 Return-Path: X-Original-To: patchwork@sourceware.org Delivered-To: patchwork@sourceware.org Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id A4F623858427 for ; Sun, 31 Oct 2021 09:37:35 +0000 (GMT) X-Original-To: gcc-patches@gcc.gnu.org Delivered-To: gcc-patches@gcc.gnu.org Received: from cstnet.cn (smtp21.cstnet.cn [159.226.251.21]) by sourceware.org (Postfix) with ESMTP id 3F2F2385800F for ; Sun, 31 Oct 2021 09:34:50 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.1 sourceware.org 3F2F2385800F Authentication-Results: sourceware.org; dmarc=none (p=none dis=none) header.from=isrc.iscas.ac.cn Authentication-Results: sourceware.org; spf=none smtp.mailfrom=isrc.iscas.ac.cn Received: from localhost.localdomain (unknown [221.216.140.210]) by APP-01 (Coremail) with SMTP id qwCowAB3QCM1Y35h2GgQBg--.15675S2; Sun, 31 Oct 2021 17:34:45 +0800 (CST) From: siyu@isrc.iscas.ac.cn To: gcc-patches@gcc.gnu.org Subject: [PATCH 00/21] RISC-V: add gcc support for Scalar Cryptography v1.0.0-rc5 Date: Sun, 31 Oct 2021 17:34:24 +0800 Message-Id: <20211031093445.1414518-1-siyu@isrc.iscas.ac.cn> X-Mailer: git-send-email 2.25.1 MIME-Version: 1.0 X-CM-TRANSID: qwCowAB3QCM1Y35h2GgQBg--.15675S2 X-Coremail-Antispam: 1UD129KBjvJXoWxAw48GFWfJr1xGFy8Kr4fAFb_yoW5Zw4Upa n3GayYyry5JFZrGrn3t3WxWr4rAwsYgrW5uw1xXw1jyrZ5trWFyFs3Kw13JF43JF1jqrna 9F4Ik3W5Cw12vFJanT9S1TB71UUUUUUqnTZGkaVYY2UrUUUUjbIjqfuFe4nvWSU5nxnvy2 9KBjDU0xBIdaVrnRJUUU9G14x267AKxVW8JVW5JwAFc2x0x2IEx4CE42xK8VAvwI8IcIk0 rVWrJVCq3wAFIxvE14AKwVWUJVWUGwA2ocxC64kIII0Yj41l84x0c7CEw4AK67xGY2AK02 1l84ACjcxK6xIIjxv20xvE14v26r1j6r1xM28EF7xvwVC0I7IYx2IY6xkF7I0E14v26r4j 6F4UM28EF7xvwVC2z280aVAFwI0_Gr0_Cr1l84ACjcxK6I8E87Iv6xkF7I0E14v26r4j6r 4UJwAS0I0E0xvYzxvE52x082IY62kv0487Mc02F40EFcxC0VAKzVAqx4xG6I80ewAv7VC0 I7IYx2IY67AKxVWUGVWUXwAv7VC2z280aVAFwI0_Jr0_Gr1lOx8S6xCaFVCjc4AY6r1j6r 4UM4x0Y48IcxkI7VAKI48JM4x0x7Aq67IIx4CEVc8vx2IErcIFxwACI402YVCY1x02628v n2kIc2xKxwAKzVCY07xG64k0F24lc2xSY4AK67AK6r4fMxAIw28IcxkI7VAKI48JMxC20s 026xCaFVCjc4AY6r1j6r4UMI8I3I0E5I8CrVAFwI0_Jr0_Jr4lx2IqxVCjr7xvwVAFwI0_ JrI_JrWlx4CE17CEb7AF67AKxVWUtVW8ZwCIc40Y0x0EwIxGrwCI42IY6xIIjxv20xvE14 v26r1j6r1xMIIF0xvE2Ix0cI8IcVCY1x0267AKxVW8JVWxJwCI42IY6xAIw20EY4v20xva j40_Wr1j6rW3Jr1lIxAIcVC2z280aVAFwI0_Gr0_Cr1lIxAIcVC2z280aVCY1x0267AKxV W8JVW8JrUvcSsGvfC2KfnxnUUI43ZEXa7VUbxR67UUUUU== X-Originating-IP: [221.216.140.210] X-CM-SenderInfo: pvl13qplvuuh5lvft2wodfhubq/1tbiCQkLCl02aqOE0gABs0 X-Spam-Status: No, score=2.8 required=5.0 tests=BAYES_00, FORGED_SPF_HELO, KAM_DMARC_STATUS, KAM_LAZY_DOMAIN_SECURITY, KAM_NUMSUBJECT, KAM_SHORT, RCVD_IN_BARRACUDACENTRAL, SPF_HELO_PASS, SPF_NONE, TXREP autolearn=no autolearn_force=no version=3.4.4 X-Spam-Level: ** X-Spam-Checker-Version: SpamAssassin 3.4.4 (2020-01-24) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: ben.marshall@pqshield.com, cmuellner@ventanamicro.com, andrew@sifive.com, Richard.Newell@microchip.com, jiawei@iscas.ac.cn, mjos@pqshield.com, kito.cheng@sifive.com Errors-To: gcc-patches-bounces+patchwork=sourceware.org@gcc.gnu.org Sender: "Gcc-patches" From: SiYu Wu This patch add gcc backend support for RISC-V Scalar Cryptography Extension (k-ext), including machine description, builtins defines and testcases for each k-ext's subset. A note about Zbkx: The Zbkx should be implemented in bitmanip's Zbp, but since zbp is not included in the bitmanip spec v1.0, and crypto's v1.0 release will earlier than bitmanip's next release, so for now we implementing it here. SiYu Wu (19): [crypto]: add machine description for Zknd and Zkne [crypto]: add builtins for Zknd and Zkne [crypto]: add testcases for Zknd and Zkne [crypto]: add machine description for Zknh [crypto]: add builtins for Zknh [crypto]: add testcases for Zknh [crypto]: add machine description for Zksed [crypto]: add builtins for Zksed [crypto]: add testcases for Zksed [crypto]: add machine description for Zksh [crypto]: add builtins for Zksh [crypto]: add testcases for Zksh [crypto]: add option defines for Zkr and Zkt [crypto]: add option defines for Zbkb, Zbkc and Zbkx [crypto]: add implied defines of Zk, Zkn and Zks change z* subset assert to allow "zk" [crypto]: add machine description for Zbkx [crypto]: add builtins for Zbkx [crypto]: add testcases for Zbkx jiawei (1): Fix attribute bugs due to zicsr/zifencei linsinan1995 (1): Fix riscv_expand_block_move gcc/common/config/riscv/riscv-common.c | 39 ++- gcc/config/riscv/arch-canonicalize | 18 +- gcc/config/riscv/crypto.md | 319 ++++++++++++++++++ gcc/config/riscv/riscv-builtins-crypto.def | 76 +++++ gcc/config/riscv/riscv-builtins.c | 25 ++ gcc/config/riscv/riscv-ftypes.def | 6 + gcc/config/riscv/riscv-opts.h | 21 ++ gcc/config/riscv/riscv.c | 2 +- gcc/config/riscv/riscv.md | 4 +- gcc/config/riscv/riscv.opt | 3 + gcc/testsuite/gcc.target/riscv/Zbkx.c | 17 + gcc/testsuite/gcc.target/riscv/Zknd-aes-01.c | 15 + gcc/testsuite/gcc.target/riscv/Zknd-aes-02.c | 21 ++ gcc/testsuite/gcc.target/riscv/Zkne-aes-01.c | 15 + gcc/testsuite/gcc.target/riscv/Zkne-aes-02.c | 27 ++ gcc/testsuite/gcc.target/riscv/Zknh-sha256.c | 27 ++ .../gcc.target/riscv/Zknh-sha512-01.c | 40 +++ .../gcc.target/riscv/Zknh-sha512-02.c | 28 ++ gcc/testsuite/gcc.target/riscv/Zksed-sm4.c | 17 + gcc/testsuite/gcc.target/riscv/Zksh-sm3.c | 15 + 20 files changed, 730 insertions(+), 5 deletions(-) create mode 100644 gcc/config/riscv/crypto.md create mode 100644 gcc/config/riscv/riscv-builtins-crypto.def create mode 100644 gcc/testsuite/gcc.target/riscv/Zbkx.c create mode 100644 gcc/testsuite/gcc.target/riscv/Zknd-aes-01.c create mode 100644 gcc/testsuite/gcc.target/riscv/Zknd-aes-02.c create mode 100644 gcc/testsuite/gcc.target/riscv/Zkne-aes-01.c create mode 100644 gcc/testsuite/gcc.target/riscv/Zkne-aes-02.c create mode 100644 gcc/testsuite/gcc.target/riscv/Zknh-sha256.c create mode 100644 gcc/testsuite/gcc.target/riscv/Zknh-sha512-01.c create mode 100644 gcc/testsuite/gcc.target/riscv/Zknh-sha512-02.c create mode 100644 gcc/testsuite/gcc.target/riscv/Zksed-sm4.c create mode 100644 gcc/testsuite/gcc.target/riscv/Zksh-sm3.c