From patchwork Wed Oct 13 10:15:20 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Christophe Lyon X-Patchwork-Id: 46156 Return-Path: X-Original-To: patchwork@sourceware.org Delivered-To: patchwork@sourceware.org Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id 477713858408 for ; Wed, 13 Oct 2021 10:17:05 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org 477713858408 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gcc.gnu.org; s=default; t=1634120225; bh=fwfk3dwaJlJ8MP2hKqI0o+I7Qd0f5Mz3M7qEMuqIJ68=; h=To:Subject:Date:List-Id:List-Unsubscribe:List-Archive:List-Post: List-Help:List-Subscribe:From:Reply-To:From; b=QoTkIH4Km2e58wThX0osAYQxXHUes8RnJxYT+70GkKgzL60F4ha9qpXbbj01hFCMz Fp0qeRl4UjxDO++cSiEF/bbY8D40mpx7AM5qG7r6Gaf4DTjLfDTv9ftPmDQ3EntaO5 LG7Pwex6wTQQvcL6rPJrToiHzeZTq8VRrzj3Jg6g= X-Original-To: gcc-patches@gcc.gnu.org Delivered-To: gcc-patches@gcc.gnu.org Received: from mx07-00178001.pphosted.com (mx08-00178001.pphosted.com [91.207.212.93]) by sourceware.org (Postfix) with ESMTPS id 7DFAD3858C27 for ; Wed, 13 Oct 2021 10:16:33 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.1 sourceware.org 7DFAD3858C27 Received: from pps.filterd (m0046660.ppops.net [127.0.0.1]) by mx07-00178001.pphosted.com (8.16.1.2/8.16.1.2) with SMTP id 19D8QMK2011459 for ; Wed, 13 Oct 2021 12:16:32 +0200 Received: from beta.dmz-eu.st.com (beta.dmz-eu.st.com [164.129.1.35]) by mx07-00178001.pphosted.com with ESMTP id 3bnuxtrtte-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT) for ; Wed, 13 Oct 2021 12:16:31 +0200 Received: from euls16034.sgp.st.com (euls16034.sgp.st.com [10.75.44.20]) by beta.dmz-eu.st.com (STMicroelectronics) with ESMTP id 02E8910002A for ; Wed, 13 Oct 2021 12:16:30 +0200 (CEST) Received: from Webmail-eu.st.com (sfhdag2node2.st.com [10.75.127.5]) by euls16034.sgp.st.com (STMicroelectronics) with ESMTP id D635F21E668 for ; Wed, 13 Oct 2021 12:16:30 +0200 (CEST) Received: from gnx2104.gnb.st.com (10.75.127.47) by SFHDAG2NODE2.st.com (10.75.127.5) with Microsoft SMTP Server (TLS) id 15.0.1497.18; Wed, 13 Oct 2021 12:16:30 +0200 To: Subject: [PATCH v2 00/14] ARM/MVE use vectors of boolean for predicates Date: Wed, 13 Oct 2021 12:15:20 +0200 Message-ID: <20211013101554.2732342-1-christophe.lyon@foss.st.com> X-Mailer: git-send-email 2.25.1 MIME-Version: 1.0 X-Originating-IP: [10.75.127.47] X-ClientProxiedBy: SFHDAG2NODE2.st.com (10.75.127.5) To SFHDAG2NODE2.st.com (10.75.127.5) X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.182.1,Aquarius:18.0.790,Hydra:6.0.425,FMLib:17.0.607.475 definitions=2021-10-13_03,2021-10-13_01,2020-04-07_01 X-Spam-Status: No, score=-2.7 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, KAM_SHORT, RCVD_IN_DNSWL_LOW, SPF_HELO_NONE, SPF_PASS, TXREP autolearn=ham autolearn_force=no version=3.4.4 X-Spam-Checker-Version: SpamAssassin 3.4.4 (2020-01-24) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-Patchwork-Original-From: Christophe Lyon via Gcc-patches From: Christophe Lyon Reply-To: Christophe Lyon Errors-To: gcc-patches-bounces+patchwork=sourceware.org@gcc.gnu.org Sender: "Gcc-patches" This is v2 of this patch series, addressing the comments I received. The changes v1 -> v2 are: - Patch 3: added an executable test, and updated check_effective_target_arm_mve_hw - Patch 4: split into patch 4 and patch 14 (to keep numbering the same for the other patches) - Patch 5: updated arm_class_likely_spilled_p as suggested. - Patch 7: updated test_vector_ops_duplicate in simplify-rtx.c as suggested. - Patch 8: added V2DI -> HI/hi mapping in MVE_VPRED/MVE_vpred iterators, removed now useless mve_vpselq_v2di, and fixed mov expander. - Patch 9: arm_mode_to_pred_mode now returns opt_machine_mode, removed useless floating-point checks in vec_cmpu. - Patch 12: replaced hi with v8bi in v2di load/store instructions I'll squash patch 2 with patch patch 9 and patch 3 with patch 8. Original text: This patch series addresses PR 100757 and 101325 by representing vectors of predicates (MVE VPR.P0 register) as vectors of booleans rather than using HImode. As this implies a lot of mostly mechanical changes, I have tried to split the patches in a way that should help reviewers, but the split is a bit artificial. Patches 1-3 add new tests. Patches 4-6 are small independent improvements. Patch 7 implements the predicate qualifier, but does not change any builtin yet. Patch 8 is the first of the two main patches, and uses the new qualifier to describe the vcmp and vpsel builtins that are useful for auto-vectorization of comparisons. Patch 9 is the second main patch, which fixes the vcond_mask expander. Patches 10-13 convert almost all the remaining builtins with HI operands to use the predicate qualifier. After these, there are still a few builtins with HI operands left, about which I am not sure: vctp, vpnot, load-gather and store-scatter with v2di operands. In fact, patches 11/12 update some STR/LDR qualifiers in a way that breaks these v2di builtins although existing tests still pass. Christophe Lyon (14): arm: Add new tests for comparison vectorization with Neon and MVE arm: Add tests for PR target/100757 arm: Add tests for PR target/101325 arm: Add GENERAL_AND_VPR_REGS regclass arm: Add support for VPR_REG in arm_class_likely_spilled_p arm: Fix mve_vmvnq_n_ argument mode arm: Implement MVE predicates as vectors of booleans arm: Implement auto-vectorized MVE comparisons with vectors of boolean predicates arm: Fix vcond_mask expander for MVE (PR target/100757) arm: Convert remaining MVE vcmp builtins to predicate qualifiers arm: Convert more MVE builtins to predicate qualifiers arm: Convert more load/store MVE builtins to predicate qualifiers arm: Convert more MVE/CDE builtins to predicate qualifiers arm: Add VPR_REG to ALL_REGS gcc/config/arm/arm-builtins.c | 228 +++-- gcc/config/arm/arm-modes.def | 5 + gcc/config/arm/arm-protos.h | 3 +- gcc/config/arm/arm-simd-builtin-types.def | 4 + gcc/config/arm/arm.c | 130 ++- gcc/config/arm/arm.h | 5 +- gcc/config/arm/arm_mve_builtins.def | 746 ++++++++-------- gcc/config/arm/iterators.md | 5 + gcc/config/arm/mve.md | 832 ++++++++++-------- gcc/config/arm/neon.md | 39 + gcc/config/arm/vec-common.md | 52 -- gcc/simplify-rtx.c | 26 +- .../arm/acle/cde-mve-full-assembly.c | 264 +++--- .../gcc.target/arm/simd/mve-vcmp-f32-2.c | 32 + .../gcc.target/arm/simd/neon-compare-1.c | 78 ++ .../gcc.target/arm/simd/neon-compare-2.c | 13 + .../gcc.target/arm/simd/neon-compare-3.c | 14 + .../arm/simd/neon-compare-scalar-1.c | 57 ++ .../gcc.target/arm/simd/neon-vcmp-f16.c | 12 + .../gcc.target/arm/simd/neon-vcmp-f32-2.c | 15 + .../gcc.target/arm/simd/neon-vcmp-f32-3.c | 12 + .../gcc.target/arm/simd/neon-vcmp-f32.c | 12 + gcc/testsuite/gcc.target/arm/simd/neon-vcmp.c | 22 + .../gcc.target/arm/simd/pr100757-2.c | 20 + .../gcc.target/arm/simd/pr100757-3.c | 20 + .../gcc.target/arm/simd/pr100757-4.c | 19 + gcc/testsuite/gcc.target/arm/simd/pr100757.c | 19 + .../gcc.target/arm/simd/pr101325-2.c | 19 + gcc/testsuite/gcc.target/arm/simd/pr101325.c | 14 + gcc/testsuite/lib/target-supports.exp | 3 +- 30 files changed, 1611 insertions(+), 1109 deletions(-) create mode 100644 gcc/testsuite/gcc.target/arm/simd/mve-vcmp-f32-2.c create mode 100644 gcc/testsuite/gcc.target/arm/simd/neon-compare-1.c create mode 100644 gcc/testsuite/gcc.target/arm/simd/neon-compare-2.c create mode 100644 gcc/testsuite/gcc.target/arm/simd/neon-compare-3.c create mode 100644 gcc/testsuite/gcc.target/arm/simd/neon-compare-scalar-1.c create mode 100644 gcc/testsuite/gcc.target/arm/simd/neon-vcmp-f16.c create mode 100644 gcc/testsuite/gcc.target/arm/simd/neon-vcmp-f32-2.c create mode 100644 gcc/testsuite/gcc.target/arm/simd/neon-vcmp-f32-3.c create mode 100644 gcc/testsuite/gcc.target/arm/simd/neon-vcmp-f32.c create mode 100644 gcc/testsuite/gcc.target/arm/simd/neon-vcmp.c create mode 100644 gcc/testsuite/gcc.target/arm/simd/pr100757-2.c create mode 100644 gcc/testsuite/gcc.target/arm/simd/pr100757-3.c create mode 100644 gcc/testsuite/gcc.target/arm/simd/pr100757-4.c create mode 100644 gcc/testsuite/gcc.target/arm/simd/pr100757.c create mode 100644 gcc/testsuite/gcc.target/arm/simd/pr101325-2.c create mode 100644 gcc/testsuite/gcc.target/arm/simd/pr101325.c