From patchwork Thu Aug 18 22:03:43 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Li, Pan2 via Gcc-patches" X-Patchwork-Id: 55098 Return-Path: X-Original-To: patchwork@sourceware.org Delivered-To: patchwork@sourceware.org Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id CC3A53858428 for ; Thu, 18 Aug 2022 22:04:32 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org CC3A53858428 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gcc.gnu.org; s=default; t=1660860272; bh=Z4Jv5YvKZKS+tSQpKvw2hnOgUTnJSG7+rL90DJhEl7A=; h=To:Subject:Date:List-Id:List-Unsubscribe:List-Archive:List-Post: List-Help:List-Subscribe:From:Reply-To:Cc:From; b=hrcZbia5lD2Ii/AY7zrsx/SwvA8rBBLjTsKwC8pkDOC6BzWnY2iMfcm43IivVJroD mTRuNQ3nFBRacRls3HH08PsM1yDAi2aK8P1fliFMAb/TWUGXU7njHbZELS6XY7fuO/ Qll4XRGjg0dlZiqdgMUjd6yxbQPdEI9+ECFSx3jE= X-Original-To: gcc-patches@gcc.gnu.org Delivered-To: gcc-patches@gcc.gnu.org Received: from mx0b-0016f401.pphosted.com (mx0a-0016f401.pphosted.com [67.231.148.174]) by sourceware.org (Postfix) with ESMTPS id E270C385828F for ; Thu, 18 Aug 2022 22:04:03 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.1 sourceware.org E270C385828F Received: from pps.filterd (m0045849.ppops.net [127.0.0.1]) by mx0a-0016f401.pphosted.com (8.17.1.5/8.17.1.5) with ESMTP id 27IHpsQB001638 for ; Thu, 18 Aug 2022 15:04:02 -0700 Received: from dc5-exch02.marvell.com ([199.233.59.182]) by mx0a-0016f401.pphosted.com (PPS) with ESMTPS id 3j1t6r10wm-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT) for ; Thu, 18 Aug 2022 15:04:02 -0700 Received: from DC5-EXCH01.marvell.com (10.69.176.38) by DC5-EXCH02.marvell.com (10.69.176.39) with Microsoft SMTP Server (TLS) id 15.0.1497.18; Thu, 18 Aug 2022 15:04:01 -0700 Received: from maili.marvell.com (10.69.176.80) by DC5-EXCH01.marvell.com (10.69.176.38) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Thu, 18 Aug 2022 15:04:01 -0700 Received: from linux.wrightpinski.org.com (unknown [10.69.242.198]) by maili.marvell.com (Postfix) with ESMTP id E9F5C3F7062; Thu, 18 Aug 2022 15:04:00 -0700 (PDT) To: Subject: [PATCH 00/10] [RISCV] Fix/improve the RISCV backend Date: Thu, 18 Aug 2022 15:03:43 -0700 Message-ID: <1660860233-11175-1-git-send-email-apinski@marvell.com> X-Mailer: git-send-email 1.8.3.1 MIME-Version: 1.0 X-Proofpoint-ORIG-GUID: JJ3bbz9TyhxSyjYofGhp6P5tyBgX2sVi X-Proofpoint-GUID: JJ3bbz9TyhxSyjYofGhp6P5tyBgX2sVi X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.205,Aquarius:18.0.895,Hydra:6.0.517,FMLib:17.11.122.1 definitions=2022-08-18_16,2022-08-18_01,2022-06-22_01 X-Spam-Status: No, score=-7.6 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, DKIM_VALID_EF, RCVD_IN_DNSWL_NONE, SPF_HELO_NONE, SPF_PASS, TXREP, T_SCC_BODY_TEXT_LINE, URIBL_BLACK autolearn=no autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-Patchwork-Original-From: apinski--- via Gcc-patches From: "Li, Pan2 via Gcc-patches" Reply-To: apinski@marvell.com Cc: Andrew Pinski Errors-To: gcc-patches-bounces+patchwork=sourceware.org@gcc.gnu.org Sender: "Gcc-patches" From: Andrew Pinski This set of patches fixes a few RISCV issues and does a few cleanups. Including moving all of the iterators to iterators.md like many newer backends. It also fixes a few PRs which I filed including the RISCV32 issue with ZBS enabled. Thanks, Andrew Pinski Andrew Pinski (10): [RISCV] Move iterators from riscv.md to iterators.md [RISCV] Move iterators from bitmanip.md to iterators.md [RISCV] Move iterators from sync.md to iterators.md [RISCV] Add the list of operand modifiers to riscv.md too [RISCV] Add %~ to print w if TARGET_64BIT and use it [RISCV] Use constraints/predicates instead of checking const_int directly for shNadd patterns [RISCV] Use a constraint for bset_mask and bset_1_mask [RISCV] Fix PR 106586: riscv32 vs ZBS [RISCV] Add constraints for not_single_bit_mask_operand/single_bit_mask_operand [RISCV] Fix PR 106632 and PR 106588 a few constraints in bitmanip.md gcc/config/riscv/bitmanip.md | 56 ++------ gcc/config/riscv/constraints.md | 28 ++++ gcc/config/riscv/iterators.md | 245 ++++++++++++++++++++++++++++++++ gcc/config/riscv/predicates.md | 9 +- gcc/config/riscv/riscv.cc | 35 ++++- gcc/config/riscv/riscv.h | 4 +- gcc/config/riscv/riscv.md | 199 +++----------------------- gcc/config/riscv/sync.md | 4 - 8 files changed, 352 insertions(+), 228 deletions(-) create mode 100644 gcc/config/riscv/iterators.md