[v3,10/13] RISC-V/gas: warn about non-boolean unaligned-access attribute
Checks
| Context |
Check |
Description |
| linaro-tcwg-bot/tcwg_binutils_build--master-aarch64 |
success
|
Build passed
|
| linaro-tcwg-bot/tcwg_binutils_check--master-aarch64 |
success
|
Test passed
|
| linaro-tcwg-bot/tcwg_binutils_build--master-arm |
success
|
Build passed
|
| linaro-tcwg-bot/tcwg_binutils_check--master-arm |
success
|
Test passed
|
Commit Message
The attribute being a boolean one, values should be solely 0 or 1.
Reviewed-by: Jiawei <jiawei@iscas.ac.cn>
---
Shouldn't settings accumulate, much like what riscv_merge_attributes()
does?
---
v2: New.
@@ -5870,14 +5870,13 @@ s_riscv_attribute (int ignored ATTRIBUTE
{
obj_attr_tag_t tag = obj_attr_process_attribute (OBJ_ATTR_PROC);
unsigned old_xlen;
- obj_attribute *attr;
+ const obj_attribute *attr = elf_known_obj_attributes_proc (stdoutput);
explicit_attr = true;
switch (tag)
{
case Tag_RISCV_arch:
old_xlen = xlen;
- attr = elf_known_obj_attributes_proc (stdoutput);
if (!start_assemble)
riscv_set_arch (attr[Tag_RISCV_arch].s);
else
@@ -5903,6 +5902,11 @@ s_riscv_attribute (int ignored ATTRIBUTE
"any instructions"));
break;
+ case Tag_RISCV_unaligned_access:
+ if (attr[Tag_RISCV_unaligned_access].i > 1)
+ as_warn (_("`unaligned_access' attribute with non-boolean value"));
+ break;
+
default:
break;
}
@@ -0,0 +1,7 @@
+#as: -march-attr
+#readelf: -A
+#warning_output: attribute-warn.l
+
+Attribute Section: riscv
+File Attributes
+ Tag_RISCV_arch: [a-zA-Z0-9_\"].*
@@ -0,0 +1,2 @@
+.*: Assembler messages:
+.*:2: Warning: `unaligned_access' attribute with non-boolean value
@@ -0,0 +1,3 @@
+ .attribute unaligned_access, 1
+ .attribute unaligned_access, 0x1234
+ .attribute unaligned_access, 0