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[37.24.206.209]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-a997a6b7013sm41201866b.70.2024.10.08.03.26.47 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Tue, 08 Oct 2024 03:26:47 -0700 (PDT) Message-ID: Date: Tue, 8 Oct 2024 12:26:46 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: [PATCH 2/2] x86/APX: support JMPABS also in assembler From: Jan Beulich To: Binutils Cc: Lili Cui , "H.J. Lu" References: <4e9c7d7b-02b5-4fd1-81f3-25eeba400b56@suse.com> Content-Language: en-US Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <4e9c7d7b-02b5-4fd1-81f3-25eeba400b56@suse.com> X-Spam-Status: No, score=-3023.3 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, DKIM_VALID_EF, RCVD_IN_DNSWL_NONE, SPF_HELO_NONE, SPF_NONE, TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: binutils@sourceware.org X-Mailman-Version: 2.1.30 Precedence: list List-Id: Binutils mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: binutils-bounces~patchwork=sourceware.org@sourceware.org Without this APX support isn't really complete. Since which operand type to expect in source is ambiguous, permit both immediate and displacement forms. Make sure though that in Intel syntax truly memory operand forms ( ptr and/or square-bracketing) aren't accepted. Also make sure that no illegal prefixes can be used with the insn (LOCK is being dealt with more generally elsewhere). --- Instead of open-coding the check for JMPABS in establish_rex() we could of course also introduce a new "no sizing prefixes" operand constraint. Because of the similarity with the offset part of directl long/far branches, I'm actually inclined to introduce Disp variants there, too. That, when used in source code, would then also make more clear which one is which. --- a/gas/config/tc-i386.c +++ b/gas/config/tc-i386.c @@ -4673,6 +4673,24 @@ static void establish_rex (void) if (is_apx_rex2_encoding ()) { + /* Most prefixes are not permitted with JMPABS. */ + if (i.tm.mnem_off == MN_jmpabs) + { + if (i.prefix[DATA_PREFIX] || (i.prefix[REX_PREFIX] & REX_W)) + { + as_bad (_("size override not allowed with `%s'"), + insn_name (&i.tm)); + i.prefix[DATA_PREFIX] = 0; + i.prefix[REX_PREFIX] &= ~REX_W; + } + if (i.prefix[ADDR_PREFIX]) + { + as_bad (_("address override not allowed with `%s'"), + insn_name (&i.tm)); + i.prefix[ADDR_PREFIX] = 0; + } + } + build_rex2_prefix (); /* The individual REX.RXBW bits got consumed. */ i.rex &= REX_OPCODE; @@ -8214,7 +8232,8 @@ optimize_imm (void) /* A more generic (but also more involved) way of dealing with the special case(s) would be to go look for DefaultSize attributes on any of the templates. */ - && current_templates.start->mnem_off != MN_push)) + && current_templates.start->mnem_off != MN_push + && current_templates.start->mnem_off != MN_jmpabs)) guess_suffix = LONG_MNEM_SUFFIX; for (op = i.operands; --op >= 0;) @@ -8360,10 +8379,10 @@ optimize_disp (const insn_template *t) } } - /* Don't optimize displacement for movabs since it only takes 64bit - displacement. */ + /* Don't optimize displacement for movabs / jmpabs since they only take + 64-bit displacement. */ if (pp.disp_encoding > disp_encoding_8bit - || (flag_code == CODE_64BIT && t->mnem_off == MN_movabs)) + || t->mnem_off == MN_movabs || t->mnem_off == MN_jmpabs) return true; for (op = i.operands; op-- > 0;) --- a/gas/config/tc-i386-intel.c +++ b/gas/config/tc-i386-intel.c @@ -907,7 +907,8 @@ i386_intel_operand (char *operand_string /* Operands for jump/call need special consideration. */ if (current_templates.start->opcode_modifier.jump == JUMP || current_templates.start->opcode_modifier.jump == JUMP_DWORD - || current_templates.start->opcode_modifier.jump == JUMP_INTERSEGMENT) + || current_templates.start->opcode_modifier.jump == JUMP_INTERSEGMENT + || current_templates.start->mnem_off == MN_jmpabs) { bool jumpabsolute = false; --- a/gas/testsuite/gas/i386/x86-64-apx-jmpabs.d +++ b/gas/testsuite/gas/i386/x86-64-apx-jmpabs.d @@ -1,5 +1,5 @@ #as: -#objdump: -dw +#objdump: -dwr #name: x86_64 APX_F JMPABS insns #source: x86-64-apx-jmpabs.s @@ -8,5 +8,16 @@ Disassembly of section \.text: 0+ <_start>: +\s*[a-f0-9]+:\s*d5 00 a1 00 00 00 00 00 00 00 00[ ]+jmpabs \$0x0\s*[a-f0-9]+: (R_X86_64_|IMAGE_REL_AMD64_ADDR)?64 thunk \s*[a-f0-9]+:\s*d5 00 a1 02 00 00 00 00 00 00 00[ ]+jmpabs \$0x2 +\s*[a-f0-9]+:\s*d5 00 a1 21 43 65 87 00 00 00 00[ ]+jmpabs \$0x87654321 +\s*[a-f0-9]+:\s*d5 00 a1 21 43 65 87 09 00 00 00[ ]+jmpabs \$0x987654321 +\s*[a-f0-9]+:\s*d5 00 a1 00 00 00 00 00 00 00 00[ ]+jmpabs \$0x0\s*[a-f0-9]+: (R_X86_64_|IMAGE_REL_AMD64_ADDR)?64 thunk +\s*[a-f0-9]+:\s*d5 00 a1 78 56 34 12 00 00 00 00[ ]+jmpabs \$0x12345678 +\s*[a-f0-9]+:\s*d5 00 a1 21 43 65 87 00 00 00 00[ ]+jmpabs \$0x87654321 +\s*[a-f0-9]+:\s*d5 00 a1 21 43 65 87 09 00 00 00[ ]+jmpabs \$0x987654321 +\s*[a-f0-9]+:\s*d5 00 a1 00 00 00 00 00 00 00 00[ ]+jmpabs \$0x0\s*[a-f0-9]+: (R_X86_64_|IMAGE_REL_AMD64_ADDR)?64 thunk +\s*[a-f0-9]+:\s*d5 00 a1 78 56 34 12 00 00 00 00[ ]+jmpabs \$0x12345678 +\s*[a-f0-9]+:\s*d5 00 a1 21 43 65 87 00 00 00 00[ ]+jmpabs \$0x87654321 +\s*[a-f0-9]+:\s*d5 00 a1 21 43 65 87 09 00 00 00[ ]+jmpabs \$0x987654321 #pass --- a/gas/testsuite/gas/i386/x86-64-apx-jmpabs.s +++ b/gas/testsuite/gas/i386/x86-64-apx-jmpabs.s @@ -2,4 +2,18 @@ .text _start: - .byte 0xd5,0x00,0xa1,0x02,0x00,0x00,0x00,0x00,0x00,0x00,0x00 + jmpabs thunk + jmpabs 2 + jmpabs 0x87654321 + jmpabs 0x987654321 + + jmpabs $thunk + jmpabs $0x12345678 + jmpabs $0x87654321 + jmpabs $0x987654321 + + .intel_syntax noprefix + jmpabs thunk + jmpabs 0x12345678 + jmpabs 0x87654321 + jmpabs 0x987654321 --- a/gas/testsuite/gas/i386/x86-64-apx-jmpabs-intel.d +++ b/gas/testsuite/gas/i386/x86-64-apx-jmpabs-intel.d @@ -1,5 +1,5 @@ #as: -#objdump: -dw -Mintel +#objdump: -dwr -Mintel #name: x86_64 APX_F JMPABS insns (Intel disassembly) #source: x86-64-apx-jmpabs.s @@ -8,5 +8,16 @@ Disassembly of section \.text: 0+ <_start>: +\s*[a-f0-9]+:\s*d5 00 a1 00 00 00 00 00 00 00 00[ ]+jmpabs 0x0\s*[a-f0-9]+: (R_X86_64_|IMAGE_REL_AMD64_ADDR)?64 thunk \s*[a-f0-9]+:\s*d5 00 a1 02 00 00 00 00 00 00 00[ ]+jmpabs 0x2 +\s*[a-f0-9]+:\s*d5 00 a1 21 43 65 87 00 00 00 00[ ]+jmpabs 0x87654321 +\s*[a-f0-9]+:\s*d5 00 a1 21 43 65 87 09 00 00 00[ ]+jmpabs 0x987654321 +\s*[a-f0-9]+:\s*d5 00 a1 00 00 00 00 00 00 00 00[ ]+jmpabs 0x0\s*[a-f0-9]+: (R_X86_64_|IMAGE_REL_AMD64_ADDR)?64 thunk +\s*[a-f0-9]+:\s*d5 00 a1 78 56 34 12 00 00 00 00[ ]+jmpabs 0x12345678 +\s*[a-f0-9]+:\s*d5 00 a1 21 43 65 87 00 00 00 00[ ]+jmpabs 0x87654321 +\s*[a-f0-9]+:\s*d5 00 a1 21 43 65 87 09 00 00 00[ ]+jmpabs 0x987654321 +\s*[a-f0-9]+:\s*d5 00 a1 00 00 00 00 00 00 00 00[ ]+jmpabs 0x0\s*[a-f0-9]+: (R_X86_64_|IMAGE_REL_AMD64_ADDR)?64 thunk +\s*[a-f0-9]+:\s*d5 00 a1 78 56 34 12 00 00 00 00[ ]+jmpabs 0x12345678 +\s*[a-f0-9]+:\s*d5 00 a1 21 43 65 87 00 00 00 00[ ]+jmpabs 0x87654321 +\s*[a-f0-9]+:\s*d5 00 a1 21 43 65 87 09 00 00 00[ ]+jmpabs 0x987654321 #pass --- a/opcodes/i386-opc.tbl +++ b/opcodes/i386-opc.tbl @@ -510,6 +510,11 @@ ljmp, 0xea, No64, JumpInterSegment|No_bS ljmp, 0xff/5, 0, Amd64|Modrm|JumpAbsolute|No_bSuf|No_sSuf|No_qSuf, { Unspecified|BaseIndex } ljmp, 0xff/5, x64, Intel64|Modrm|JumpAbsolute|No_bSuf|No_sSuf, { Unspecified|BaseIndex } +// In particular for AT&T syntax permit both immediate and displacement form, +// to allow people to use what they see as the better fit. +jmpabs, 0xa1, APX_F, NoSuf|Rex2, { Imm64 } +jmpabs, 0xa1, APX_F, NoSuf|Rex2, { Disp64|Unspecified } + ret, 0xc3, No64, ImplicitStackOp|DefaultSize|No_bSuf|No_sSuf|No_qSuf|RepPrefixOk|BNDPrefixOk|IntelSuffix, {} ret, 0xc2, No64, ImplicitStackOp|DefaultSize|No_bSuf|No_sSuf|No_qSuf|RepPrefixOk|BNDPrefixOk|IntelSuffix, { Imm16 } ret, 0xc3, x64, Amd64|ImplicitStackOp|DefaultSize|No_bSuf|No_lSuf|No_sSuf|NoRex64|RepPrefixOk|BNDPrefixOk|IntelSuffix, {}