@@ -14,6 +14,10 @@ Disassembly of section \.text:
[ ]*[a-f0-9]+:[ ]*c4 e2 78 49 c0[ ]+tilerelease
[ ]*[a-f0-9]+:[ ]*62 f2 65 48 4a ca[ ]+tilemovrow %ebx,%tmm2,%zmm1
[ ]*[a-f0-9]+:[ ]*62 f3 7d 48 07 ca 08[ ]+tilemovrow \$0x8,%tmm2,%zmm1
+[ ]*[a-f0-9]+:[ ]*62 f2 e5 48 4a ca[ ]+tilemovrow %ebx,%zmm2,%tmm1
+[ ]*[a-f0-9]+:[ ]*62 f3 fd 48 07 ca 08[ ]+tilemovrow \$0x8,%zmm2,%tmm1
+[ ]*[a-f0-9]+:[ ]*62 f2 e5 48 4b ca[ ]+tilemovcol %ebx,%zmm2,%tmm1
+[ ]*[a-f0-9]+:[ ]*62 f3 fd 48 2f ca 08[ ]+tilemovcol \$0x8,%zmm2,%tmm1
[ ]*[a-f0-9]+:[ ]*62 62 6e 48 4a f5[ ]+tcvtrowd2ps %edx,%tmm5,%zmm30
[ ]*[a-f0-9]+:[ ]*62 63 7e 48 07 f5 08[ ]+tcvtrowd2ps \$0x8,%tmm5,%zmm30
[ ]*[a-f0-9]+:[ ]*62 62 6f 48 6d f5[ ]+tcvtrowps2bf16h %edx,%tmm5,%zmm30
@@ -9,6 +9,10 @@ start:
tilemovrow %ebx, %tmm2, %zmm1
tilemovrow $8, %tmm2, %zmm1
+ tilemovrow %ebx, %zmm2, %tmm1
+ tilemovrow $8, %zmm2, %tmm1
+ tilemovcol %ebx, %zmm2, %tmm1
+ tilemovcol $8, %zmm2, %tmm1
tcvtrowd2ps %edx, %tmm5, %zmm30
tcvtrowd2ps $8, %tmm5, %zmm30
@@ -51,9 +51,18 @@ static const struct dis386 evex_len_table[][3] = {
{ PREFIX_TABLE (PREFIX_EVEX_0F384A_X86_64_W_0_L_2) },
},
+ /* EVEX_LEN_0F384A_X86_64_W_1 */
+ {
+ { Bad_Opcode },
+ { Bad_Opcode },
+ { PREFIX_TABLE (PREFIX_EVEX_0F384A_X86_64_W_1_L_2) },
+ },
+
/* EVEX_LEN_0F384B_X86_64 */
{
{ X86_64_EVEX_MEM_W_TABLE (VEX_W_0F384B_X86_64_L_0) },
+ { Bad_Opcode },
+ { VEX_W_TABLE (EVEX_W_0F384B_X86_64_L_2) },
},
/* EVEX_LEN_0F385A */
@@ -112,6 +121,13 @@ static const struct dis386 evex_len_table[][3] = {
{ PREFIX_TABLE (PREFIX_EVEX_0F3A07_X86_64_W_0_L_2) },
},
+ /* EVEX_LEN_0F3A07_X86_64_W_1 */
+ {
+ { Bad_Opcode },
+ { Bad_Opcode },
+ { PREFIX_TABLE (PREFIX_EVEX_0F3A07_X86_64_W_1_L_2) },
+ },
+
/* EVEX_LEN_0F3A18 */
{
{ Bad_Opcode },
@@ -147,6 +163,13 @@ static const struct dis386 evex_len_table[][3] = {
{ VEX_W_TABLE (EVEX_W_0F3A23_L_n) },
},
+ /* EVEX_LEN_0F3A2F_X86_64_W_1 */
+ {
+ { Bad_Opcode },
+ { Bad_Opcode },
+ { PREFIX_TABLE (PREFIX_EVEX_0F3A2F_X86_64_W_1_L_2) },
+ },
+
/* EVEX_LEN_0F3A38 */
{
{ Bad_Opcode },
@@ -251,8 +251,20 @@
/* PREFIX_EVEX_0F384A_W_0_L_2 */
{
{ Bad_Opcode },
- { "tcvtrowd2ps", { XM, Rtmm, VexGdq }, 0 },
- { "tilemovrow", { XM, Rtmm, VexGdq }, 0 },
+ { "tcvtrowd2ps", { XM, Rtmm, VexGd }, 0 },
+ { "tilemovrow", { XM, Rtmm, VexGd }, 0 },
+ },
+ /* PREFIX_EVEX_0F384A_X86_64_W_1_L_2 */
+ {
+ { Bad_Opcode },
+ { Bad_Opcode },
+ { "tilemovrow", { TMM, Ux, VexGd }, 0 },
+ },
+ /* PREFIX_EVEX_0F384B_X86_64_W_1_L_2 */
+ {
+ { Bad_Opcode },
+ { Bad_Opcode },
+ { "tilemovcol", { TMM, Ux, VexGd }, 0 },
},
/* PREFIX_EVEX_0F3852 */
{
@@ -277,10 +289,10 @@
},
/* PREFIX_EVEX_0F386D_W_0_L_2 */
{
- { "tcvtrowps2phh", { XM, Rtmm, VexGdq }, 0 },
- { "tcvtrowps2bf16l", { XM, Rtmm, VexGdq }, 0 },
- { "tcvtrowps2phl", { XM, Rtmm, VexGdq }, 0 },
- { "tcvtrowps2bf16h", { XM, Rtmm, VexGdq }, 0 },
+ { "tcvtrowps2phh", { XM, Rtmm, VexGd }, 0 },
+ { "tcvtrowps2bf16l", { XM, Rtmm, VexGd }, 0 },
+ { "tcvtrowps2phl", { XM, Rtmm, VexGd }, 0 },
+ { "tcvtrowps2bf16h", { XM, Rtmm, VexGd }, 0 },
},
/* PREFIX_EVEX_0F3872 */
{
@@ -331,6 +343,12 @@
{ "tilemovrow", { XM, Rtmm, Ib }, 0 },
{ "tcvtrowps2bf16h", { XM, Rtmm, Ib }, 0 },
},
+ /* PREFIX_EVEX_0F3A07_X86_64_W_1_L_2 */
+ {
+ { Bad_Opcode },
+ { Bad_Opcode },
+ { "tilemovrow", { TMM, Ux, Ib }, 0 },
+ },
/* PREFIX_EVEX_0F3A08 */
{
{ "vrndscalep%XH", { XM, EXxh, EXxEVexS, Ib }, 0 },
@@ -357,6 +375,12 @@
{ Bad_Opcode },
{ "vgetmants%XW", { XMScalar, VexScalar, EXdq, EXxEVexS, Ib }, 0 },
},
+ /* PREFIX_EVEX_0F3A2F_X86_64_W_1_L_2 */
+ {
+ { Bad_Opcode },
+ { Bad_Opcode },
+ { "tilemovcol", { TMM, Ux, Ib }, 0 },
+ },
/* PREFIX_EVEX_0F3A42_W_0 */
{
{ Bad_Opcode },
@@ -353,6 +353,12 @@
/* EVEX_W_0F384A_X86_64 */
{
{ EVEX_LEN_TABLE (EVEX_LEN_0F384A_X86_64_W_0) },
+ { EVEX_LEN_TABLE (EVEX_LEN_0F384A_X86_64_W_1) },
+ },
+ /* EVEX_W_0F384B_X86_64_L_2 */
+ {
+ { Bad_Opcode },
+ { PREFIX_TABLE (PREFIX_EVEX_0F384B_X86_64_W_1_L_2) },
},
/* EVEX_W_0F3859 */
{
@@ -399,6 +405,7 @@
/* EVEX_W_0F3A07_X86_64 */
{
{ EVEX_LEN_TABLE (EVEX_LEN_0F3A07_X86_64_W_0) },
+ { EVEX_LEN_TABLE (EVEX_LEN_0F3A07_X86_64_W_1) },
},
/* EVEX_W_0F3A18_L_n */
{
@@ -429,6 +436,11 @@
{ "vshuff32x4", { XM, Vex, EXx, Ib }, PREFIX_DATA },
{ "vshuff64x2", { XM, Vex, EXx, Ib }, PREFIX_DATA },
},
+ /* EVEX_W_0F3A2F_X86_64 */
+ {
+ { Bad_Opcode },
+ { EVEX_LEN_TABLE (EVEX_LEN_0F3A2F_X86_64_W_1) },
+ },
/* EVEX_W_0F3A38_L_n */
{
{ "vinserti32x4", { XM, Vex, EXxmm, Ib }, PREFIX_DATA },
@@ -18,6 +18,11 @@
{ Bad_Opcode },
{ VEX_W_TABLE (EVEX_W_0F3A07_X86_64) },
},
+ /* X86_64_EVEX_0F3A2F */
+ {
+ { Bad_Opcode },
+ { VEX_W_TABLE (EVEX_W_0F3A2F_X86_64) },
+ },
/* X86_64_EVEX_0F3A77 */
{
{ Bad_Opcode },
@@ -636,7 +636,7 @@ static const struct dis386 evex_table[][256] = {
{ Bad_Opcode },
{ Bad_Opcode },
{ Bad_Opcode },
- { Bad_Opcode },
+ { X86_64_TABLE (X86_64_EVEX_0F3A2F) },
/* 30 */
{ Bad_Opcode },
{ Bad_Opcode },
@@ -600,6 +600,7 @@ fetch_error (const instr_info *ins)
#define VexGatherD { OP_VEX, vex_vsib_d_w_dq_mode }
#define VexGatherQ { OP_VEX, vex_vsib_q_w_dq_mode }
#define VexGdq { OP_VEX, dq_mode }
+#define VexGd { OP_VEX, d_mode }
#define VexGb { OP_VEX, b_mode }
#define VexGv { OP_VEX, v_mode }
#define VexTmm { OP_VEX, tmm_mode }
@@ -1220,6 +1221,8 @@ enum
PREFIX_EVEX_0F383A,
PREFIX_EVEX_0F3841_W_0,
PREFIX_EVEX_0F384A_X86_64_W_0_L_2,
+ PREFIX_EVEX_0F384A_X86_64_W_1_L_2,
+ PREFIX_EVEX_0F384B_X86_64_W_1_L_2,
PREFIX_EVEX_0F3852,
PREFIX_EVEX_0F3853,
PREFIX_EVEX_0F3868,
@@ -1232,10 +1235,12 @@ enum
PREFIX_EVEX_0F38AB,
PREFIX_EVEX_0F3A07_X86_64_W_0_L_2,
+ PREFIX_EVEX_0F3A07_X86_64_W_1_L_2,
PREFIX_EVEX_0F3A08,
PREFIX_EVEX_0F3A0A,
PREFIX_EVEX_0F3A26,
PREFIX_EVEX_0F3A27,
+ PREFIX_EVEX_0F3A2F_X86_64_W_1_L_2,
PREFIX_EVEX_0F3A42_W_0,
PREFIX_EVEX_0F3A52,
PREFIX_EVEX_0F3A53,
@@ -1415,6 +1420,7 @@ enum
X86_64_EVEX_0F384B,
X86_64_EVEX_0F386D,
X86_64_EVEX_0F3A07,
+ X86_64_EVEX_0F3A2F,
X86_64_EVEX_0F3A77,
X86_64_EVEX_MAP5_6F,
@@ -1614,6 +1620,7 @@ enum
EVEX_LEN_0F381B,
EVEX_LEN_0F3836,
EVEX_LEN_0F384A_X86_64_W_0,
+ EVEX_LEN_0F384A_X86_64_W_1,
EVEX_LEN_0F384B_X86_64,
EVEX_LEN_0F385A,
EVEX_LEN_0F385B,
@@ -1623,11 +1630,13 @@ enum
EVEX_LEN_0F3A00,
EVEX_LEN_0F3A01,
EVEX_LEN_0F3A07_X86_64_W_0,
+ EVEX_LEN_0F3A07_X86_64_W_1,
EVEX_LEN_0F3A18,
EVEX_LEN_0F3A19,
EVEX_LEN_0F3A1A,
EVEX_LEN_0F3A1B,
EVEX_LEN_0F3A23,
+ EVEX_LEN_0F3A2F_X86_64_W_1,
EVEX_LEN_0F3A38,
EVEX_LEN_0F3A39,
EVEX_LEN_0F3A3A,
@@ -1855,6 +1864,7 @@ enum
EVEX_W_0F383A_P_1,
EVEX_W_0F3841,
EVEX_W_0F384A_X86_64,
+ EVEX_W_0F384B_X86_64_L_2,
EVEX_W_0F3859,
EVEX_W_0F385A_L_n,
EVEX_W_0F385B_L_2,
@@ -1872,6 +1882,7 @@ enum
EVEX_W_0F3A1B_L_2,
EVEX_W_0F3A21,
EVEX_W_0F3A23_L_n,
+ EVEX_W_0F3A2F_X86_64,
EVEX_W_0F3A38_L_n,
EVEX_W_0F3A39_L_n,
EVEX_W_0F3A3A_L_2,
@@ -14271,6 +14282,10 @@ OP_VEX (instr_info *ins, int bytemode, int sizeflag ATTRIBUTE_UNUSED)
return true;
+ case d_mode:
+ oappend_register (ins, att_names32[reg]);
+ return true;
+
case v_mode:
case dq_mode:
if (ins->rex & REX_W)
@@ -3325,6 +3325,11 @@ bsrmovf, 0x95, ACE_V1, Modrm|EVex512|Map6|VexW1|Src1VVVV|Disp8MemShift=6|NoSuf,
bsrmovh, 0xf295, ACE_V1, D|Modrm|EVex512|Map6|VexW1|Disp8MemShift=6|NoSuf, { RegZMM|Unspecified|BaseIndex, RegBSR }
bsrmovl, 0xf395, ACE_V1, D|Modrm|EVex512|Map6|VexW1|Disp8MemShift=6|NoSuf, { RegZMM|Unspecified|BaseIndex, RegBSR }
+tilemovcol, 0x662f, ACE_V1, Modrm|EVex512|Space0F3A|VexW1|NoSuf, { Imm8, RegZMM, RegTMM }
+tilemovcol, 0x664b, ACE_V1, Modrm|EVex512|Space0F38|VexW1|Src2VVVV|NoSuf, { Reg32, RegZMM, RegTMM }
+tilemovrow, 0x6607, ACE_V1, Modrm|EVex512|Space0F3A|VexW1|NoSuf, { Imm8, RegZMM, RegTMM }
+tilemovrow, 0x664a, ACE_V1, Modrm|EVex512|Space0F38|VexW1|Src2VVVV|NoSuf, { Reg32, RegZMM, RegTMM }
+
// ACE instructions end.
// KEYLOCKER instructions.