===================================================================
@@ -0,0 +1,5 @@
+#as: -32 -trap
+#objdump: -dr --prefix-addresses
+#name: MIPS mul with traps
+#source: mul.s
+#dump: allegrex@mul.d
===================================================================
@@ -0,0 +1,52 @@
+#as: -32 -trap
+#objdump: -dr --prefix-addresses --show-raw-insn
+#name: MIPS mul with traps
+#source: mul.s
+
+# Test the mul macro.
+
+.*: +file format .*mips.*
+
+Disassembly of section \.text:
+[0-9a-f]+ <[^>]*> 00a4 2210 mul a0,a0,a1
+[0-9a-f]+ <[^>]*> 00c5 2210 mul a0,a1,a2
+[0-9a-f]+ <[^>]*> 3020 0000 li at,0
+[0-9a-f]+ <[^>]*> 0025 8b3c mult a1,at
+[0-9a-f]+ <[^>]*> 4644 mflo a0
+[0-9a-f]+ <[^>]*> 3020 0001 li at,1
+[0-9a-f]+ <[^>]*> 0025 8b3c mult a1,at
+[0-9a-f]+ <[^>]*> 4644 mflo a0
+[0-9a-f]+ <[^>]*> 5020 8000 li at,0x8000
+[0-9a-f]+ <[^>]*> 0025 8b3c mult a1,at
+[0-9a-f]+ <[^>]*> 4644 mflo a0
+[0-9a-f]+ <[^>]*> 3020 8000 li at,-32768
+[0-9a-f]+ <[^>]*> 0025 8b3c mult a1,at
+[0-9a-f]+ <[^>]*> 4644 mflo a0
+[0-9a-f]+ <[^>]*> 41a1 0001 lui at,0x1
+[0-9a-f]+ <[^>]*> 0025 8b3c mult a1,at
+[0-9a-f]+ <[^>]*> 4644 mflo a0
+[0-9a-f]+ <[^>]*> 41a1 0001 lui at,0x1
+[0-9a-f]+ <[^>]*> 5021 a5a5 ori at,at,0xa5a5
+[0-9a-f]+ <[^>]*> 0025 8b3c mult a1,at
+[0-9a-f]+ <[^>]*> 4644 mflo a0
+[0-9a-f]+ <[^>]*> 00a4 8b3c mult a0,a1
+[0-9a-f]+ <[^>]*> 4644 mflo a0
+[0-9a-f]+ <[^>]*> 0084 f880 sra a0,a0,0x1f
+[0-9a-f]+ <[^>]*> 4601 mfhi at
+[0-9a-f]+ <[^>]*> 0024 6c3c tne a0,at,0x6
+[0-9a-f]+ <[^>]*> 4644 mflo a0
+[0-9a-f]+ <[^>]*> 00c5 8b3c mult a1,a2
+[0-9a-f]+ <[^>]*> 4644 mflo a0
+[0-9a-f]+ <[^>]*> 0084 f880 sra a0,a0,0x1f
+[0-9a-f]+ <[^>]*> 4601 mfhi at
+[0-9a-f]+ <[^>]*> 0024 6c3c tne a0,at,0x6
+[0-9a-f]+ <[^>]*> 4644 mflo a0
+[0-9a-f]+ <[^>]*> 00a4 9b3c multu a0,a1
+[0-9a-f]+ <[^>]*> 4601 mfhi at
+[0-9a-f]+ <[^>]*> 4644 mflo a0
+[0-9a-f]+ <[^>]*> 0001 6c3c tne at,zero,0x6
+[0-9a-f]+ <[^>]*> 00c5 9b3c multu a1,a2
+[0-9a-f]+ <[^>]*> 4601 mfhi at
+[0-9a-f]+ <[^>]*> 4644 mflo a0
+[0-9a-f]+ <[^>]*> 0001 6c3c tne at,zero,0x6
+ \.\.\.
===================================================================
@@ -0,0 +1,26 @@
+#as: -32 -trap
+#objdump: -dr --prefix-addresses --show-raw-insn
+#name: MIPS 64-bit mul with traps
+#source: mul64.s
+
+# Test the mul macro.
+
+.*: +file format .*mips.*
+
+Disassembly of section \.text:
+[0-9a-f]+ <[^>]*> 58c5 9b3c dmultu a1,a2
+[0-9a-f]+ <[^>]*> 4644 mflo a0
+[0-9a-f]+ <[^>]*> 3020 0001 li at,1
+[0-9a-f]+ <[^>]*> 5825 8b3c dmult a1,at
+[0-9a-f]+ <[^>]*> 4644 mflo a0
+[0-9a-f]+ <[^>]*> 58c5 8b3c dmult a1,a2
+[0-9a-f]+ <[^>]*> 4644 mflo a0
+[0-9a-f]+ <[^>]*> 5884 f888 dsra32 a0,a0,0x1f
+[0-9a-f]+ <[^>]*> 4601 mfhi at
+[0-9a-f]+ <[^>]*> 0024 6c3c tne a0,at,0x6
+[0-9a-f]+ <[^>]*> 4644 mflo a0
+[0-9a-f]+ <[^>]*> 58c5 9b3c dmultu a1,a2
+[0-9a-f]+ <[^>]*> 4601 mfhi at
+[0-9a-f]+ <[^>]*> 4644 mflo a0
+[0-9a-f]+ <[^>]*> 0001 6c3c tne at,zero,0x6
+ \.\.\.
===================================================================
@@ -890,8 +890,12 @@ if { [istarget mips*-*-vxworks*] } {
[mips_arch_list_matching fpisa5 gpr64]
run_dump_test_arches "mul" [mips_arch_list_matching mips1 \
!mips32r6]
+ run_dump_test_arches "mul-trap" [mips_arch_list_matching mips1 \
+ !mips32r6]
run_dump_test_arches "mul64" [mips_arch_list_matching mips3 !r5900 \
!mips64r6]
+ run_dump_test_arches "mul64-trap" [mips_arch_list_matching mips3 !r5900 \
+ !mips64r6]
run_dump_test_arches "rol" [mips_arch_list_matching mips1 !ror]
run_dump_test_arches "rol-hw" [mips_arch_list_matching ror]
===================================================================
@@ -0,0 +1,5 @@
+#as: -32 -trap
+#objdump: -dr --prefix-addresses
+#name: MIPS mul with traps
+#source: mul.s
+#dump: mips1@mul.d
===================================================================
@@ -0,0 +1,74 @@
+#as: -32 -trap
+#objdump: -drz --prefix-addresses --show-raw-insn
+#name: MIPS mul with traps
+#source: mul.s
+
+# Test the mul macro.
+
+.*: +file format .*mips.*
+
+Disassembly of section \.text:
+[0-9a-f]+ <[^>]*> 00850019 multu a0,a1
+[0-9a-f]+ <[^>]*> 00002012 mflo a0
+[0-9a-f]+ <[^>]*> 00000000 nop
+[0-9a-f]+ <[^>]*> 00000000 nop
+[0-9a-f]+ <[^>]*> 00a60019 multu a1,a2
+[0-9a-f]+ <[^>]*> 00002012 mflo a0
+[0-9a-f]+ <[^>]*> 24010000 li at,0
+[0-9a-f]+ <[^>]*> 00000000 nop
+[0-9a-f]+ <[^>]*> 00a10018 mult a1,at
+[0-9a-f]+ <[^>]*> 00002012 mflo a0
+[0-9a-f]+ <[^>]*> 24010001 li at,1
+[0-9a-f]+ <[^>]*> 00000000 nop
+[0-9a-f]+ <[^>]*> 00a10018 mult a1,at
+[0-9a-f]+ <[^>]*> 00002012 mflo a0
+[0-9a-f]+ <[^>]*> 34018000 li at,0x8000
+[0-9a-f]+ <[^>]*> 00000000 nop
+[0-9a-f]+ <[^>]*> 00a10018 mult a1,at
+[0-9a-f]+ <[^>]*> 00002012 mflo a0
+[0-9a-f]+ <[^>]*> 24018000 li at,-32768
+[0-9a-f]+ <[^>]*> 00000000 nop
+[0-9a-f]+ <[^>]*> 00a10018 mult a1,at
+[0-9a-f]+ <[^>]*> 00002012 mflo a0
+[0-9a-f]+ <[^>]*> 3c010001 lui at,0x1
+[0-9a-f]+ <[^>]*> 00000000 nop
+[0-9a-f]+ <[^>]*> 00a10018 mult a1,at
+[0-9a-f]+ <[^>]*> 00002012 mflo a0
+[0-9a-f]+ <[^>]*> 3c010001 lui at,0x1
+[0-9a-f]+ <[^>]*> 3421a5a5 ori at,at,0xa5a5
+[0-9a-f]+ <[^>]*> 00a10018 mult a1,at
+[0-9a-f]+ <[^>]*> 00002012 mflo a0
+[0-9a-f]+ <[^>]*> 00000000 nop
+[0-9a-f]+ <[^>]*> 00000000 nop
+[0-9a-f]+ <[^>]*> 00850018 mult a0,a1
+[0-9a-f]+ <[^>]*> 00002012 mflo a0
+[0-9a-f]+ <[^>]*> 000427c3 sra a0,a0,0x1f
+[0-9a-f]+ <[^>]*> 00000810 mfhi at
+[0-9a-f]+ <[^>]*> 008101b6 tne a0,at,0x6
+[0-9a-f]+ <[^>]*> 00002012 mflo a0
+[0-9a-f]+ <[^>]*> 00000000 nop
+[0-9a-f]+ <[^>]*> 00000000 nop
+[0-9a-f]+ <[^>]*> 00a60018 mult a1,a2
+[0-9a-f]+ <[^>]*> 00002012 mflo a0
+[0-9a-f]+ <[^>]*> 000427c3 sra a0,a0,0x1f
+[0-9a-f]+ <[^>]*> 00000810 mfhi at
+[0-9a-f]+ <[^>]*> 008101b6 tne a0,at,0x6
+[0-9a-f]+ <[^>]*> 00002012 mflo a0
+[0-9a-f]+ <[^>]*> 00000000 nop
+[0-9a-f]+ <[^>]*> 00000000 nop
+[0-9a-f]+ <[^>]*> 00850019 multu a0,a1
+[0-9a-f]+ <[^>]*> 00000810 mfhi at
+[0-9a-f]+ <[^>]*> 00002012 mflo a0
+[0-9a-f]+ <[^>]*> 002001b6 tne at,zero,0x6
+[0-9a-f]+ <[^>]*> 00000000 nop
+[0-9a-f]+ <[^>]*> 00a60019 multu a1,a2
+[0-9a-f]+ <[^>]*> 00000810 mfhi at
+[0-9a-f]+ <[^>]*> 00002012 mflo a0
+[0-9a-f]+ <[^>]*> 002001b6 tne at,zero,0x6
+[0-9a-f]+ <[^>]*> 00000000 nop
+[0-9a-f]+ <[^>]*> 00000000 nop
+[0-9a-f]+ <[^>]*> 00000000 nop
+[0-9a-f]+ <[^>]*> 00000000 nop
+[0-9a-f]+ <[^>]*> 00000000 nop
+[0-9a-f]+ <[^>]*> 00000000 nop
+[0-9a-f]+ <[^>]*> 00000000 nop
===================================================================
@@ -0,0 +1,5 @@
+#as: -32 -trap
+#objdump: -drz --prefix-addresses --show-raw-insn
+#name: MIPS mul with traps
+#source: mul.s
+#dump: mips2@mul-trap.d
===================================================================
@@ -0,0 +1,38 @@
+#as: -32 -trap
+#objdump: -drz --prefix-addresses --show-raw-insn
+#name: MIPS 64-bit mul with traps
+#source: mul64.s
+
+# Test the mul macro.
+
+.*: +file format .*mips.*
+
+Disassembly of section \.text:
+[0-9a-f]+ <[^>]*> 00a6001d dmultu a1,a2
+[0-9a-f]+ <[^>]*> 00002012 mflo a0
+[0-9a-f]+ <[^>]*> 24010001 li at,1
+[0-9a-f]+ <[^>]*> 00000000 nop
+[0-9a-f]+ <[^>]*> 00a1001c dmult a1,at
+[0-9a-f]+ <[^>]*> 00002012 mflo a0
+[0-9a-f]+ <[^>]*> 00000000 nop
+[0-9a-f]+ <[^>]*> 00000000 nop
+[0-9a-f]+ <[^>]*> 00a6001c dmult a1,a2
+[0-9a-f]+ <[^>]*> 00002012 mflo a0
+[0-9a-f]+ <[^>]*> 000427ff dsra32 a0,a0,0x1f
+[0-9a-f]+ <[^>]*> 00000810 mfhi at
+[0-9a-f]+ <[^>]*> 008101b6 tne a0,at,0x6
+[0-9a-f]+ <[^>]*> 00002012 mflo a0
+[0-9a-f]+ <[^>]*> 00000000 nop
+[0-9a-f]+ <[^>]*> 00000000 nop
+[0-9a-f]+ <[^>]*> 00a6001d dmultu a1,a2
+[0-9a-f]+ <[^>]*> 00000810 mfhi at
+[0-9a-f]+ <[^>]*> 00002012 mflo a0
+[0-9a-f]+ <[^>]*> 002001b6 tne at,zero,0x6
+[0-9a-f]+ <[^>]*> 00000000 nop
+[0-9a-f]+ <[^>]*> 00000000 nop
+[0-9a-f]+ <[^>]*> 00000000 nop
+[0-9a-f]+ <[^>]*> 00000000 nop
+[0-9a-f]+ <[^>]*> 00000000 nop
+[0-9a-f]+ <[^>]*> 00000000 nop
+[0-9a-f]+ <[^>]*> 00000000 nop
+[0-9a-f]+ <[^>]*> 00000000 nop
===================================================================
@@ -0,0 +1,5 @@
+#as: -32 -trap
+#objdump: -drz --prefix-addresses --show-raw-insn
+#name: MIPS mul with traps
+#source: mul.s
+#dump: mips2@mul-trap.d
===================================================================
@@ -0,0 +1,5 @@
+#as: -32 -trap
+#objdump: -drz --prefix-addresses --show-raw-insn
+#name: MIPS 64-bit mul with traps
+#source: mul64.s
+#dump: mips3@mul64-trap.d
===================================================================
@@ -0,0 +1,5 @@
+#as: -32 -trap
+#objdump: -drz --prefix-addresses --show-raw-insn
+#name: MIPS mul with traps
+#source: mul.s
+#dump: mips2@mul-trap.d
===================================================================
@@ -0,0 +1,5 @@
+#as: -32 -trap
+#objdump: -drz --prefix-addresses --show-raw-insn
+#name: MIPS 64-bit mul with traps
+#source: mul64.s
+#dump: mips3@mul64-trap.d
===================================================================
@@ -0,0 +1,52 @@
+#as: -32 -trap
+#objdump: -dr --prefix-addresses --show-raw-insn
+#name: MIPS mul with traps
+#source: mul.s
+
+# Test the mul macro.
+
+.*: +file format .*mips.*
+
+Disassembly of section \.text:
+[0-9a-f]+ <[^>]*> 70852002 mul a0,a0,a1
+[0-9a-f]+ <[^>]*> 70a62002 mul a0,a1,a2
+[0-9a-f]+ <[^>]*> 24010000 li at,0
+[0-9a-f]+ <[^>]*> 00a10018 mult a1,at
+[0-9a-f]+ <[^>]*> 00002012 mflo a0
+[0-9a-f]+ <[^>]*> 24010001 li at,1
+[0-9a-f]+ <[^>]*> 00a10018 mult a1,at
+[0-9a-f]+ <[^>]*> 00002012 mflo a0
+[0-9a-f]+ <[^>]*> 34018000 li at,0x8000
+[0-9a-f]+ <[^>]*> 00a10018 mult a1,at
+[0-9a-f]+ <[^>]*> 00002012 mflo a0
+[0-9a-f]+ <[^>]*> 24018000 li at,-32768
+[0-9a-f]+ <[^>]*> 00a10018 mult a1,at
+[0-9a-f]+ <[^>]*> 00002012 mflo a0
+[0-9a-f]+ <[^>]*> 3c010001 lui at,0x1
+[0-9a-f]+ <[^>]*> 00a10018 mult a1,at
+[0-9a-f]+ <[^>]*> 00002012 mflo a0
+[0-9a-f]+ <[^>]*> 3c010001 lui at,0x1
+[0-9a-f]+ <[^>]*> 3421a5a5 ori at,at,0xa5a5
+[0-9a-f]+ <[^>]*> 00a10018 mult a1,at
+[0-9a-f]+ <[^>]*> 00002012 mflo a0
+[0-9a-f]+ <[^>]*> 00850018 mult a0,a1
+[0-9a-f]+ <[^>]*> 00002012 mflo a0
+[0-9a-f]+ <[^>]*> 000427c3 sra a0,a0,0x1f
+[0-9a-f]+ <[^>]*> 00000810 mfhi at
+[0-9a-f]+ <[^>]*> 008101b6 tne a0,at,0x6
+[0-9a-f]+ <[^>]*> 00002012 mflo a0
+[0-9a-f]+ <[^>]*> 00a60018 mult a1,a2
+[0-9a-f]+ <[^>]*> 00002012 mflo a0
+[0-9a-f]+ <[^>]*> 000427c3 sra a0,a0,0x1f
+[0-9a-f]+ <[^>]*> 00000810 mfhi at
+[0-9a-f]+ <[^>]*> 008101b6 tne a0,at,0x6
+[0-9a-f]+ <[^>]*> 00002012 mflo a0
+[0-9a-f]+ <[^>]*> 00850019 multu a0,a1
+[0-9a-f]+ <[^>]*> 00000810 mfhi at
+[0-9a-f]+ <[^>]*> 00002012 mflo a0
+[0-9a-f]+ <[^>]*> 002001b6 tne at,zero,0x6
+[0-9a-f]+ <[^>]*> 00a60019 multu a1,a2
+[0-9a-f]+ <[^>]*> 00000810 mfhi at
+[0-9a-f]+ <[^>]*> 00002012 mflo a0
+[0-9a-f]+ <[^>]*> 002001b6 tne at,zero,0x6
+ \.\.\.
===================================================================
@@ -0,0 +1,26 @@
+#as: -32 -trap
+#objdump: -dr --prefix-addresses --show-raw-insn
+#name: MIPS 64-bit mul with traps
+#source: mul64.s
+
+# Test the mul macro.
+
+.*: +file format .*mips.*
+
+Disassembly of section \.text:
+[0-9a-f]+ <[^>]*> 00a6001d dmultu a1,a2
+[0-9a-f]+ <[^>]*> 00002012 mflo a0
+[0-9a-f]+ <[^>]*> 24010001 li at,1
+[0-9a-f]+ <[^>]*> 00a1001c dmult a1,at
+[0-9a-f]+ <[^>]*> 00002012 mflo a0
+[0-9a-f]+ <[^>]*> 00a6001c dmult a1,a2
+[0-9a-f]+ <[^>]*> 00002012 mflo a0
+[0-9a-f]+ <[^>]*> 000427ff dsra32 a0,a0,0x1f
+[0-9a-f]+ <[^>]*> 00000810 mfhi at
+[0-9a-f]+ <[^>]*> 008101b6 tne a0,at,0x6
+[0-9a-f]+ <[^>]*> 00002012 mflo a0
+[0-9a-f]+ <[^>]*> 00a6001d dmultu a1,a2
+[0-9a-f]+ <[^>]*> 00000810 mfhi at
+[0-9a-f]+ <[^>]*> 00002012 mflo a0
+[0-9a-f]+ <[^>]*> 002001b6 tne at,zero,0x6
+ \.\.\.
===================================================================
@@ -0,0 +1,25 @@
+#as: -32 -trap
+#objdump: -dr --prefix-addresses --show-raw-insn
+#name: MIPS 64-bit mul with traps
+#source: mul64.s
+
+# Test the mul macro.
+
+.*: +file format .*mips.*
+
+Disassembly of section \.text:
+[0-9a-f]+ <[^>]*> 70a62003 dmul a0,a1,a2
+[0-9a-f]+ <[^>]*> 24010001 li at,1
+[0-9a-f]+ <[^>]*> 00a1001c dmult a1,at
+[0-9a-f]+ <[^>]*> 00002012 mflo a0
+[0-9a-f]+ <[^>]*> 00a6001c dmult a1,a2
+[0-9a-f]+ <[^>]*> 00002012 mflo a0
+[0-9a-f]+ <[^>]*> 000427ff dsra32 a0,a0,0x1f
+[0-9a-f]+ <[^>]*> 00000810 mfhi at
+[0-9a-f]+ <[^>]*> 008101b6 tne a0,at,0x6
+[0-9a-f]+ <[^>]*> 00002012 mflo a0
+[0-9a-f]+ <[^>]*> 00a6001d dmultu a1,a2
+[0-9a-f]+ <[^>]*> 00000810 mfhi at
+[0-9a-f]+ <[^>]*> 00002012 mflo a0
+[0-9a-f]+ <[^>]*> 002001b6 tne at,zero,0x6
+ \.\.\.
===================================================================
@@ -0,0 +1,54 @@
+#as: -32 -trap
+#objdump: -dr --prefix-addresses --show-raw-insn
+#name: MIPS mul with traps
+#source: mul.s
+
+# Test the mul macro.
+
+.*: +file format .*mips.*
+
+Disassembly of section \.text:
+[0-9a-f]+ <[^>]*> 00850019 multu a0,a1
+[0-9a-f]+ <[^>]*> 00002012 mflo a0
+[0-9a-f]+ <[^>]*> 00a60019 multu a1,a2
+[0-9a-f]+ <[^>]*> 00002012 mflo a0
+[0-9a-f]+ <[^>]*> 24010000 li at,0
+[0-9a-f]+ <[^>]*> 00a10018 mult a1,at
+[0-9a-f]+ <[^>]*> 00002012 mflo a0
+[0-9a-f]+ <[^>]*> 24010001 li at,1
+[0-9a-f]+ <[^>]*> 00a10018 mult a1,at
+[0-9a-f]+ <[^>]*> 00002012 mflo a0
+[0-9a-f]+ <[^>]*> 34018000 li at,0x8000
+[0-9a-f]+ <[^>]*> 00a10018 mult a1,at
+[0-9a-f]+ <[^>]*> 00002012 mflo a0
+[0-9a-f]+ <[^>]*> 24018000 li at,-32768
+[0-9a-f]+ <[^>]*> 00a10018 mult a1,at
+[0-9a-f]+ <[^>]*> 00002012 mflo a0
+[0-9a-f]+ <[^>]*> 3c010001 lui at,0x1
+[0-9a-f]+ <[^>]*> 00a10018 mult a1,at
+[0-9a-f]+ <[^>]*> 00002012 mflo a0
+[0-9a-f]+ <[^>]*> 3c010001 lui at,0x1
+[0-9a-f]+ <[^>]*> 3421a5a5 ori at,at,0xa5a5
+[0-9a-f]+ <[^>]*> 00a10018 mult a1,at
+[0-9a-f]+ <[^>]*> 00002012 mflo a0
+[0-9a-f]+ <[^>]*> 00850018 mult a0,a1
+[0-9a-f]+ <[^>]*> 00002012 mflo a0
+[0-9a-f]+ <[^>]*> 000427c3 sra a0,a0,0x1f
+[0-9a-f]+ <[^>]*> 00000810 mfhi at
+[0-9a-f]+ <[^>]*> 008101b6 tne a0,at,0x6
+[0-9a-f]+ <[^>]*> 00002012 mflo a0
+[0-9a-f]+ <[^>]*> 00a60018 mult a1,a2
+[0-9a-f]+ <[^>]*> 00002012 mflo a0
+[0-9a-f]+ <[^>]*> 000427c3 sra a0,a0,0x1f
+[0-9a-f]+ <[^>]*> 00000810 mfhi at
+[0-9a-f]+ <[^>]*> 008101b6 tne a0,at,0x6
+[0-9a-f]+ <[^>]*> 00002012 mflo a0
+[0-9a-f]+ <[^>]*> 00850019 multu a0,a1
+[0-9a-f]+ <[^>]*> 00000810 mfhi at
+[0-9a-f]+ <[^>]*> 00002012 mflo a0
+[0-9a-f]+ <[^>]*> 002001b6 tne at,zero,0x6
+[0-9a-f]+ <[^>]*> 00a60019 multu a1,a2
+[0-9a-f]+ <[^>]*> 00000810 mfhi at
+[0-9a-f]+ <[^>]*> 00002012 mflo a0
+[0-9a-f]+ <[^>]*> 002001b6 tne at,zero,0x6
+ \.\.\.
===================================================================
@@ -0,0 +1,26 @@
+#as: -32 -trap
+#objdump: -dr --prefix-addresses --show-raw-insn
+#name: MIPS 64-bit mul with traps
+#source: mul64.s
+
+# Test the mul macro.
+
+.*: +file format .*mips.*
+
+Disassembly of section \.text:
+[0-9a-f]+ <[^>]*> 00a6001d dmultu a1,a2
+[0-9a-f]+ <[^>]*> 00002012 mflo a0
+[0-9a-f]+ <[^>]*> 24010001 li at,1
+[0-9a-f]+ <[^>]*> 00a1001c dmult a1,at
+[0-9a-f]+ <[^>]*> 00002012 mflo a0
+[0-9a-f]+ <[^>]*> 00a6001c dmult a1,a2
+[0-9a-f]+ <[^>]*> 00002012 mflo a0
+[0-9a-f]+ <[^>]*> 000427ff dsra32 a0,a0,0x1f
+[0-9a-f]+ <[^>]*> 00000810 mfhi at
+[0-9a-f]+ <[^>]*> 008101b6 tne a0,at,0x6
+[0-9a-f]+ <[^>]*> 00002012 mflo a0
+[0-9a-f]+ <[^>]*> 00a6001d dmultu a1,a2
+[0-9a-f]+ <[^>]*> 00000810 mfhi at
+[0-9a-f]+ <[^>]*> 00002012 mflo a0
+[0-9a-f]+ <[^>]*> 002001b6 tne at,zero,0x6
+ \.\.\.
===================================================================
@@ -0,0 +1,5 @@
+#as: -32 -trap
+#objdump: -dr --prefix-addresses
+#name: MIPS mul with traps
+#source: mul.s
+#dump: mips1@mul.d
===================================================================
@@ -0,0 +1,5 @@
+#as: -32 -trap
+#objdump: -dr --prefix-addresses
+#name: MIPS mul with traps
+#source: mul.s
+#dump: mips1@mul.d
===================================================================
@@ -0,0 +1,5 @@
+#as: -32 -trap
+#objdump: -drz --prefix-addresses --show-raw-insn
+#name: MIPS mul with traps
+#source: mul.s
+#dump: mips2@mul-trap.d
===================================================================
@@ -0,0 +1,5 @@
+#as: -32 -trap
+#objdump: -drz --prefix-addresses --show-raw-insn
+#name: MIPS 64-bit mul with traps
+#source: mul64.s
+#dump: mips3@mul64-trap.d
===================================================================
@@ -0,0 +1,52 @@
+#as: -32 -trap
+#objdump: -dr --prefix-addresses --show-raw-insn
+#name: MIPS mul with traps
+#source: mul.s
+
+# Test the mul macro.
+
+.*: +file format .*mips.*
+
+Disassembly of section \.text:
+[0-9a-f]+ <[^>]*> 00852019 multu a0,a0,a1
+[0-9a-f]+ <[^>]*> 00a62019 multu a0,a1,a2
+[0-9a-f]+ <[^>]*> 24010000 li at,0
+[0-9a-f]+ <[^>]*> 00a10018 mult a1,at
+[0-9a-f]+ <[^>]*> 00002012 mflo a0
+[0-9a-f]+ <[^>]*> 24010001 li at,1
+[0-9a-f]+ <[^>]*> 00a10018 mult a1,at
+[0-9a-f]+ <[^>]*> 00002012 mflo a0
+[0-9a-f]+ <[^>]*> 34018000 li at,0x8000
+[0-9a-f]+ <[^>]*> 00a10018 mult a1,at
+[0-9a-f]+ <[^>]*> 00002012 mflo a0
+[0-9a-f]+ <[^>]*> 24018000 li at,-32768
+[0-9a-f]+ <[^>]*> 00a10018 mult a1,at
+[0-9a-f]+ <[^>]*> 00002012 mflo a0
+[0-9a-f]+ <[^>]*> 3c010001 lui at,0x1
+[0-9a-f]+ <[^>]*> 00a10018 mult a1,at
+[0-9a-f]+ <[^>]*> 00002012 mflo a0
+[0-9a-f]+ <[^>]*> 3c010001 lui at,0x1
+[0-9a-f]+ <[^>]*> 3421a5a5 ori at,at,0xa5a5
+[0-9a-f]+ <[^>]*> 00a10018 mult a1,at
+[0-9a-f]+ <[^>]*> 00002012 mflo a0
+[0-9a-f]+ <[^>]*> 00850018 mult a0,a1
+[0-9a-f]+ <[^>]*> 00002012 mflo a0
+[0-9a-f]+ <[^>]*> 000427c3 sra a0,a0,0x1f
+[0-9a-f]+ <[^>]*> 00000810 mfhi at
+[0-9a-f]+ <[^>]*> 008101b6 tne a0,at,0x6
+[0-9a-f]+ <[^>]*> 00002012 mflo a0
+[0-9a-f]+ <[^>]*> 00a60018 mult a1,a2
+[0-9a-f]+ <[^>]*> 00002012 mflo a0
+[0-9a-f]+ <[^>]*> 000427c3 sra a0,a0,0x1f
+[0-9a-f]+ <[^>]*> 00000810 mfhi at
+[0-9a-f]+ <[^>]*> 008101b6 tne a0,at,0x6
+[0-9a-f]+ <[^>]*> 00002012 mflo a0
+[0-9a-f]+ <[^>]*> 00850019 multu a0,a1
+[0-9a-f]+ <[^>]*> 00000810 mfhi at
+[0-9a-f]+ <[^>]*> 00002012 mflo a0
+[0-9a-f]+ <[^>]*> 002001b6 tne at,zero,0x6
+[0-9a-f]+ <[^>]*> 00a60019 multu a1,a2
+[0-9a-f]+ <[^>]*> 00000810 mfhi at
+[0-9a-f]+ <[^>]*> 00002012 mflo a0
+[0-9a-f]+ <[^>]*> 002001b6 tne at,zero,0x6
+ \.\.\.
===================================================================
@@ -0,0 +1,70 @@
+#as: -32 -trap
+#objdump: -drz --prefix-addresses --show-raw-insn
+#name: MIPS mul with traps
+#source: mul.s
+
+# Test the mul macro.
+
+.*: +file format .*mips.*
+
+Disassembly of section \.text:
+[0-9a-f]+ <[^>]*> 00850019 multu a0,a1
+[0-9a-f]+ <[^>]*> 00002012 mflo a0
+[0-9a-f]+ <[^>]*> 00000000 nop
+[0-9a-f]+ <[^>]*> 00000000 nop
+[0-9a-f]+ <[^>]*> 00a62058 mul a0,a1,a2
+[0-9a-f]+ <[^>]*> 24010000 li at,0
+[0-9a-f]+ <[^>]*> 00a10018 mult a1,at
+[0-9a-f]+ <[^>]*> 00002012 mflo a0
+[0-9a-f]+ <[^>]*> 24010001 li at,1
+[0-9a-f]+ <[^>]*> 00000000 nop
+[0-9a-f]+ <[^>]*> 00a10018 mult a1,at
+[0-9a-f]+ <[^>]*> 00002012 mflo a0
+[0-9a-f]+ <[^>]*> 34018000 li at,0x8000
+[0-9a-f]+ <[^>]*> 00000000 nop
+[0-9a-f]+ <[^>]*> 00a10018 mult a1,at
+[0-9a-f]+ <[^>]*> 00002012 mflo a0
+[0-9a-f]+ <[^>]*> 24018000 li at,-32768
+[0-9a-f]+ <[^>]*> 00000000 nop
+[0-9a-f]+ <[^>]*> 00a10018 mult a1,at
+[0-9a-f]+ <[^>]*> 00002012 mflo a0
+[0-9a-f]+ <[^>]*> 3c010001 lui at,0x1
+[0-9a-f]+ <[^>]*> 00000000 nop
+[0-9a-f]+ <[^>]*> 00a10018 mult a1,at
+[0-9a-f]+ <[^>]*> 00002012 mflo a0
+[0-9a-f]+ <[^>]*> 3c010001 lui at,0x1
+[0-9a-f]+ <[^>]*> 3421a5a5 ori at,at,0xa5a5
+[0-9a-f]+ <[^>]*> 00a10018 mult a1,at
+[0-9a-f]+ <[^>]*> 00002012 mflo a0
+[0-9a-f]+ <[^>]*> 00000000 nop
+[0-9a-f]+ <[^>]*> 00000000 nop
+[0-9a-f]+ <[^>]*> 00850018 mult a0,a1
+[0-9a-f]+ <[^>]*> 00002012 mflo a0
+[0-9a-f]+ <[^>]*> 000427c3 sra a0,a0,0x1f
+[0-9a-f]+ <[^>]*> 00000810 mfhi at
+[0-9a-f]+ <[^>]*> 008101b6 tne a0,at,0x6
+[0-9a-f]+ <[^>]*> 00002012 mflo a0
+[0-9a-f]+ <[^>]*> 00000000 nop
+[0-9a-f]+ <[^>]*> 00000000 nop
+[0-9a-f]+ <[^>]*> 00a60018 mult a1,a2
+[0-9a-f]+ <[^>]*> 00002012 mflo a0
+[0-9a-f]+ <[^>]*> 000427c3 sra a0,a0,0x1f
+[0-9a-f]+ <[^>]*> 00000810 mfhi at
+[0-9a-f]+ <[^>]*> 008101b6 tne a0,at,0x6
+[0-9a-f]+ <[^>]*> 00002012 mflo a0
+[0-9a-f]+ <[^>]*> 00000000 nop
+[0-9a-f]+ <[^>]*> 00000000 nop
+[0-9a-f]+ <[^>]*> 00850019 multu a0,a1
+[0-9a-f]+ <[^>]*> 00000810 mfhi at
+[0-9a-f]+ <[^>]*> 00002012 mflo a0
+[0-9a-f]+ <[^>]*> 002001b6 tne at,zero,0x6
+[0-9a-f]+ <[^>]*> 00000000 nop
+[0-9a-f]+ <[^>]*> 00a60019 multu a1,a2
+[0-9a-f]+ <[^>]*> 00000810 mfhi at
+[0-9a-f]+ <[^>]*> 00002012 mflo a0
+[0-9a-f]+ <[^>]*> 002001b6 tne at,zero,0x6
+[0-9a-f]+ <[^>]*> 00000000 nop
+[0-9a-f]+ <[^>]*> 00000000 nop
+[0-9a-f]+ <[^>]*> 00000000 nop
+[0-9a-f]+ <[^>]*> 00000000 nop
+[0-9a-f]+ <[^>]*> 00000000 nop
===================================================================
@@ -0,0 +1,5 @@
+#as: -32 -trap
+#objdump: -drz --prefix-addresses --show-raw-insn
+#name: MIPS 64-bit mul with traps
+#source: mul64.s
+#dump: mips3@mul64-trap.d