diff mbox series

[v4,3/7] x86: templatize AMX_INT8 TDPB* instructions

Message ID a43e419bf715044a6d1213f5e8c879437d3b2bc2.1790705096.git.RohanRadhesh.Shenoy@amd.com
State New
Headers
Series x86: add ACE V1 ISA support |

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Commit Message

Shenoy, Rohan Radhesh Sept. 29, 2026, 6:30 p.m. UTC 
  TDPBUUD, TDPBUSD, TDPBSSD, and TDPBSUD can be simplified using <tdpb>.
ACE can reuse this iterator for TOP4B* instructions.
---
 opcodes/i386-opc.tbl | 10 ++++++----
 1 file changed, 6 insertions(+), 4 deletions(-)

Comments

Jan Beulich Oct. 2, 2026, 7:19 a.m. UTC | #1 
On 29.09.2026 20:30, Rohan Shenoy wrote:
> TDPBUUD, TDPBUSD, TDPBSSD, and TDPBSUD can be simplified using <tdpb>.
> ACE can reuse this iterator for TOP4B* instructions.

"... can subsequently ..."

> --- a/opcodes/i386-opc.tbl
> +++ b/opcodes/i386-opc.tbl
> @@ -3249,10 +3249,12 @@ tcmmrlfp16ps, 0x6c, AMX_COMPLEX, Modrm|Vex128|Space0F38|Src2VVVV|VexW0|NoSuf, {
>  
>  tdpbf16ps, 0xf35c, AMX_BF16, Modrm|Vex128|Space0F38|Src2VVVV|VexW0|NoSuf, { RegTMM, RegTMM, RegTMM }
>  tdpfp16ps, 0xf25c, AMX_FP16, Modrm|Vex128|Space0F38|Src2VVVV|VexW0|NoSuf, { RegTMM, RegTMM, RegTMM }
> -tdpbssd, 0xf25e, AMX_INT8, Modrm|Vex128|Space0F38|Src2VVVV|VexW0|NoSuf, { RegTMM, RegTMM, RegTMM }
> -tdpbuud, 0x5e, AMX_INT8, Modrm|Vex128|Space0F38|Src2VVVV|VexW0|NoSuf, { RegTMM, RegTMM, RegTMM }
> -tdpbusd, 0x665e, AMX_INT8, Modrm|Vex128|Space0F38|Src2VVVV|VexW0|NoSuf, { RegTMM, RegTMM, RegTMM }
> -tdpbsud, 0xf35e, AMX_INT8, Modrm|Vex128|Space0F38|Src2VVVV|VexW0|NoSuf, { RegTMM, RegTMM, RegTMM }
> +
> +<tdpb:pfx, uu:, us:66, ss:f2, su:f3>

Changing the original order is fine with me, but if you change it, then in
a way that can be justified (I can't justify the order above, no matter
what criteria I try). One option would be to simply sort alphabetically.
What I'd prefer is sorting numerically by EVEX-encoded prefix (i.e.
swapping the last two entries). I can make that change while committing.

Jan
diff mbox series

Patch

diff --git a/opcodes/i386-opc.tbl b/opcodes/i386-opc.tbl
index 0801ebba0db..40f22756659 100644
--- a/opcodes/i386-opc.tbl
+++ b/opcodes/i386-opc.tbl
@@ -3249,10 +3249,12 @@  tcmmrlfp16ps, 0x6c, AMX_COMPLEX, Modrm|Vex128|Space0F38|Src2VVVV|VexW0|NoSuf, {
 
 tdpbf16ps, 0xf35c, AMX_BF16, Modrm|Vex128|Space0F38|Src2VVVV|VexW0|NoSuf, { RegTMM, RegTMM, RegTMM }
 tdpfp16ps, 0xf25c, AMX_FP16, Modrm|Vex128|Space0F38|Src2VVVV|VexW0|NoSuf, { RegTMM, RegTMM, RegTMM }
-tdpbssd, 0xf25e, AMX_INT8, Modrm|Vex128|Space0F38|Src2VVVV|VexW0|NoSuf, { RegTMM, RegTMM, RegTMM }
-tdpbuud, 0x5e, AMX_INT8, Modrm|Vex128|Space0F38|Src2VVVV|VexW0|NoSuf, { RegTMM, RegTMM, RegTMM }
-tdpbusd, 0x665e, AMX_INT8, Modrm|Vex128|Space0F38|Src2VVVV|VexW0|NoSuf, { RegTMM, RegTMM, RegTMM }
-tdpbsud, 0xf35e, AMX_INT8, Modrm|Vex128|Space0F38|Src2VVVV|VexW0|NoSuf, { RegTMM, RegTMM, RegTMM }
+
+<tdpb:pfx, uu:, us:66, ss:f2, su:f3>
+
+tdpb<tdpb>d, 0x<tdpb:pfx>5e, AMX_INT8, Modrm|Vex128|Space0F38|Src2VVVV|VexW0|NoSuf, { RegTMM, RegTMM, RegTMM }
+
+<tdpb>
 
 tileloadd, 0xf24b, APX_F(AMX_TILE), Sibmem|Vex128|EVex128|Space0F38|VexW0|NoSuf, { Unspecified|BaseIndex, RegTMM }
 tileloaddt1, 0x664b, APX_F(AMX_TILE), Sibmem|Vex128|EVex128|Space0F38|VexW0|NoSuf, { Unspecified|BaseIndex, RegTMM }