diff mbox series

[v2] x86-64: Relax BFD_RELOC_X86_64_GOTTPOFF check

Message ID DM4PR11MB5487EB130EE457CDE8EE2B66ECD32@DM4PR11MB5487.namprd11.prod.outlook.com
State New
Headers
Series [v2] x86-64: Relax BFD_RELOC_X86_64_GOTTPOFF check |

Checks

Context Check Description
linaro-tcwg-bot/tcwg_binutils_build--master-arm fail Patch failed to apply
linaro-tcwg-bot/tcwg_binutils_build--master-aarch64 fail Patch failed to apply

Commit Message

Kong, Lingling July 1, 2024, 3:03 a.m. UTC 
  Updated the patch according to review comments.

Thanks,
Lingling


Relax BFD_RELOC_X86_64_GOTTPOFF check for APX NF,
Allow "{nf} add foo@gottpoff(%rip), %reg1"

gas/

         * config/tc-i386.c (md_assemble): Relax
               BFD_RELOC_X86_64_GOTTPOFF check.
               Allow "{nf} add foo@gottpoff(%rip), %reg1".
         * testsuite/gas/i386/x86-64-gottpoff.d: Updated.
         * testsuite/gas/i386/x86-64-gottpoff.s: Add tests for
         "{nf} add foo@gottpoff(%rip), %reg",
         "{nf} add %reg1, foo@gottpoff(%rip), %reg2" and
         "{nf} add foo@gottpoff(%rip), %reg, %reg2".

gold/
         * testsuite/x86_64_ie_to_le.s: Add tests for
         "{nf} add foo@gottpoff(%rip), %reg",
         "{nf} add %reg1, foo@gottpoff(%rip), %reg2" and
         "{nf} add foo@gottpoff(%rip), %reg, %reg2".
         * testsuite/x86_64_ie_to_le.sh: Updated.

ld/

         * testsuite/ld-x86-64/tlsbindesc.s: Add R_X86_64_CODE_6_GOTTPOFF
               for APX NF tests.
         * testsuite/ld-x86-64/tlsbindesc.d: Updated.
         * testsuite/ld-x86-64/tlsbindesc.rd: Likewise.
---
gas/config/tc-i386.c                     | 10 +++++--
gas/testsuite/gas/i386/x86-64-gottpoff.d | 12 ++++++--
gas/testsuite/gas/i386/x86-64-gottpoff.s | 14 +++++++++
gold/testsuite/x86_64_ie_to_le.s         |  3 ++
gold/testsuite/x86_64_ie_to_le.sh        |  3 ++
ld/testsuite/ld-x86-64/tlsbindesc.dd     | 36 ++++++++++++++++++++++++
ld/testsuite/ld-x86-64/tlsbindesc.rd     | 36 ++++++++++++------------
ld/testsuite/ld-x86-64/tlsbindesc.s      | 12 ++++++++
8 files changed, 104 insertions(+), 22 deletions(-)

Comments

Jan Beulich July 1, 2024, 6:15 a.m. UTC | #1 
On 01.07.2024 05:03, Kong, Lingling wrote:
> --- a/gas/config/tc-i386.c
> +++ b/gas/config/tc-i386.c
> @@ -7137,8 +7137,14 @@ md_assemble (char *line)
>                              && i.base_reg
>                              && i.base_reg->reg_num == RegIP
>                              && i.tm.operand_types[0].bitfield.class == Reg
> -                             && i.tm.operand_types[2].bitfield.class == Reg)
> -                    /* Allow APX: add %reg1, foo@gottpoff(%rip), %reg2.  */
> +                            && (i.tm.operand_types[2].bitfield.class == Reg
> +                                || i.tm.operands == 2))

As before: You allow more than what you claim in the comment below,
unless I continue to be overlooking something: Aiui you want to
exclude forms with memory destination.

> +                   /* Allow APX:
> +                            add %reg1, foo@gottpoff(%rip), %reg2
> +                            add foo@gottpoff(%rip), %reg, %reg2
> +                            {nf} add foo@gottpoff(%rip), %reg
> +                            {nf} add %reg1, foo@gottpoff(%rip), %reg2
> +                            {nf} add foo@gottpoff(%rip), %reg, %reg2.  */
>                     break;

I don't think the {nf} forms need naming specially. Or if they did,
I wouldn't see - as mentioned before - why the {evex} forms won't
need/want mentioning, too.

From the presentation below one can get the impression that you're
altering indentation of the comment. It was properly indented though.
However, your patch also pretty clearly came through with corrupted
whitespace (no hard tabs at all), so it's not really clear what
changes.

Jan
Kong, Lingling July 1, 2024, 7:21 a.m. UTC | #2 
> -----Original Message-----
> From: Jan Beulich <jbeulich@suse.com>
> Sent: Monday, July 1, 2024 2:15 PM
> To: Kong, Lingling <lingling.kong@intel.com>
> Cc: H. J. Lu <hjl.tools@gmail.com>; binutils@sourceware.org
> Subject: Re: [PATCH v2] x86-64: Relax BFD_RELOC_X86_64_GOTTPOFF check
> 
> On 01.07.2024 05:03, Kong, Lingling wrote:
> > --- a/gas/config/tc-i386.c
> > +++ b/gas/config/tc-i386.c
> > @@ -7137,8 +7137,14 @@ md_assemble (char *line)
> >                              && i.base_reg
> >                              && i.base_reg->reg_num == RegIP
> >                              && i.tm.operand_types[0].bitfield.class == Reg
> > -                             && i.tm.operand_types[2].bitfield.class == Reg)
> > -                    /* Allow APX: add %reg1, foo@gottpoff(%rip), %reg2.  */
> > +                            && (i.tm.operand_types[2].bitfield.class == Reg
> > +                                || i.tm.operands == 2))
> 
> As before: You allow more than what you claim in the comment below, unless I
> continue to be overlooking something: Aiui you want to exclude forms with
> memory destination.
>
> > +                   /* Allow APX:
> > +                            add %reg1, foo@gottpoff(%rip), %reg2
> > +                            add foo@gottpoff(%rip), %reg, %reg2
> > +                            {nf} add foo@gottpoff(%rip), %reg
> > +                            {nf} add %reg1, foo@gottpoff(%rip), %reg2
> > +                            {nf} add foo@gottpoff(%rip), %reg, %reg2.
> > + */
> >                     break;
> 
> I don't think the {nf} forms need naming specially. Or if they did, I wouldn't see -
> as mentioned before - why the {evex} forms won't need/want mentioning, too.
> 
> From the presentation below one can get the impression that you're altering
> indentation of the comment. It was properly indented though.
> However, your patch also pretty clearly came through with corrupted whitespace
> (no hard tabs at all), so it's not really clear what changes.
> 
> Jan

Sorry for my  corrupted whitespace, there was a problem with the format of my email, so I re-sent the attachment. This version only modified the comment part, and the rest remained unchanged.

For such TLS sequences, it should only generated by compiler like GCC or LLVM not handwritten assembly codes. For compiler, it will generate NDD add(with memory it will have 3 operands) or NF add (with memory maybe 2 operands or 3 operands) as the comment below  for TLS sequence.

Thanks,
Lingling
Jan Beulich July 1, 2024, 8:08 a.m. UTC | #3 
On 01.07.2024 09:21, Kong, Lingling wrote:
>> -----Original Message-----
>> From: Jan Beulich <jbeulich@suse.com>
>> Sent: Monday, July 1, 2024 2:15 PM
>> To: Kong, Lingling <lingling.kong@intel.com>
>> Cc: H. J. Lu <hjl.tools@gmail.com>; binutils@sourceware.org
>> Subject: Re: [PATCH v2] x86-64: Relax BFD_RELOC_X86_64_GOTTPOFF check
>>
>> On 01.07.2024 05:03, Kong, Lingling wrote:
>>> --- a/gas/config/tc-i386.c
>>> +++ b/gas/config/tc-i386.c
>>> @@ -7137,8 +7137,14 @@ md_assemble (char *line)
>>>                              && i.base_reg
>>>                              && i.base_reg->reg_num == RegIP
>>>                              && i.tm.operand_types[0].bitfield.class == Reg
>>> -                             && i.tm.operand_types[2].bitfield.class == Reg)
>>> -                    /* Allow APX: add %reg1, foo@gottpoff(%rip), %reg2.  */
>>> +                            && (i.tm.operand_types[2].bitfield.class == Reg
>>> +                                || i.tm.operands == 2))
>>
>> As before: You allow more than what you claim in the comment below, unless I
>> continue to be overlooking something: Aiui you want to exclude forms with
>> memory destination.
>>
>>> +                   /* Allow APX:
>>> +                            add %reg1, foo@gottpoff(%rip), %reg2
>>> +                            add foo@gottpoff(%rip), %reg, %reg2
>>> +                            {nf} add foo@gottpoff(%rip), %reg
>>> +                            {nf} add %reg1, foo@gottpoff(%rip), %reg2
>>> +                            {nf} add foo@gottpoff(%rip), %reg, %reg2.
>>> + */
>>>                     break;
>>
>> I don't think the {nf} forms need naming specially. Or if they did, I wouldn't see -
>> as mentioned before - why the {evex} forms won't need/want mentioning, too.
>>
>> From the presentation below one can get the impression that you're altering
>> indentation of the comment. It was properly indented though.
>> However, your patch also pretty clearly came through with corrupted whitespace
>> (no hard tabs at all), so it's not really clear what changes.
> 
> Sorry for my  corrupted whitespace, there was a problem with the format of my email, so I re-sent the attachment. This version only modified the comment part, and the rest remained unchanged.

Thanks. Formatting there indeed looks okay.

> For such TLS sequences, it should only generated by compiler like GCC or LLVM not handwritten assembly codes.

Who or what says that hand-written assembly isn't permitted here? Who
or what says that compilers will only ever emit correct sequences? See
my earlier question to H.J. (which sadly has been left without actual
answer) - imo this either wants making as strict as possible or as
relaxed as possible. Anything in the middle is going to be entirely
arbitrary, and would hence need to come with a good explanation of why
exactly it is done like this.

Jan
diff mbox series

Patch

diff --git a/gas/config/tc-i386.c b/gas/config/tc-i386.c
index ab526924897..4f8727b0f6a 100644
--- a/gas/config/tc-i386.c
+++ b/gas/config/tc-i386.c
@@ -7137,8 +7137,14 @@  md_assemble (char *line)
                             && i.base_reg
                             && i.base_reg->reg_num == RegIP
                             && i.tm.operand_types[0].bitfield.class == Reg
-                             && i.tm.operand_types[2].bitfield.class == Reg)
-                    /* Allow APX: add %reg1, foo@gottpoff(%rip), %reg2.  */
+                            && (i.tm.operand_types[2].bitfield.class == Reg
+                                || i.tm.operands == 2))
+                   /* Allow APX:
+                            add %reg1, foo@gottpoff(%rip), %reg2
+                            add foo@gottpoff(%rip), %reg, %reg2
+                            {nf} add foo@gottpoff(%rip), %reg
+                            {nf} add %reg1, foo@gottpoff(%rip), %reg2
+                            {nf} add foo@gottpoff(%rip), %reg, %reg2.  */
                    break;
                  /* Fall through.  */
                case BFD_RELOC_386_TLS_GOTIE:
diff --git a/gas/testsuite/gas/i386/x86-64-gottpoff.d b/gas/testsuite/gas/i386/x86-64-gottpoff.d
index f2c039abe72..8f1c10f936c 100644
--- a/gas/testsuite/gas/i386/x86-64-gottpoff.d
+++ b/gas/testsuite/gas/i386/x86-64-gottpoff.d
@@ -18,6 +18,14 @@  Disassembly of section .text:
  +[a-f0-9]+:        d5 48 8b 25 00 00 00 00              mov    0x0\(%rip\),%r20        # 3c <_start\+0x3c> 38: R_X86_64_CODE_4_GOTTPOFF       foo-0x4
  +[a-f0-9]+:        62 74 fc 10 01 05 00 00 00 00    add    %r8,0x0\(%rip\),%r16        # 46 <_start\+0x46> 42: R_X86_64_CODE_6_GOTTPOFF       foo-0x4
  +[a-f0-9]+:        62 f4 9c 18 03 05 00 00 00 00    add    0x0\(%rip\),%rax,%r12        # 50 <_start\+0x50> 4c: R_X86_64_CODE_6_GOTTPOFF       foo-0x4
- +[a-f0-9]+:       62 74 fc 10 01 05 00 00 00 00    add    %r8,0x0\(%rip\),%r16        # 5a <_start\+0x5a> 56: R_X86_64_CODE_6_GOTTPOFF       foo-0x4
- +[a-f0-9]+:       62 f4 9c 18 03 05 00 00 00 00    add    0x0\(%rip\),%rax,%r12        # 64 <_start\+0x64> 60: R_X86_64_CODE_6_GOTTPOFF       foo-0x4
+ +[a-f0-9]+:      62 74 fc 14 01 05 00 00 00 00    \{nf\} add %r8,0x0\(%rip\),%r16        # 5a <_start\+0x5a> 56: R_X86_64_CODE_6_GOTTPOFF       foo-0x4
+ +[a-f0-9]+:      62 f4 9c 1c 03 05 00 00 00 00    \{nf\} add 0x0\(%rip\),%rax,%r12        # 64 <_start\+0x64> 60: R_X86_64_CODE_6_GOTTPOFF       foo-0x4
+ +[a-f0-9]+:      62 74 fc 10 01 05 00 00 00 00    add    %r8,0x0\(%rip\),%r16        # 6e <_start\+0x6e> 6a: R_X86_64_CODE_6_GOTTPOFF       foo-0x4
+ +[a-f0-9]+:      62 f4 9c 18 03 05 00 00 00 00    add    0x0\(%rip\),%rax,%r12        # 78 <_start\+0x78> 74: R_X86_64_CODE_6_GOTTPOFF       foo-0x4
+ +[a-f0-9]+:      62 74 fc 14 01 05 00 00 00 00    \{nf\} add %r8,0x0\(%rip\),%r16        # 82 <_start\+0x82> 7e: R_X86_64_CODE_6_GOTTPOFF       foo-0x4
+ +[a-f0-9]+:      62 f4 9c 1c 03 05 00 00 00 00    \{nf\} add 0x0\(%rip\),%rax,%r12        # 8c <_start\+0x8c> 88: R_X86_64_CODE_6_GOTTPOFF       foo-0x4
+ +[a-f0-9]+:      62 f4 fc 0c 03 05 00 00 00 00     \{nf\} add 0x0\(%rip\),%rax        # 96 <_start\+0x96> 92: R_X86_64_CODE_6_GOTTPOFF       foo-0x4
+ +[a-f0-9]+:      62 e4 fc 0c 03 05 00 00 00 00    \{nf\} add 0x0\(%rip\),%r16        # a0 <_start\+0xa0> 9c: R_X86_64_CODE_6_GOTTPOFF       foo-0x4
+ +[a-f0-9]+:      62 f4 fc 0c 03 05 00 00 00 00     \{nf\} add 0x0\(%rip\),%rax        # aa <_start\+0xaa> a6: R_X86_64_CODE_6_GOTTPOFF       foo-0x4
+ +[a-f0-9]+:      62 e4 fc 0c 03 05 00 00 00 00    \{nf\} add 0x0\(%rip\),%r16        # b4 <_start\+0xb4> b0: R_X86_64_CODE_6_GOTTPOFF       foo-0x4
#pass
diff --git a/gas/testsuite/gas/i386/x86-64-gottpoff.s b/gas/testsuite/gas/i386/x86-64-gottpoff.s
index e39010afc69..48d8a59a746 100644
--- a/gas/testsuite/gas/i386/x86-64-gottpoff.s
+++ b/gas/testsuite/gas/i386/x86-64-gottpoff.s
@@ -18,8 +18,22 @@  _start:
               addq     %r8, foo@GOTTPOFF(%rip), %r16
              addq     foo@GOTTPOFF(%rip), %rax, %r12
+             {nf} addq            %r8, foo@GOTTPOFF(%rip), %r16
+             {nf} addq            foo@GOTTPOFF(%rip), %rax, %r12
               .intel_syntax noprefix
               add        r16, QWORD PTR [rip + foo@GOTTPOFF], r8
              add        r12, rax, QWORD PTR [rip + foo@GOTTPOFF]
+             {nf} add               r16, QWORD PTR [rip + foo@GOTTPOFF], r8
+             {nf} add               r12, rax, QWORD PTR [rip + foo@GOTTPOFF]
+
+             .att_syntax prefix
+
+             {nf} addq            foo@GOTTPOFF(%rip), %rax
+             {nf} addq            foo@GOTTPOFF(%rip), %r16
+
+             .intel_syntax noprefix
+
+             {nf} add               rax, QWORD PTR [rip + foo@GOTTPOFF]
+             {nf} add               r16, QWORD PTR [rip + foo@GOTTPOFF]
diff --git a/gold/testsuite/x86_64_ie_to_le.s b/gold/testsuite/x86_64_ie_to_le.s
index bd0643dc87f..4bf3f4abafb 100644
--- a/gold/testsuite/x86_64_ie_to_le.s
+++ b/gold/testsuite/x86_64_ie_to_le.s
@@ -9,6 +9,9 @@  _start:
              movq    foo@gottpoff(%rip), %r20
              addq     %r30, foo@gottpoff(%rip), %r8
              addq     foo@gottpoff(%rip), %rax, %r20
+             {nf} addq            foo@gottpoff(%rip), %r16
+             {nf} addq            %r30, foo@gottpoff(%rip), %r8
+             {nf} addq            foo@gottpoff(%rip), %rax, %r20
              .size      _start, .-_start
              .section               .tdata,"awT",@progbits
              .align 4
diff --git a/gold/testsuite/x86_64_ie_to_le.sh b/gold/testsuite/x86_64_ie_to_le.sh
index 5308712ddbd..10e84686db8 100755
--- a/gold/testsuite/x86_64_ie_to_le.sh
+++ b/gold/testsuite/x86_64_ie_to_le.sh
@@ -29,3 +29,6 @@  grep -q "add[ \t]\+\$0x[a-f0-9]\+,%r16" x86_64_ie_to_le.stdout
grep -q "mov[ \t]\+\$0x[a-f0-9]\+,%r20" x86_64_ie_to_le.stdout
grep -q "add[ \t]\+\$0x[a-f0-9]\+,%r30,%r8" x86_64_ie_to_le.stdout
grep -q "add[ \t]\+\$0x[a-f0-9]\+,%rax,%r20" x86_64_ie_to_le.stdout
+grep -q "\{nf\} add[ \t]\+\$0x[a-f0-9]\+,%r16" x86_64_ie_to_le.stdout
+grep -q "\{nf\} add[ \t]\+\$0x[a-f0-9]\+,%r30,%r8" x86_64_ie_to_le.stdout
+grep -q "\{nf\} add[ \t]\+\$0x[a-f0-9]\+,%rax,%r20" x86_64_ie_to_le.stdout
diff --git a/ld/testsuite/ld-x86-64/tlsbindesc.dd b/ld/testsuite/ld-x86-64/tlsbindesc.dd
index be89f38199d..601dfc2fc6d 100644
--- a/ld/testsuite/ld-x86-64/tlsbindesc.dd
+++ b/ld/testsuite/ld-x86-64/tlsbindesc.dd
@@ -173,6 +173,15 @@  Disassembly of section .text:
#                                                         -> R_X86_64_TPOFF64 sG2
  +[0-9a-f]+:       ([0-9a-f]{2} ){3} *
  +[0-9a-f]+:       62 f4 fc 10 03 ([0-9a-f]{2} ){2}[   ]+add    0x[0-9a-f]+\(%rip\),%rax,%r16 +# [0-9a-f]+ <sG2>
+#                                                       -> R_X86_64_TPOFF64 sG2
+ +[0-9a-f]+:      ([0-9a-f]{2} ){3} *
+ +[0-9a-f]+:      62 e4 fc 0c 03 ([0-9a-f]{2} ){2}[ ]+\{nf\} add 0x[0-9a-f]+\(%rip\),%r16 +# [0-9a-f]+ <sG2>
+#                                                       -> R_X86_64_TPOFF64 sG2
+ +[0-9a-f]+:      ([0-9a-f]{2} ){3} *
+ +[0-9a-f]+:      62 f4 fc 14 01 ([0-9a-f]{2} ){2}[   ]+\{nf\} add %rax,0x[0-9a-f]+\(%rip\),%r16 +# [0-9a-f]+ <sG2>
+#                                                       -> R_X86_64_TPOFF64 sG2
+ +[0-9a-f]+:      ([0-9a-f]{2} ){3} *
+ +[0-9a-f]+:      62 f4 fc 14 03 ([0-9a-f]{2} ){2}[   ]+\{nf\} add 0x[0-9a-f]+\(%rip\),%rax,%r16 +# [0-9a-f]+ <sG2>
#                                                         -> R_X86_64_TPOFF64 sG2
  +[0-9a-f]+:       ([0-9a-f]{2} ){3} *
#  IE -> LE against global var defined in exec
@@ -183,6 +192,15 @@  Disassembly of section .text:
#                                                                                                      sg1
  +[0-9a-f]+:       ff ff ff *
  +[0-9a-f]+:       62 d4 f4 10 81 ([0-9a-f]{2} ){2}[ ]+add    \$0x[0-9a-f]+,%r8,%r17
+#                                                                                                    sg1
+ +[0-9a-f]+:      ff ff ff *
+ +[0-9a-f]+:      62 fc fc 0c 81 ([0-9a-f]{2} ){2}[   ]+\{nf\} add \$0x[0-9a-f]+,%r17
+#                                                                                                    sg1
+ +[0-9a-f]+:      ff ff ff *
+ +[0-9a-f]+:      62 d4 f4 14 81 ([0-9a-f]{2} ){2}[ ]+\{nf\} add \$0x[0-9a-f]+,%r8,%r17
+#                                                                                                    sg1
+ +[0-9a-f]+:      ff ff ff *
+ +[0-9a-f]+:      62 d4 f4 14 81 ([0-9a-f]{2} ){2}[ ]+\{nf\} add \$0x[0-9a-f]+,%r8,%r17
#                                                                                                      sg1
  +[0-9a-f]+:       ff ff ff *
#  IE -> LE against local var
@@ -193,6 +211,15 @@  Disassembly of section .text:
#                                                                                                      sl1
  +[0-9a-f]+:       ff ff ff *
  +[0-9a-f]+:       62 d4 fc 18 81 ([0-9a-f]{2} ){2}[ ]+add    \$0x[0-9a-f]+,%r8,%rax
+#                                                                                                    sl1
+ +[0-9a-f]+:      ff ff ff *
+ +[0-9a-f]+:      62 fc fc 0c 81 ([0-9a-f]{2} ){2}[   ]+\{nf\} add \$0x[0-9a-f]+,%r18
+#                                                                                                    sl1
+ +[0-9a-f]+:      ff ff ff *
+ +[0-9a-f]+:      62 d4 fc 1c 81 ([0-9a-f]{2} ){2}[ ]+\{nf\} add \$0x[0-9a-f]+,%r8,%rax
+#                                                                                                    sl1
+ +[0-9a-f]+:      ff ff ff *
+ +[0-9a-f]+:      62 d4 fc 1c 81 ([0-9a-f]{2} ){2}[ ]+\{nf\} add \$0x[0-9a-f]+,%r8,%rax
#                                                                                                      sl1
  +[0-9a-f]+:       ff ff ff *
#  IE -> LE against hidden var
@@ -203,6 +230,15 @@  Disassembly of section .text:
#                                                                                                      sh1
  +[0-9a-f]+:       ff ff ff *
  +[0-9a-f]+:       62 fc bc 18 81 ([0-9a-f]{2} ){2}[ ]+add    \$0x[0-9a-f]+,%r19,%r8
+#                                                                                                    sh1
+ +[0-9a-f]+:      ff ff ff *
+ +[0-9a-f]+:      62 fc fc 0c 81 ([0-9a-f]{2} ){2}[   ]+\{nf\} add \$0x[0-9a-f]+,%r19
+#                                                                                                    sh1
+ +[0-9a-f]+:      ff ff ff *
+ +[0-9a-f]+:      62 fc bc 1c 81 ([0-9a-f]{2} ){2}[ ]+\{nf\} add \$0x[0-9a-f]+,%r19,%r8
+#                                                                                                    sh1
+ +[0-9a-f]+:      ff ff ff *
+ +[0-9a-f]+:      62 fc bc 1c 81 ([0-9a-f]{2} ){2}[ ]+\{nf\} add \$0x[0-9a-f]+,%r19,%r8
#                                                                                                      sh1
  +[0-9a-f]+:       ff ff ff *
#  Direct access through %fs
diff --git a/ld/testsuite/ld-x86-64/tlsbindesc.rd b/ld/testsuite/ld-x86-64/tlsbindesc.rd
index 59325b04e19..2fc965aef20 100644
--- a/ld/testsuite/ld-x86-64/tlsbindesc.rd
+++ b/ld/testsuite/ld-x86-64/tlsbindesc.rd
@@ -15,12 +15,12 @@  Section Headers:
  +\[[ 0-9]+\] .dynsym +.*
  +\[[ 0-9]+\] .dynstr +.*
  +\[[ 0-9]+\] .rela.dyn +.*
- +\[[ 0-9]+\] .text +PROGBITS +0+401000 0+1000 0+2ad 00 +AX +0 +0 +4096
- +\[[ 0-9]+\] .tdata +PROGBITS +0+6012ad 0+12ad 0+60 00 WAT +0 +0 +1
- +\[[ 0-9]+\] .tbss +NOBITS +0+60130d 0+130d 0+40 00 WAT +0 +0 +1
- +\[[ 0-9]+\] .dynamic +DYNAMIC +0+601310 0+1310 0+100 10 +WA +4 +0 +8
- +\[[ 0-9]+\] .got +PROGBITS +0+601410 0+1410 0+20 08 +WA +0 +0 +8
- +\[[ 0-9]+\] .got.plt +PROGBITS +0+601430 0+1430 0+18 08 +WA +0 +0 +8
+ +\[[ 0-9]+\] .text +PROGBITS +0+401000 0+1000 0+325 00 +AX +0 +0 +4096
+ +\[[ 0-9]+\] .tdata +PROGBITS +0+601325 0+1325 0+60 00 WAT +0 +0 +1
+ +\[[ 0-9]+\] .tbss +NOBITS +0+601385 0+1385 0+40 00 WAT +0 +0 +1
+ +\[[ 0-9]+\] .dynamic +DYNAMIC +0+601388 0+1388 0+100 10 +WA +4 +0 +8
+ +\[[ 0-9]+\] .got +PROGBITS +0+601488 0+1488 0+20 08 +WA +0 +0 +8
+ +\[[ 0-9]+\] .got.plt +PROGBITS +0+6014a8 0+14a8 0+18 08 +WA +0 +0 +8
  +\[[ 0-9]+\] .symtab +.*
  +\[[ 0-9]+\] .strtab +.*
  +\[[ 0-9]+\] .shstrtab +.*
@@ -28,7 +28,7 @@  Key to Flags:
#...
 Elf file type is EXEC \(Executable file\)
-Entry point 0x4011b5
+Entry point 0x40122d
There are [0-9]+ program headers, starting at offset [0-9]+
 Program Headers:
@@ -36,10 +36,10 @@  Program Headers:
  +PHDR.*
  +INTERP.*
.*Requesting program interpreter.*
- +LOAD +0x0+ 0x0+400000 0x0+400000 0x0+12ad 0x0+12ad R E 0x200000
- +LOAD +0x0+12ad 0x0+6012ad 0x0+6012ad 0x0+19b 0x0+19b RW +0x200000
- +DYNAMIC +0x0+1310 0x0+601310 0x0+601310 0x0+100 0x0+100 RW +0x8
- +TLS +0x0+12ad 0x0+6012ad 0x0+6012ad 0x0+60 0x0+a0 R +0x1
+ +LOAD +0x0+ 0x0+400000 0x0+400000 0x0+1325 0x0+1325 R E 0x200000
+ +LOAD +0x0+1325 0x0+601325 0x0+601325 0x0+19b 0x0+19b RW +0x200000
+ +DYNAMIC +0x0+1388 0x0+601388 0x0+601388 0x0+100 0x0+100 RW +0x8
+ +TLS +0x0+1325 0x0+601325 0x0+601325 0x0+60 0x0+a0 R +0x1
  Section to Segment mapping:
  +Segment Sections...
@@ -52,10 +52,10 @@  Program Headers:
 Relocation section '.rela.dyn' at offset 0x[0-9a-f]+ contains 4 entries:
  +Offset +Info +Type +Symbol's Value +Symbol's Name \+ Addend
-0+601410 +0+100000012 R_X86_64_TPOFF64 +0+ sG5 \+ 0
-0+601418 +0+200000012 R_X86_64_TPOFF64 +0+ sG2 \+ 0
-0+601420 +0+300000012 R_X86_64_TPOFF64 +0+ sG6 \+ 0
-0+601428 +0+400000012 R_X86_64_TPOFF64 +0+ sG1 \+ 0
+0+601488 +0+100000012 R_X86_64_TPOFF64 +0+ sG5 \+ 0
+0+601490 +0+200000012 R_X86_64_TPOFF64 +0+ sG2 \+ 0
+0+601498 +0+300000012 R_X86_64_TPOFF64 +0+ sG6 \+ 0
+0+6014a0 +0+400000012 R_X86_64_TPOFF64 +0+ sG1 \+ 0
 Symbol table '\.dynsym' contains [0-9]+ entries:
  +Num: +Value +Size +Type +Bind +Vis +Ndx +Name
@@ -88,8 +88,8 @@  Symbol table '\.symtab' contains [0-9]+ entries:
  +[0-9]+: 0+9c +0 +TLS +LOCAL +DEFAULT +8 bl8
.* FILE +LOCAL +DEFAULT +ABS
  +[0-9]+: 0+a0 +0 +TLS +LOCAL +DEFAULT +7 _TLS_MODULE_BASE_
- +[0-9]+: 0+601310 +0 +OBJECT +LOCAL +DEFAULT +9 _DYNAMIC
- +[0-9]+: 0+601430 +0 +OBJECT +LOCAL +DEFAULT +11 _GLOBAL_OFFSET_TABLE_
+ +[0-9]+: 0+601388 +0 +OBJECT +LOCAL +DEFAULT +9 _DYNAMIC
+ +[0-9]+: 0+6014a8 +0 +OBJECT +LOCAL +DEFAULT +11 _GLOBAL_OFFSET_TABLE_
  +[0-9]+: 0+1c +0 +TLS +GLOBAL +DEFAULT +7 sg8
  +[0-9]+: 0+7c +0 +TLS +GLOBAL +DEFAULT +8 bg8
  +[0-9]+: 0+74 +0 +TLS +GLOBAL +DEFAULT +8 bg6
@@ -104,7 +104,7 @@  Symbol table '\.symtab' contains [0-9]+ entries:
  +[0-9]+: 0+58 +0 +TLS +GLOBAL +HIDDEN +7 sh7
  +[0-9]+: 0+5c +0 +TLS +GLOBAL +HIDDEN +7 sh8
  +[0-9]+: 0+ +0 +TLS +GLOBAL +DEFAULT +7 sg1
- +[0-9]+: 0+4011b5 +0 +FUNC +GLOBAL +DEFAULT +6 _start
+ +[0-9]+: 0+40122d +0 +FUNC +GLOBAL +DEFAULT +6 _start
  +[0-9]+: 0+4c +0 +TLS +GLOBAL +HIDDEN +7 sh4
  +[0-9]+: 0+78 +0 +TLS +GLOBAL +DEFAULT +8 bg7
  +[0-9]+: 0+50 +0 +TLS +GLOBAL +HIDDEN +7 sh5
diff --git a/ld/testsuite/ld-x86-64/tlsbindesc.s b/ld/testsuite/ld-x86-64/tlsbindesc.s
index 4747fc1bc30..39ba3bbaa9f 100644
--- a/ld/testsuite/ld-x86-64/tlsbindesc.s
+++ b/ld/testsuite/ld-x86-64/tlsbindesc.s
@@ -131,21 +131,33 @@  fn2:
              addq     sG2@gottpoff(%rip), %r16
              addq     %rax, sG2@gottpoff(%rip), %r16
              addq     sG2@gottpoff(%rip), %rax, %r16
+             {nf} addq            sG2@gottpoff(%rip), %r16
+             {nf} addq            %rax, sG2@gottpoff(%rip), %r16
+             {nf} addq            sG2@gottpoff(%rip), %rax, %r16
               /* IE -> LE against global var defined in exec */
              addq     sg1@gottpoff(%rip), %r17
              addq     %r8, sg1@gottpoff(%rip), %r17
              addq     sg1@gottpoff(%rip), %r8, %r17
+             {nf} addq            sg1@gottpoff(%rip), %r17
+             {nf} addq            %r8, sg1@gottpoff(%rip), %r17
+             {nf} addq            sg1@gottpoff(%rip), %r8, %r17
               /* IE -> LE against local var */
              addq     sl1@gottpoff(%rip), %r18
              addq     %r8, sl1@gottpoff(%rip), %rax
              addq     sl1@gottpoff(%rip), %r8, %rax
+             {nf} addq            sl1@gottpoff(%rip), %r18
+             {nf} addq            %r8, sl1@gottpoff(%rip), %rax
+             {nf} addq            sl1@gottpoff(%rip), %r8, %rax
               /* IE -> LE against hidden var */
              addq     sh1@gottpoff(%rip), %r19
              addq     %r19, sh1@gottpoff(%rip), %r8
              addq     sh1@gottpoff(%rip), %r19, %r8
+             {nf} addq            sh1@gottpoff(%rip), %r19
+             {nf} addq            %r19, sh1@gottpoff(%rip), %r8
+             {nf} addq            sh1@gottpoff(%rip), %r19, %r8
               /* Direct access through %fs  */
--
2.31.1