diff mbox series

x86: %riz, %rip, and %eip don't require REX

Message ID 9c268cdb-9321-40b4-a80b-b8d470660cfd@suse.com
State New
Headers
Series x86: %riz, %rip, and %eip don't require REX |

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Commit Message

Jan Beulich June 18, 2024, 6:37 a.m. UTC 
  While these can't be used as register operands, they can be used for
memory operand addressing. Such uses do not prevent conversion: The
RegRex64 checks in check_Rex_required() for base and index registers
were simply wrong. They specifically also aren't needed for byte
registers, as those won't pass i386_index_check() anyway.
---
I'm inclined to reduce RegRex64 use in the register table as well
(checking of the possibility of which actually made me spot the issue
addressed here): With a little bit of care in tc-i386.c it should
really only be %axl through %dil which need this attribute. All others
are sufficiently distinguishable by having RegRex / RegRex2.

Comments

Hu, Lin1 June 18, 2024, 7:46 a.m. UTC | #1 
> -----Original Message-----
> From: Jan Beulich <jbeulich@suse.com>
> Sent: Tuesday, June 18, 2024 2:37 PM
> To: Binutils <binutils@sourceware.org>
> Cc: H.J. Lu <hjl.tools@gmail.com>; Hu, Lin1 <lin1.hu@intel.com>
> Subject: [PATCH] x86: %riz, %rip, and %eip don't require REX
> 
> While these can't be used as register operands, they can be used for
> memory operand addressing. Such uses do not prevent conversion: The
> RegRex64 checks in check_Rex_required() for base and index registers were
> simply wrong. They specifically also aren't needed for byte registers, as those
> won't pass i386_index_check() anyway.
>

OK, I understand that using riz, rip, eip in an address does not require a rex prefix. The change looks good for me.

> ---
> I'm inclined to reduce RegRex64 use in the register table as well (checking of
> the possibility of which actually made me spot the issue addressed here):
> With a little bit of care in tc-i386.c it should really only be %axl through %dil
> which need this attribute. All others are sufficiently distinguishable by having
> RegRex / RegRex2.
>

We may need the RegRex64 modifier of r8b-r31b for a day.

BRs,
Lin
 
>
> --- a/gas/config/tc-i386.c
> +++ b/gas/config/tc-i386.c
> @@ -8668,8 +8668,8 @@ check_Rex_required (void)
>  	return true;
>      }
> 
> -  if ((i.index_reg && (i.index_reg->reg_flags & (RegRex | RegRex64)))
> -      || (i.base_reg && (i.base_reg->reg_flags & (RegRex | RegRex64))))
> +  if ((i.index_reg && (i.index_reg->reg_flags & RegRex))
> +      || (i.base_reg && (i.base_reg->reg_flags & RegRex)))
>      return true;
> 
>    /* Check pseudo prefix {rex} are valid.  */
> --- a/gas/testsuite/gas/i386/x86-64-apx-ndd-optimize.d
> +++ b/gas/testsuite/gas/i386/x86-64-apx-ndd-optimize.d
> @@ -127,10 +127,12 @@ Disassembly of section .text:
>  \s*[a-f0-9]+:\s*62 74 3d 18 66 c0    	adcx   %eax,%r8d,%r8d
>  \s*[a-f0-9]+:\s*62 d4 7d 18 66 c7    	adcx   %r15d,%eax,%eax
>  \s*[a-f0-9]+:\s*67 66 0f 38 f6 04 0a 	adcx   \(%edx,%ecx,1\),%eax
> +\s*[a-f0-9]+:\s*66 0f 38 f6 04 22    	adcx   \(%rdx,%riz,1\),%eax
>  \s*[a-f0-9]+:\s*f3 0f 38 f6 c3       	adox   %ebx,%eax
>  \s*[a-f0-9]+:\s*f3 0f 38 f6 c3       	adox   %ebx,%eax
>  \s*[a-f0-9]+:\s*62 f4 fe 18 66 c3    	adox   %rbx,%rax,%rax
>  \s*[a-f0-9]+:\s*62 74 3e 18 66 c0    	adox   %eax,%r8d,%r8d
>  \s*[a-f0-9]+:\s*62 d4 7e 18 66 c7    	adox   %r15d,%eax,%eax
>  \s*[a-f0-9]+:\s*67 f3 0f 38 f6 04 0a 	adox   \(%edx,%ecx,1\),%eax
> +\s*[a-f0-9]+:\s*f3 0f 38 f6 05 00 00 00 00 	adox   (0x)?0\(%rip\),%eax[
> 	]+# .*	sym.*
>  #pass
> --- a/gas/testsuite/gas/i386/x86-64-apx-ndd-optimize.s
> +++ b/gas/testsuite/gas/i386/x86-64-apx-ndd-optimize.s
> @@ -1,5 +1,6 @@
>  # Check 64bit APX NDD instructions with optimized encoding
> 
> +	.allow_index_reg
>  	.text
>  _start:
>  add    %r31,%r8,%r8
> @@ -120,9 +121,11 @@ adcx   %rbx,%rax,%rax
>  adcx   %eax,%r8d,%r8d
>  adcx   %r15d,%eax,%eax
>  adcx   (%edx,%ecx,1),%eax,%eax
> +adcx   (%rdx,%riz,1),%eax,%eax
>  adox   %ebx,%eax,%eax
>  adox   %eax,%ebx,%eax
>  adox   %rbx,%rax,%rax
>  adox   %eax,%r8d,%r8d
>  adox   %r15d,%eax,%eax
>  adox   (%edx,%ecx,1),%eax,%eax
> +adox   sym(%rip),%eax,%eax
Jan Beulich June 18, 2024, 8:08 a.m. UTC | #2 
On 18.06.2024 09:46, Hu, Lin1 wrote:
>> -----Original Message-----
>> From: Jan Beulich <jbeulich@suse.com>
>> Sent: Tuesday, June 18, 2024 2:37 PM
>>
>> I'm inclined to reduce RegRex64 use in the register table as well (checking of
>> the possibility of which actually made me spot the issue addressed here):
>> With a little bit of care in tc-i386.c it should really only be %axl through %dil
>> which need this attribute. All others are sufficiently distinguishable by having
>> RegRex / RegRex2.
> 
> We may need the RegRex64 modifier of r8b-r31b for a day.

I'm afraid I don't understand your reply. See in particular the last sentence of
my remark.

Jan
Hu, Lin1 June 18, 2024, 8:13 a.m. UTC | #3 
> -----Original Message-----
> From: Jan Beulich <jbeulich@suse.com>
> Sent: Tuesday, June 18, 2024 4:08 PM
> To: Hu, Lin1 <lin1.hu@intel.com>
> Cc: H.J. Lu <hjl.tools@gmail.com>; Binutils <binutils@sourceware.org>
> Subject: Re: [PATCH] x86: %riz, %rip, and %eip don't require REX
> 
> On 18.06.2024 09:46, Hu, Lin1 wrote:
> >> -----Original Message-----
> >> From: Jan Beulich <jbeulich@suse.com>
> >> Sent: Tuesday, June 18, 2024 2:37 PM
> >>
> >> I'm inclined to reduce RegRex64 use in the register table as well
> >> (checking of the possibility of which actually made me spot the issue
> addressed here):
> >> With a little bit of care in tc-i386.c it should really only be %axl
> >> through %dil which need this attribute. All others are sufficiently
> >> distinguishable by having RegRex / RegRex2.
> >
> > We may need the RegRex64 modifier of r8b-r31b for a day.
> 
> I'm afraid I don't understand your reply. See in particular the last sentence of my
> remark.
> 

At the beginning, I mean maybe one day, we need RegRex64 to determine if their width is 8bit. I forgot the previous Byte in Class.

BRs,
Lin
diff mbox series

Patch

--- a/gas/config/tc-i386.c
+++ b/gas/config/tc-i386.c
@@ -8668,8 +8668,8 @@  check_Rex_required (void)
 	return true;
     }
 
-  if ((i.index_reg && (i.index_reg->reg_flags & (RegRex | RegRex64)))
-      || (i.base_reg && (i.base_reg->reg_flags & (RegRex | RegRex64))))
+  if ((i.index_reg && (i.index_reg->reg_flags & RegRex))
+      || (i.base_reg && (i.base_reg->reg_flags & RegRex)))
     return true;
 
   /* Check pseudo prefix {rex} are valid.  */
--- a/gas/testsuite/gas/i386/x86-64-apx-ndd-optimize.d
+++ b/gas/testsuite/gas/i386/x86-64-apx-ndd-optimize.d
@@ -127,10 +127,12 @@  Disassembly of section .text:
 \s*[a-f0-9]+:\s*62 74 3d 18 66 c0    	adcx   %eax,%r8d,%r8d
 \s*[a-f0-9]+:\s*62 d4 7d 18 66 c7    	adcx   %r15d,%eax,%eax
 \s*[a-f0-9]+:\s*67 66 0f 38 f6 04 0a 	adcx   \(%edx,%ecx,1\),%eax
+\s*[a-f0-9]+:\s*66 0f 38 f6 04 22    	adcx   \(%rdx,%riz,1\),%eax
 \s*[a-f0-9]+:\s*f3 0f 38 f6 c3       	adox   %ebx,%eax
 \s*[a-f0-9]+:\s*f3 0f 38 f6 c3       	adox   %ebx,%eax
 \s*[a-f0-9]+:\s*62 f4 fe 18 66 c3    	adox   %rbx,%rax,%rax
 \s*[a-f0-9]+:\s*62 74 3e 18 66 c0    	adox   %eax,%r8d,%r8d
 \s*[a-f0-9]+:\s*62 d4 7e 18 66 c7    	adox   %r15d,%eax,%eax
 \s*[a-f0-9]+:\s*67 f3 0f 38 f6 04 0a 	adox   \(%edx,%ecx,1\),%eax
+\s*[a-f0-9]+:\s*f3 0f 38 f6 05 00 00 00 00 	adox   (0x)?0\(%rip\),%eax[ 	]+# .*	sym.*
 #pass
--- a/gas/testsuite/gas/i386/x86-64-apx-ndd-optimize.s
+++ b/gas/testsuite/gas/i386/x86-64-apx-ndd-optimize.s
@@ -1,5 +1,6 @@ 
 # Check 64bit APX NDD instructions with optimized encoding
 
+	.allow_index_reg
 	.text
 _start:
 add    %r31,%r8,%r8
@@ -120,9 +121,11 @@  adcx   %rbx,%rax,%rax
 adcx   %eax,%r8d,%r8d
 adcx   %r15d,%eax,%eax
 adcx   (%edx,%ecx,1),%eax,%eax
+adcx   (%rdx,%riz,1),%eax,%eax
 adox   %ebx,%eax,%eax
 adox   %eax,%ebx,%eax
 adox   %rbx,%rax,%rax
 adox   %eax,%r8d,%r8d
 adox   %r15d,%eax,%eax
 adox   (%edx,%ecx,1),%eax,%eax
+adox   sym(%rip),%eax,%eax