[v2,5/6] bfd/ELF: fold BFD_RELOC_<arch>_PCREL*

  There's no need to have a separate reloc per arch; just like for other
more or less generic ones a single one will (mostly) do, as long as the
resulting reloc's properties fit such a generic use (in the assembler it
could, after all, also result from ordinary expressions or uses with the
.reloc directive). Arm64, C-Sky, and KVX - sadly - are once again
exceptions.

For cris it's a PLT reloc which is being replaced.

For msp430 also drop BFD_RELOC_MSP430_16_BYTE, which has already been
merely an alias of BFD_RELOC_16 (resolving to R_MSP430_16_BYTE).
---
It's not clear to me why LoongArch's "fast" lookup stopped at
BFD_RELOC_LARCH_RELAX (which is also unlike the range special cased in
gas); subsequent relocations also are contiguous. IOW instead of dropping
BFD_RELOC_LARCH_{32,64}_PCREL (and moving the "terminator" slightly back),
the target may want (need) excluding here as well.
  

> Date: Fri, 27 Mar 2026 10:58:03 +0100
> From: Jan Beulich <jbeulich@suse.com>

> For cris it's a PLT reloc which is being replaced.

The CRIS bits in this patch, the whole of which is identical
to the previous version (but I suppose there are differences
elsewhere in the patch-set), are still ok.

brgds, H-P
  

在 2026/3/27 17:58, Jan Beulich 写道:
> There's no need to have a separate reloc per arch; just like for other
> more or less generic ones a single one will (mostly) do, as long as the
> resulting reloc's properties fit such a generic use (in the assembler it
> could, after all, also result from ordinary expressions or uses with the
> .reloc directive). Arm64, C-Sky, and KVX - sadly - are once again
> exceptions.
>
> For cris it's a PLT reloc which is being replaced.
>
> For msp430 also drop BFD_RELOC_MSP430_16_BYTE, which has already been
> merely an alias of BFD_RELOC_16 (resolving to R_MSP430_16_BYTE).
> ---
> It's not clear to me why LoongArch's "fast" lookup stopped at
> BFD_RELOC_LARCH_RELAX (which is also unlike the range special cased in
> gas); subsequent relocations also are contiguous. IOW instead of dropping
> BFD_RELOC_LARCH_{32,64}_PCREL (and moving the "terminator" slightly back),
> the target may want (need) excluding here as well.
>
> --- a/bfd/bfd-in2.h
> +++ b/bfd/bfd-in2.h
> @@ -3879,8 +3879,7 @@ enum bfd_reloc_code_real
>     BFD_RELOC_NS32K_DISP_16_PCREL,
>     BFD_RELOC_NS32K_DISP_32_PCREL,
>   
> -  /* PDP11 relocations.  */
> -  BFD_RELOC_PDP11_DISP_8_PCREL,
> +  /* PDP11 relocation(s).  */
>     BFD_RELOC_PDP11_DISP_6_PCREL,
>   
>     /* Picojava relocs.  Not all of these appear in object files.  */
> @@ -3888,8 +3887,6 @@ enum bfd_reloc_code_real
>     BFD_RELOC_PJ_CODE_LO16,
>     BFD_RELOC_PJ_CODE_DIR16,
>     BFD_RELOC_PJ_CODE_DIR32,
> -  BFD_RELOC_PJ_CODE_REL16,
> -  BFD_RELOC_PJ_CODE_REL32,
>   
>     /* Power(rs6000) and PowerPC relocations.  */
>     BFD_RELOC_PPC_B26,
> @@ -5292,7 +5289,6 @@ enum bfd_reloc_code_real
>     BFD_RELOC_RISCV_SET8,
>     BFD_RELOC_RISCV_SET16,
>     BFD_RELOC_RISCV_SET32,
> -  BFD_RELOC_RISCV_32_PCREL,
>     BFD_RELOC_RISCV_SET_ULEB128,
>     BFD_RELOC_RISCV_SUB_ULEB128,
>   
> @@ -5832,10 +5828,6 @@ enum bfd_reloc_code_real
>     /* 32-bit offset to symbol with PLT entry, relative to GOT.  */
>     BFD_RELOC_CRIS_32_PLT_GOTREL,
>   
> -  /* 32-bit offset to symbol with PLT entry, relative to this
> -     relocation.  */
> -  BFD_RELOC_CRIS_32_PLT_PCREL,
> -
>     /* Relocs used in TLS code for CRIS.  */
>     BFD_RELOC_CRIS_32_GOT_GD,
>     BFD_RELOC_CRIS_16_GOT_GD,
> @@ -5927,8 +5919,6 @@ enum bfd_reloc_code_real
>     BFD_RELOC_MSP430_10_PCREL,
>     BFD_RELOC_MSP430_16_PCREL,
>     BFD_RELOC_MSP430_16,
> -  BFD_RELOC_MSP430_16_PCREL_BYTE,
> -  BFD_RELOC_MSP430_16_BYTE,
>     BFD_RELOC_MSP430_2X_PCREL,
>     BFD_RELOC_MSP430_RL_PCREL,
>     BFD_RELOC_MSP430_ABS8,
> @@ -7207,7 +7197,6 @@ enum bfd_reloc_code_real
>     BFD_RELOC_LARCH_TLS_LD_HI20,
>     BFD_RELOC_LARCH_TLS_GD_PC_HI20,
>     BFD_RELOC_LARCH_TLS_GD_HI20,
> -  BFD_RELOC_LARCH_32_PCREL,
>     BFD_RELOC_LARCH_RELAX,
>     BFD_RELOC_LARCH_DELETE,
>     BFD_RELOC_LARCH_ALIGN,
> @@ -7217,7 +7206,6 @@ enum bfd_reloc_code_real
>     BFD_RELOC_LARCH_SUB6,
>     BFD_RELOC_LARCH_ADD_ULEB128,
>     BFD_RELOC_LARCH_SUB_ULEB128,
> -  BFD_RELOC_LARCH_64_PCREL,
>     BFD_RELOC_LARCH_CALL36,
>     BFD_RELOC_LARCH_TLS_DESC_PC_HI20,
>     BFD_RELOC_LARCH_TLS_DESC_PC_LO12,
> --- a/bfd/elf32-cris.c
> +++ b/bfd/elf32-cris.c
> @@ -408,7 +408,7 @@ static const struct cris_reloc_map cris_
>     { BFD_RELOC_CRIS_32_GOTPLT,	R_CRIS_32_GOTPLT },
>     { BFD_RELOC_CRIS_32_GOTREL,	R_CRIS_32_GOTREL },
>     { BFD_RELOC_CRIS_32_PLT_GOTREL, R_CRIS_32_PLT_GOTREL },
> -  { BFD_RELOC_CRIS_32_PLT_PCREL, R_CRIS_32_PLT_PCREL },
> +  { BFD_RELOC_32_PLT_PCREL,	R_CRIS_32_PLT_PCREL },
>     { BFD_RELOC_CRIS_32_GOT_GD,	R_CRIS_32_GOT_GD },
>     { BFD_RELOC_CRIS_16_GOT_GD,	R_CRIS_16_GOT_GD },
>     { BFD_RELOC_CRIS_32_GD,	R_CRIS_32_GD },
> --- a/bfd/elf32-msp430.c
> +++ b/bfd/elf32-msp430.c
> @@ -622,8 +622,7 @@ static const struct msp430_reloc_map msp
>     {BFD_RELOC_16,		   R_MSP430_16_BYTE},
>     {BFD_RELOC_MSP430_16_PCREL,	   R_MSP430_16_PCREL},
>     {BFD_RELOC_MSP430_16,		   R_MSP430_16},
> -  {BFD_RELOC_MSP430_16_PCREL_BYTE, R_MSP430_16_PCREL_BYTE},
> -  {BFD_RELOC_MSP430_16_BYTE,	   R_MSP430_16_BYTE},
> +  {BFD_RELOC_16_PCREL,  	   R_MSP430_16_PCREL_BYTE},
>     {BFD_RELOC_MSP430_2X_PCREL,	   R_MSP430_2X_PCREL},
>     {BFD_RELOC_MSP430_RL_PCREL,	   R_MSP430_RL_PCREL},
>     {BFD_RELOC_8,			   R_MSP430_8},
> --- a/bfd/elf32-pj.c
> +++ b/bfd/elf32-pj.c
> @@ -271,8 +271,8 @@ static const struct elf_reloc_map pj_rel
>       { BFD_RELOC_PJ_CODE_DIR32,	R_PJ_CODE_DIR32	   },
>       { BFD_RELOC_PJ_CODE_LO16,	R_PJ_CODE_LO16	   },
>       { BFD_RELOC_PJ_CODE_HI16,	R_PJ_CODE_HI16	   },
> -    { BFD_RELOC_PJ_CODE_REL32,	R_PJ_CODE_REL32	   },
> -    { BFD_RELOC_PJ_CODE_REL16,	R_PJ_CODE_REL16	   },
> +    { BFD_RELOC_32_PCREL,	R_PJ_CODE_REL32	   },
> +    { BFD_RELOC_16_PCREL,	R_PJ_CODE_REL16	   },
>       { BFD_RELOC_VTABLE_INHERIT, R_PJ_GNU_VTINHERIT },
>       { BFD_RELOC_VTABLE_ENTRY,   R_PJ_GNU_VTENTRY   },
>   };
> --- a/bfd/elfxx-loongarch.c
> +++ b/bfd/elfxx-loongarch.c
> @@ -1389,7 +1389,7 @@ static loongarch_reloc_howto_type loonga
>   	 0,					/* src_mask */
>   	 0xffffffff,				/* dst_mask */
>   	 true,					/* pcrel_offset */
> -	 BFD_RELOC_LARCH_32_PCREL,		/* bfd_reloc_code_real_type */
> +	 BFD_RELOC_32_PCREL,			/* bfd_reloc_code_real_type */
>   	 reloc_sign_bits,			/* adjust_reloc_bits */
>   	 NULL),					/* larch_reloc_type_name */
>   
> @@ -1581,7 +1581,7 @@ static loongarch_reloc_howto_type loonga
>   	 0,					/* src_mask */
>   	 0xffffffffffffffff,			/* dst_mask */
>   	 true,					/* pcrel_offset */
> -	 BFD_RELOC_LARCH_64_PCREL,		/* bfd_reloc_code_real_type */
> +	 BFD_RELOC_64_PCREL,			/* bfd_reloc_code_real_type */
>   	 NULL,					/* adjust_reloc_bits */
>   	 NULL),					/* larch_reloc_type_name */
>   
> @@ -2144,10 +2144,10 @@ loongarch_reloc_type_lookup (bfd *abfd A
>     BFD_ASSERT (ARRAY_SIZE (loongarch_howto_table) == R_LARCH_count);
>   
>     /* Fast search for new reloc types.  */
> -  if (BFD_RELOC_LARCH_B16 <= code && code < BFD_RELOC_LARCH_RELAX)
> +  if (BFD_RELOC_LARCH_B16 <= code && code <= BFD_RELOC_LARCH_TLS_GD_HI20)
>       {
> -      BFD_ASSERT (BFD_RELOC_LARCH_RELAX - BFD_RELOC_LARCH_B16
> -		  == R_LARCH_RELAX - R_LARCH_B16);
> +      BFD_ASSERT (BFD_RELOC_LARCH_TLS_GD_HI20 - BFD_RELOC_LARCH_B16
> +		  == R_LARCH_TLS_GD_HI20 - R_LARCH_B16);


This assert need to be deleted. Without BFD_RELOC_LARCH_{64,32}_PCRE,
the assert may fail for some relocations.

Thanks,
Meng

>         loongarch_reloc_howto_type *ht;
>         ht = &loongarch_howto_table[code - BFD_RELOC_LARCH_B16 + R_LARCH_B16];
>         BFD_ASSERT (ht->bfd_type == code);
> --- a/bfd/elfxx-riscv.c
> +++ b/bfd/elfxx-riscv.c
> @@ -1020,7 +1020,7 @@ static const struct elf_reloc_map riscv_
>     { BFD_RELOC_RISCV_SET8, R_RISCV_SET8 },
>     { BFD_RELOC_RISCV_SET16, R_RISCV_SET16 },
>     { BFD_RELOC_RISCV_SET32, R_RISCV_SET32 },
> -  { BFD_RELOC_RISCV_32_PCREL, R_RISCV_32_PCREL },
> +  { BFD_RELOC_32_PCREL, R_RISCV_32_PCREL },
>     { BFD_RELOC_RISCV_SET_ULEB128, R_RISCV_SET_ULEB128 },
>     { BFD_RELOC_RISCV_SUB_ULEB128, R_RISCV_SUB_ULEB128 },
>   };
> --- a/bfd/libbfd.h
> +++ b/bfd/libbfd.h
> @@ -1467,14 +1467,11 @@ static const char *const bfd_reloc_code_
>     "BFD_RELOC_NS32K_DISP_8_PCREL",
>     "BFD_RELOC_NS32K_DISP_16_PCREL",
>     "BFD_RELOC_NS32K_DISP_32_PCREL",
> -  "BFD_RELOC_PDP11_DISP_8_PCREL",
>     "BFD_RELOC_PDP11_DISP_6_PCREL",
>     "BFD_RELOC_PJ_CODE_HI16",
>     "BFD_RELOC_PJ_CODE_LO16",
>     "BFD_RELOC_PJ_CODE_DIR16",
>     "BFD_RELOC_PJ_CODE_DIR32",
> -  "BFD_RELOC_PJ_CODE_REL16",
> -  "BFD_RELOC_PJ_CODE_REL32",
>     "BFD_RELOC_PPC_B26",
>     "BFD_RELOC_PPC_BA26",
>     "BFD_RELOC_PPC_TOC16",
> @@ -2311,7 +2308,6 @@ static const char *const bfd_reloc_code_
>     "BFD_RELOC_RISCV_SET8",
>     "BFD_RELOC_RISCV_SET16",
>     "BFD_RELOC_RISCV_SET32",
> -  "BFD_RELOC_RISCV_32_PCREL",
>     "BFD_RELOC_RISCV_SET_ULEB128",
>     "BFD_RELOC_RISCV_SUB_ULEB128",
>     "BFD_RELOC_RL78_NEG8",
> @@ -2622,7 +2618,6 @@ static const char *const bfd_reloc_code_
>     "BFD_RELOC_CRIS_16_GOTPLT",
>     "BFD_RELOC_CRIS_32_GOTREL",
>     "BFD_RELOC_CRIS_32_PLT_GOTREL",
> -  "BFD_RELOC_CRIS_32_PLT_PCREL",
>     "BFD_RELOC_CRIS_32_GOT_GD",
>     "BFD_RELOC_CRIS_16_GOT_GD",
>     "BFD_RELOC_CRIS_32_GD",
> @@ -2691,8 +2686,6 @@ static const char *const bfd_reloc_code_
>     "BFD_RELOC_MSP430_10_PCREL",
>     "BFD_RELOC_MSP430_16_PCREL",
>     "BFD_RELOC_MSP430_16",
> -  "BFD_RELOC_MSP430_16_PCREL_BYTE",
> -  "BFD_RELOC_MSP430_16_BYTE",
>     "BFD_RELOC_MSP430_2X_PCREL",
>     "BFD_RELOC_MSP430_RL_PCREL",
>     "BFD_RELOC_MSP430_ABS8",
> @@ -3398,7 +3391,6 @@ static const char *const bfd_reloc_code_
>     "BFD_RELOC_LARCH_TLS_LD_HI20",
>     "BFD_RELOC_LARCH_TLS_GD_PC_HI20",
>     "BFD_RELOC_LARCH_TLS_GD_HI20",
> -  "BFD_RELOC_LARCH_32_PCREL",
>     "BFD_RELOC_LARCH_RELAX",
>     "BFD_RELOC_LARCH_DELETE",
>     "BFD_RELOC_LARCH_ALIGN",
> @@ -3408,7 +3400,6 @@ static const char *const bfd_reloc_code_
>     "BFD_RELOC_LARCH_SUB6",
>     "BFD_RELOC_LARCH_ADD_ULEB128",
>     "BFD_RELOC_LARCH_SUB_ULEB128",
> -  "BFD_RELOC_LARCH_64_PCREL",
>     "BFD_RELOC_LARCH_CALL36",
>     "BFD_RELOC_LARCH_TLS_DESC_PC_HI20",
>     "BFD_RELOC_LARCH_TLS_DESC_PC_LO12", --- a/bfd/reloc.c +++ b/bfd/reloc.c @@ -2443,11 +2443,9 @@ ENUMDOC 
> ns32k relocations. ENUM - BFD_RELOC_PDP11_DISP_8_PCREL -ENUMX 
> BFD_RELOC_PDP11_DISP_6_PCREL ENUMDOC - PDP11 relocations. + PDP11 
> relocation(s). ENUM BFD_RELOC_PJ_CODE_HI16 @@ -2457,10 +2455,6 @@ 
> ENUMX BFD_RELOC_PJ_CODE_DIR16 ENUMX BFD_RELOC_PJ_CODE_DIR32 -ENUMX - 
> BFD_RELOC_PJ_CODE_REL16 -ENUMX - BFD_RELOC_PJ_CODE_REL32 ENUMDOC 
> Picojava relocs. Not all of these appear in object files. @@ -4748,8 
> +4742,6 @@ ENUMX ENUMX BFD_RELOC_RISCV_SET32 ENUMX - 
> BFD_RELOC_RISCV_32_PCREL -ENUMX BFD_RELOC_RISCV_SET_ULEB128 ENUMX 
> BFD_RELOC_RISCV_SUB_ULEB128 @@ -5612,11 +5604,6 @@ ENUM 
> BFD_RELOC_CRIS_32_PLT_GOTREL ENUMDOC 32-bit offset to symbol with PLT 
> entry, relative to GOT. -ENUM - BFD_RELOC_CRIS_32_PLT_PCREL -ENUMDOC - 
> 32-bit offset to symbol with PLT entry, relative to this - relocation. 
> ENUM BFD_RELOC_CRIS_32_GOT_GD @@ -5783,10 +5770,6 @@ ENUMX ENUMX 
> BFD_RELOC_MSP430_16 ENUMX - BFD_RELOC_MSP430_16_PCREL_BYTE -ENUMX - 
> BFD_RELOC_MSP430_16_BYTE -ENUMX BFD_RELOC_MSP430_2X_PCREL ENUMX 
> BFD_RELOC_MSP430_RL_PCREL @@ -7794,9 +7777,6 @@ ENUMX 
> BFD_RELOC_LARCH_TLS_GD_HI20 ENUMX - BFD_RELOC_LARCH_32_PCREL - -ENUMX 
> BFD_RELOC_LARCH_RELAX ENUMX @@ -7822,9 +7802,6 @@ ENUMX 
> BFD_RELOC_LARCH_SUB_ULEB128 ENUMX - BFD_RELOC_LARCH_64_PCREL - -ENUMX 
> BFD_RELOC_LARCH_CALL36 ENUMX --- a/gas/config/tc-cris.c +++ 
> b/gas/config/tc-cris.c @@ -3502,7 +3502,7 @@ cris_get_reloc_suffix 
> (char **cPP, bfd_r PICMAP ("GOTPLT16", BFD_RELOC_CRIS_16_GOTPLT),
>         PICMAP ("GOTPLT", BFD_RELOC_CRIS_32_GOTPLT),
>         PICMAP ("PLTG", BFD_RELOC_CRIS_32_PLT_GOTREL),
> -      PICMAP ("PLT", BFD_RELOC_CRIS_32_PLT_PCREL),
> +      PICMAP ("PLT", BFD_RELOC_32_PLT_PCREL),
>         PICMAP ("GOTOFF", BFD_RELOC_CRIS_32_GOTREL),
>         PICMAP ("GOT16", BFD_RELOC_CRIS_16_GOT),
>         PICMAP ("GOT", BFD_RELOC_CRIS_32_GOT), @@ -3672,7 +3672,7 @@ cris_number_to_imm 
> (char *bufp, long val case BFD_RELOC_CRIS_16_GOTPLT: case 
> BFD_RELOC_CRIS_32_GOTPLT: case BFD_RELOC_CRIS_32_PLT_GOTREL: - case 
> BFD_RELOC_CRIS_32_PLT_PCREL: + case BFD_RELOC_32_PLT_PCREL: /* We 
> don't want to put in any kind of non-zero bits in the data being 
> relocated for these. */ md_number_to_chars (bufp, 0, n); @@ -3924,7 
> +3924,7 @@ tc_gen_reloc (asection *section ATTRIBUT case 
> BFD_RELOC_CRIS_32_GOTPLT: case BFD_RELOC_CRIS_32_GOTREL: case 
> BFD_RELOC_CRIS_32_PLT_GOTREL: - case BFD_RELOC_CRIS_32_PLT_PCREL: + 
> case BFD_RELOC_32_PLT_PCREL: case BFD_RELOC_32: case 
> BFD_RELOC_32_PCREL: case BFD_RELOC_16: @@ -4101,7 +4101,7 @@ 
> md_cris_force_relocation (struct fix *fi case 
> BFD_RELOC_CRIS_32_GOTPLT: case BFD_RELOC_CRIS_32_GOTREL: case 
> BFD_RELOC_CRIS_32_PLT_GOTREL: - case BFD_RELOC_CRIS_32_PLT_PCREL: + 
> case BFD_RELOC_32_PLT_PCREL: return 1; default: ; --- 
> a/gas/config/tc-cris.h +++ b/gas/config/tc-cris.h @@ -79,7 +79,7 @@ 
> extern int md_cris_force_relocation (str || (RTYPE) == 
> BFD_RELOC_CRIS_32_GOTPLT \ || (RTYPE) == BFD_RELOC_CRIS_32_GOTREL \ || 
> (RTYPE) == BFD_RELOC_CRIS_32_PLT_GOTREL \ - || (RTYPE) == 
> BFD_RELOC_CRIS_32_PLT_PCREL) + || (RTYPE) == BFD_RELOC_32_PLT_PCREL) 
> /* Make sure we don't resolve fixups for which we want to emit dynamic 
> relocations. */ --- a/gas/config/tc-loongarch.c +++ 
> b/gas/config/tc-loongarch.c @@ -865,8 +865,10 @@ 
> loongarch_args_parser_can_match_arg_help _("not support reloc bit-field\nfmt: %c%c %s\nargs: %s"),
>   		      esc_ch1, esc_ch2, bit_field, arg);
>   
> -	  if (ip->reloc_info[0].type >= BFD_RELOC_LARCH_B16
> -	      && ip->reloc_info[0].type <= BFD_RELOC_LARCH_TLS_DESC_PCADD_LO12)
> +	  if ((ip->reloc_info[0].type >= BFD_RELOC_LARCH_B16
> +	       && ip->reloc_info[0].type <= BFD_RELOC_LARCH_TLS_DESC_PCADD_LO12)
> +	      || ip->reloc_info[0].type == BFD_RELOC_32_PCREL
> +	      || ip->reloc_info[0].type == BFD_RELOC_64_PCREL)
>   	    {
>   	      /* As we compact stack-relocs, it is no need for pop operation.
>   		 But break out until here in order to check the imm field.
> @@ -1714,10 +1716,10 @@ md_apply_fix (fixS *fixP, valueT *valP,
>   	  switch (fixP->fx_r_type)
>   	    {
>   	    case BFD_RELOC_64:
> -	      fixP->fx_r_type = BFD_RELOC_LARCH_64_PCREL;
> +	      fixP->fx_r_type = BFD_RELOC_64_PCREL;
>   	      break;
>   	    case BFD_RELOC_32:
> -	      fixP->fx_r_type = BFD_RELOC_LARCH_32_PCREL;
> +	      fixP->fx_r_type = BFD_RELOC_32_PCREL;
>   	      break;
>   	    default:
>   	      break;
> @@ -1736,7 +1738,7 @@ md_apply_fix (fixS *fixP, valueT *valP,
>   	  && S_GET_VALUE (fixP->fx_subsy)
>   	  == fixP->fx_frag->fr_address + fixP->fx_where)
>   	{
> -	  fixP->fx_r_type = BFD_RELOC_LARCH_32_PCREL;
> +	  fixP->fx_r_type = BFD_RELOC_32_PCREL;
>   	  fixP->fx_subsy = NULL;
>   	  break;
>   	}
> --- a/gas/config/tc-msp430.c
> +++ b/gas/config/tc-msp430.c
> @@ -291,7 +291,7 @@ target_is_430xv2 (void)
>          : ((OP).vshift == 1				\
>   	  ? BFD_RELOC_MSP430_ABS_HI16 : BFD_RELOC_16))	\
>      : ((imm_op || byte_op)				\
> -      ? BFD_RELOC_MSP430_16_BYTE : BFD_RELOC_MSP430_16))
> +      ? BFD_RELOC_16 : BFD_RELOC_MSP430_16))
>   
>   /* Generate a 16-bit pc-relative relocation.
>      For the 430X we generate a relocation without linker range checking.
> @@ -302,7 +302,7 @@ target_is_430xv2 (void)
>     (target_is_430x ()					     \
>      ? BFD_RELOC_MSP430X_PCR16				     \
>      : (imm_op || byte_op)				     \
> -   ? BFD_RELOC_MSP430_16_PCREL_BYTE : BFD_RELOC_MSP430_16_PCREL)
> +   ? BFD_RELOC_16_PCREL : BFD_RELOC_MSP430_16_PCREL)
>   
>   /* Profiling capability:
>      It is a performance hit to use gcc's profiling approach for this tiny target.
> @@ -4523,7 +4523,7 @@ md_apply_fix (fixS * fixp, valueT * valu
>   			  _("odd address operand: %ld"), value);
>   	  /* Fall through.  */
>   
> -	case BFD_RELOC_MSP430_16_PCREL_BYTE:
> +	case BFD_RELOC_16_PCREL:
>   	  /* Nothing to be corrected here.  */
>   	  if (value < -32768 || value > 65536)
>   	    as_bad_where (fixp->fx_file, fixp->fx_line,
> @@ -4533,7 +4533,6 @@ md_apply_fix (fixS * fixp, valueT * valu
>   	case BFD_RELOC_MSP430X_ABS16:
>   	case BFD_RELOC_MSP430_16:
>   	case BFD_RELOC_16:
> -	case BFD_RELOC_MSP430_16_BYTE:
>   	  value &= 0xffff;	/* Get rid of extended sign.  */
>   	  bfd_putl16 (value, where);
>   	  break;
> --- a/gas/config/tc-pdp11.c
> +++ b/gas/config/tc-pdp11.c
> @@ -268,7 +268,7 @@ md_apply_fix (fixS *fixP,
>         mask = 0xffffffff;
>         shift = 0;
>         break;
> -    case BFD_RELOC_PDP11_DISP_8_PCREL:
> +    case BFD_RELOC_8_PCREL:
>         mask = 0x00ff;
>         shift = 1;
>         break;
> @@ -790,7 +790,7 @@ md_assemble (char *instruction_string)
>   	new_pointer = parse_expression (str, &op1);
>   	op1.code = 0;
>   	op1.reloc.pc_rel = 1;
> -	op1.reloc.type = BFD_RELOC_PDP11_DISP_8_PCREL;
> +	op1.reloc.type = BFD_RELOC_8_PCREL;
>   	if (op1.reloc.exp.X_op != O_symbol)
>   	  {
>   	    op1.error = _("Symbol expected");
> --- a/gas/config/tc-pj.c
> +++ b/gas/config/tc-pj.c
> @@ -127,12 +127,12 @@ c_to_r (int x)
>       case O_8:
>         return BFD_RELOC_8;
>       case O_R16:
> -      return BFD_RELOC_PJ_CODE_REL16;
> +      return BFD_RELOC_16_PCREL;
>       case O_U16:
>       case O_16:
>         return BFD_RELOC_PJ_CODE_DIR16;
>       case O_R32:
> -      return BFD_RELOC_PJ_CODE_REL32;
> +      return BFD_RELOC_32_PCREL;
>       case O_32:
>         return BFD_RELOC_PJ_CODE_DIR32;
>       }
> @@ -375,7 +375,7 @@ md_apply_fix (fixS *fixP, valueT * valP,
>         fixP->fx_done = 0;
>         return;
>   
> -    case BFD_RELOC_PJ_CODE_REL16:
> +    case BFD_RELOC_16_PCREL:
>         if (val < -0x8000 || val >= 0x7fff)
>   	as_bad_where (fixP->fx_file, fixP->fx_line, _("pcrel too far"));
>         buf[0] |= (val >> 8) & 0xff;
> @@ -404,7 +404,7 @@ md_apply_fix (fixS *fixP, valueT * valP,
>         break;
>   
>       case BFD_RELOC_PJ_CODE_DIR32:
> -    case BFD_RELOC_PJ_CODE_REL32:
> +    case BFD_RELOC_32_PCREL:
>         *buf++ = val >> 24;
>         *buf++ = val >> 16;
>         *buf++ = val >> 8;
> --- a/gas/config/tc-riscv.c
> +++ b/gas/config/tc-riscv.c
> @@ -4749,7 +4749,7 @@ md_apply_fix (fixS *fixP, valueT *valP,
>   	  && S_GET_VALUE (fixP->fx_subsy)
>   	     == fixP->fx_frag->fr_address + fixP->fx_where)
>   	{
> -	  fixP->fx_r_type = BFD_RELOC_RISCV_32_PCREL;
> +	  fixP->fx_r_type = BFD_RELOC_32_PCREL;
>   	  fixP->fx_subsy = NULL;
>   	  break;
>   	}
  

On 28.03.2026 04:41, mengqinggang wrote:
> 
> 在 2026/3/27 17:58, Jan Beulich 写道:
>> There's no need to have a separate reloc per arch; just like for other
>> more or less generic ones a single one will (mostly) do, as long as the
>> resulting reloc's properties fit such a generic use (in the assembler it
>> could, after all, also result from ordinary expressions or uses with the
>> .reloc directive). Arm64, C-Sky, and KVX - sadly - are once again
>> exceptions.
>>
>> For cris it's a PLT reloc which is being replaced.
>>
>> For msp430 also drop BFD_RELOC_MSP430_16_BYTE, which has already been
>> merely an alias of BFD_RELOC_16 (resolving to R_MSP430_16_BYTE).
>> ---
>> It's not clear to me why LoongArch's "fast" lookup stopped at
>> BFD_RELOC_LARCH_RELAX (which is also unlike the range special cased in
>> gas); subsequent relocations also are contiguous. IOW instead of dropping
>> BFD_RELOC_LARCH_{32,64}_PCREL (and moving the "terminator" slightly back),
>> the target may want (need) excluding here as well.

Hmm, I'm a little confused. On v1 you said, in reply to this remark, that
the change is good for LoongArch. Now suddenly ...

>> --- a/bfd/elfxx-loongarch.c
>> +++ b/bfd/elfxx-loongarch.c
>> @@ -1389,7 +1389,7 @@ static loongarch_reloc_howto_type loonga
>>   	 0,					/* src_mask */
>>   	 0xffffffff,				/* dst_mask */
>>   	 true,					/* pcrel_offset */
>> -	 BFD_RELOC_LARCH_32_PCREL,		/* bfd_reloc_code_real_type */
>> +	 BFD_RELOC_32_PCREL,			/* bfd_reloc_code_real_type */
>>   	 reloc_sign_bits,			/* adjust_reloc_bits */
>>   	 NULL),					/* larch_reloc_type_name */
>>   
>> @@ -1581,7 +1581,7 @@ static loongarch_reloc_howto_type loonga
>>   	 0,					/* src_mask */
>>   	 0xffffffffffffffff,			/* dst_mask */
>>   	 true,					/* pcrel_offset */
>> -	 BFD_RELOC_LARCH_64_PCREL,		/* bfd_reloc_code_real_type */
>> +	 BFD_RELOC_64_PCREL,			/* bfd_reloc_code_real_type */
>>   	 NULL,					/* adjust_reloc_bits */
>>   	 NULL),					/* larch_reloc_type_name */
>>   
>> @@ -2144,10 +2144,10 @@ loongarch_reloc_type_lookup (bfd *abfd A
>>     BFD_ASSERT (ARRAY_SIZE (loongarch_howto_table) == R_LARCH_count);
>>   
>>     /* Fast search for new reloc types.  */
>> -  if (BFD_RELOC_LARCH_B16 <= code && code < BFD_RELOC_LARCH_RELAX)
>> +  if (BFD_RELOC_LARCH_B16 <= code && code <= BFD_RELOC_LARCH_TLS_GD_HI20)
>>       {
>> -      BFD_ASSERT (BFD_RELOC_LARCH_RELAX - BFD_RELOC_LARCH_B16
>> -		  == R_LARCH_RELAX - R_LARCH_B16);
>> +      BFD_ASSERT (BFD_RELOC_LARCH_TLS_GD_HI20 - BFD_RELOC_LARCH_B16
>> +		  == R_LARCH_TLS_GD_HI20 - R_LARCH_B16);
> 
> This assert need to be deleted. Without BFD_RELOC_LARCH_{64,32}_PCRE,
> the assert may fail for some relocations.

... you want this assertion deleted rather than changed as presented. As per
the remark above, the change is specifically to prevent it triggering
unexpectedly: BFD_RELOC_LARCH_64_PCREL has been outside of the checked range
already before this change. The adjustment is to move
BFD_RELOC_LARCH_32_PCREL out of that range, too. If you still see a
possibility of the assertion triggering when it shouldn't, I guess this
would be an issue without this change as well? Otherwise, can you please be
more specific about what you see (and what I'm apparently missing)?

Jan
  

在 2026/3/30 14:26, Jan Beulich 写道:
> On 28.03.2026 04:41, mengqinggang wrote:
>> 在 2026/3/27 17:58, Jan Beulich 写道:
>>> There's no need to have a separate reloc per arch; just like for other
>>> more or less generic ones a single one will (mostly) do, as long as the
>>> resulting reloc's properties fit such a generic use (in the assembler it
>>> could, after all, also result from ordinary expressions or uses with the
>>> .reloc directive). Arm64, C-Sky, and KVX - sadly - are once again
>>> exceptions.
>>>
>>> For cris it's a PLT reloc which is being replaced.
>>>
>>> For msp430 also drop BFD_RELOC_MSP430_16_BYTE, which has already been
>>> merely an alias of BFD_RELOC_16 (resolving to R_MSP430_16_BYTE).
>>> ---
>>> It's not clear to me why LoongArch's "fast" lookup stopped at
>>> BFD_RELOC_LARCH_RELAX (which is also unlike the range special cased in
>>> gas); subsequent relocations also are contiguous. IOW instead of dropping
>>> BFD_RELOC_LARCH_{32,64}_PCREL (and moving the "terminator" slightly back),
>>> the target may want (need) excluding here as well.
> Hmm, I'm a little confused. On v1 you said, in reply to this remark, that
> the change is good for LoongArch. Now suddenly ...
>
>>> --- a/bfd/elfxx-loongarch.c
>>> +++ b/bfd/elfxx-loongarch.c
>>> @@ -1389,7 +1389,7 @@ static loongarch_reloc_howto_type loonga
>>>    	 0,					/* src_mask */
>>>    	 0xffffffff,				/* dst_mask */
>>>    	 true,					/* pcrel_offset */
>>> -	 BFD_RELOC_LARCH_32_PCREL,		/* bfd_reloc_code_real_type */
>>> +	 BFD_RELOC_32_PCREL,			/* bfd_reloc_code_real_type */
>>>    	 reloc_sign_bits,			/* adjust_reloc_bits */
>>>    	 NULL),					/* larch_reloc_type_name */
>>>    
>>> @@ -1581,7 +1581,7 @@ static loongarch_reloc_howto_type loonga
>>>    	 0,					/* src_mask */
>>>    	 0xffffffffffffffff,			/* dst_mask */
>>>    	 true,					/* pcrel_offset */
>>> -	 BFD_RELOC_LARCH_64_PCREL,		/* bfd_reloc_code_real_type */
>>> +	 BFD_RELOC_64_PCREL,			/* bfd_reloc_code_real_type */
>>>    	 NULL,					/* adjust_reloc_bits */
>>>    	 NULL),					/* larch_reloc_type_name */
>>>    
>>> @@ -2144,10 +2144,10 @@ loongarch_reloc_type_lookup (bfd *abfd A
>>>      BFD_ASSERT (ARRAY_SIZE (loongarch_howto_table) == R_LARCH_count);
>>>    
>>>      /* Fast search for new reloc types.  */
>>> -  if (BFD_RELOC_LARCH_B16 <= code && code < BFD_RELOC_LARCH_RELAX)
>>> +  if (BFD_RELOC_LARCH_B16 <= code && code <= BFD_RELOC_LARCH_TLS_GD_HI20)
>>>        {
>>> -      BFD_ASSERT (BFD_RELOC_LARCH_RELAX - BFD_RELOC_LARCH_B16
>>> -		  == R_LARCH_RELAX - R_LARCH_B16);
>>> +      BFD_ASSERT (BFD_RELOC_LARCH_TLS_GD_HI20 - BFD_RELOC_LARCH_B16
>>> +		  == R_LARCH_TLS_GD_HI20 - R_LARCH_B16);
>> This assert need to be deleted. Without BFD_RELOC_LARCH_{64,32}_PCRE,
>> the assert may fail for some relocations.
>>   
> ... you want this assertion deleted rather than changed as presented. As per
> the remark above, the change is specifically to prevent it triggering
> unexpectedly: BFD_RELOC_LARCH_64_PCREL has been outside of the checked range
> already before this change. The adjustment is to move
> BFD_RELOC_LARCH_32_PCREL out of that range, too. If you still see a
> possibility of the assertion triggering when it shouldn't, I guess this
> would be an issue without this change as well? Otherwise, can you please be
> more specific about what you see (and what I'm apparently missing)?
>
> Jan

Sorry for the confusion.
You are right, please carry on!
I thought deleting this assert would enable fast look for all the 
relocations.

Thanks,
Meng