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[37.24.206.209]) by smtp.gmail.com with ESMTPSA id 4fb4d7f45d1cf-5c3cc698195sm2261275a12.72.2024.09.06.03.24.58 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Fri, 06 Sep 2024 03:24:59 -0700 (PDT) Message-ID: <86831b48-a033-4d7f-8e7f-be578f46e85c@suse.com> Date: Fri, 6 Sep 2024 12:24:57 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: [PATCH 1/5] x86: templatize SIMD FP arithmetic templates From: Jan Beulich To: Binutils Cc: "H.J. Lu" , "Jiang, Haochen" References: Content-Language: en-US Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: X-Spam-Status: No, score=-3023.6 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, DKIM_VALID_EF, RCVD_IN_DNSWL_NONE, SPF_HELO_NONE, SPF_NONE, TXREP, T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: binutils@sourceware.org X-Mailman-Version: 2.1.30 Precedence: list List-Id: Binutils mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: binutils-bounces~patchwork=sourceware.org@sourceware.org Reduce redundancy, in preparation of the addition of further counterparts for AVX10.2. Provide the "ne" parameter needed there right away, even if unused for now. --- a/opcodes/i386-opc.tbl +++ b/opcodes/i386-opc.tbl @@ -1176,10 +1176,17 @@ pxor, 0x0fef, , M $avx:0xf30f53:0xf30f52:AVX:VexLIG|VexW0|Src1VVVV|SSE2AVX, + $apx:0x660f384d:0x660f384f:AVX512F:EVexLIG|VexW0|Src1VVVV|Disp8MemShift=2|SSE2AVX, + $sse:0xf30f53:0xf30f52:SSE:::> + -addps, 0x0f58, , Modrm|||NoSuf, { RegXMM|Unspecified|BaseIndex, RegXMM } -addss, 0xf30f58, , Modrm|||NoSuf, { Dword|Unspecified|BaseIndex|RegXMM, RegXMM } +ps, 0x0f, , Modrm|||NoSuf, { RegXMM|Unspecified|BaseIndex, RegXMM } +ss, 0xf30f, , Modrm|||NoSuf, { RegXMM|Dword|Unspecified|BaseIndex, RegXMM } andnps, 0x0f55, , Modrm||NoSuf, { RegXMM|Unspecified|BaseIndex, RegXMM } andps, 0x0f54, , Modrm||C|NoSuf, { RegXMM|Unspecified|BaseIndex, RegXMM } cmpps, 0x0fc2/, , Modrm||||NoSuf|ImmExt, { RegXMM|Unspecified|BaseIndex, RegXMM } @@ -1199,14 +1206,8 @@ cvtss2si, 0xf30f2d, SSE, Modrm|IgnoreSiz cvttps2pi, 0xf2c, SSE, Modrm|NoSuf, { Qword|Unspecified|BaseIndex|RegXMM, RegMMX } cvttss2si, 0xf32c, AVX|AVX512F, Modrm|VexLIG|EVexLIG|Space0F|Disp8MemShift=2|No_bSuf|No_wSuf|No_sSuf|SSE2AVX, { Dword|Unspecified|BaseIndex|RegXMM, Reg32|Reg64 } cvttss2si, 0xf30f2c, SSE, Modrm|IgnoreSize|No_bSuf|No_wSuf|No_sSuf, { Dword|Unspecified|BaseIndex|RegXMM, Reg32|Reg64 } -divps, 0x0f5e, , Modrm|||NoSuf, { RegXMM|Unspecified|BaseIndex, RegXMM } -divss, 0xf30f5e, , Modrm|||NoSuf, { Dword|Unspecified|BaseIndex|RegXMM, RegXMM } ldmxcsr, 0x0fae/2, , Modrm||NoSuf, { Dword|Unspecified|BaseIndex } maskmovq, 0xff7, SSE|3dnowA, Modrm|NoSuf, { RegMMX, RegMMX } -maxps, 0x0f5f, , Modrm|||NoSuf, { RegXMM|Unspecified|BaseIndex, RegXMM } -maxss, 0xf30f5f, , Modrm|||NoSuf, { Dword|Unspecified|BaseIndex|RegXMM, RegXMM } -minps, 0x0f5d, , Modrm|||NoSuf, { RegXMM|Unspecified|BaseIndex, RegXMM } -minss, 0xf30f5d, , Modrm|||NoSuf, { Dword|Unspecified|BaseIndex|RegXMM, RegXMM } movaps, 0x0f28, , D|Modrm||NoSuf, { RegXMM|Unspecified|BaseIndex, RegXMM } movhlps, 0x0f12, , Modrm|||NoSuf, { RegXMM, RegXMM } movhps, 0x16, AVX|AVX512F, Modrm|Vex128|EVex128|Space0F|Src1VVVV|VexW0|Disp8MemShift=3|NoSuf|SSE2AVX, { Qword|Unspecified|BaseIndex, RegXMM } @@ -1224,8 +1225,6 @@ movss, 0xf310, AVX|AVX512F, D|Modrm|VexL movss, 0xf310, AVX|AVX512F, D|Modrm|VexLIG|EVexLIG|Space0F|Src1VVVV|VexW0|NoSuf|SSE2AVX, { RegXMM, RegXMM } movss, 0xf30f10, SSE, D|Modrm|NoSuf, { Dword|Unspecified|BaseIndex|RegXMM, RegXMM } movups, 0x0f10, , D|Modrm||NoSuf, { RegXMM|Unspecified|BaseIndex, RegXMM } -mulps, 0x0f59, , Modrm|||NoSuf, { RegXMM|Unspecified|BaseIndex, RegXMM } -mulss, 0xf30f59, , Modrm|||NoSuf, { Dword|Unspecified|BaseIndex|RegXMM, RegXMM } orps, 0x0f56, , Modrm||C|NoSuf, { RegXMM|Unspecified|BaseIndex, RegXMM } pavg, 0xfe0 | (3 * ), SSE|3dnowA, Modrm|NoSuf, { Qword|Unspecified|BaseIndex|RegMMX, RegMMX } pavg, 0x660fe0 | (3 * ), , Modrm|||C|NoSuf, { RegXMM|Unspecified|BaseIndex, RegXMM } @@ -1263,8 +1262,6 @@ shufps, 0x0fc6, , Modrm|, 0x0f51, , Modrm||NoSuf, { RegXMM|Unspecified|BaseIndex, RegXMM } sqrtss, 0xf30f51, , Modrm|||NoSuf, { Dword|Unspecified|BaseIndex|RegXMM, RegXMM } stmxcsr, 0x0fae/3, , Modrm||NoSuf, { Dword|Unspecified|BaseIndex } -subps, 0x0f5c, , Modrm|||NoSuf, { RegXMM|Unspecified|BaseIndex, RegXMM } -subss, 0xf30f5c, , Modrm|||NoSuf, { Dword|Unspecified|BaseIndex|RegXMM, RegXMM } ucomiss, 0x0f2e, , Modrm||NoSuf, { Dword|Unspecified|BaseIndex|RegXMM, RegXMM } unpckhps, 0x0f15, , Modrm|||NoSuf, { RegXMM|Unspecified|BaseIndex, RegXMM } unpcklps, 0x0f14, , Modrm|||NoSuf, { RegXMM|Unspecified|BaseIndex, RegXMM } @@ -1277,8 +1274,8 @@ xorps, 0x0f57, , Modrm $apx:AVX512DQ&AVX512VL:EVex128|VexW1|Src1VVVV|Disp8MemShift=4|SSE2AVX, + $sse:SSE2:> -addpd, 0x660f58, , Modrm|||NoSuf, { RegXMM|Unspecified|BaseIndex, RegXMM } -addsd, 0xf20f58, , Modrm|||NoSuf, { Qword|Unspecified|BaseIndex|RegXMM, RegXMM } +pd, 0x660f, , Modrm|||NoSuf, { RegXMM|Unspecified|BaseIndex, RegXMM } +sd, 0xf20f, , Modrm|||NoSuf, { RegXMM|Qword|Unspecified|BaseIndex, RegXMM } andnpd, 0x660f55, , Modrm||NoSuf, { RegXMM|Unspecified|BaseIndex, RegXMM } andpd, 0x660f54, , Modrm||C|NoSuf, { RegXMM|Unspecified|BaseIndex, RegXMM } cmppd, 0x660fc2/, , Modrm||||NoSuf|ImmExt, { RegXMM|Unspecified|BaseIndex, RegXMM } @@ -1294,12 +1291,6 @@ cvtsi2sd, 0xf22a, x64&(AVX|AVX512F), Mod cvtsi2sd, 0xf22a, x64&(AVX|AVX512F), Modrm|VexLIG|EVexLIG|Space0F|Src1VVVV|Disp8ShiftVL|No_bSuf|No_wSuf|No_sSuf|SSE2AVX|IntelSyntax, { Reg32|Reg64|Unspecified|BaseIndex, RegXMM } cvtsi2sd, 0xf20f2a, SSE2&x64, Modrm|IgnoreSize|No_bSuf|No_wSuf|No_sSuf|ATTSyntax, { Reg32|Reg64|Unspecified|BaseIndex, RegXMM } cvtsi2sd, 0xf20f2a, SSE2&x64, Modrm|No_bSuf|No_wSuf|No_sSuf|IntelSyntax, { Reg32|Reg64|Unspecified|BaseIndex, RegXMM } -divpd, 0x660f5e, , Modrm|||NoSuf, { RegXMM|Unspecified|BaseIndex, RegXMM } -divsd, 0xf20f5e, , Modrm|||NoSuf, { Qword|Unspecified|BaseIndex|RegXMM, RegXMM } -maxpd, 0x660f5f, , Modrm|||NoSuf, { RegXMM|Unspecified|BaseIndex, RegXMM } -maxsd, 0xf20f5f, , Modrm|||NoSuf, { Qword|Unspecified|BaseIndex|RegXMM, RegXMM } -minpd, 0x660f5d, , Modrm|||NoSuf, { RegXMM|Unspecified|BaseIndex, RegXMM } -minsd, 0xf20f5d, , Modrm|||NoSuf, { Qword|Unspecified|BaseIndex|RegXMM, RegXMM } movapd, 0x660f28, , D|Modrm||NoSuf, { RegXMM|Unspecified|BaseIndex, RegXMM } movhpd, 0x6616, AVX, Modrm|Vex|Space0F|Src1VVVV|VexW0|NoSuf|SSE2AVX, { Qword|Unspecified|BaseIndex, RegXMM } movhpd, 0x6616, AVX512F, Modrm|EVex128|Space0F|Src1VVVV|VexW1|Disp8MemShift=3|NoSuf|SSE2AVX, { Qword|Unspecified|BaseIndex, RegXMM } @@ -1319,14 +1310,10 @@ movsd, 0xf210, AVX, D|Modrm|VexLIG|Space movsd, 0xf210, AVX512F, D|Modrm|EVexLIG|Space0F|Src1VVVV|VexW1|NoSuf|SSE2AVX, { RegXMM, RegXMM } movsd, 0xf20f10, SSE2, D|Modrm|NoSuf, { Qword|Unspecified|BaseIndex|RegXMM, RegXMM } movupd, 0x660f10, , D|Modrm||NoSuf, { RegXMM|Unspecified|BaseIndex, RegXMM } -mulpd, 0x660f59, , Modrm|||NoSuf, { RegXMM|Unspecified|BaseIndex, RegXMM } -mulsd, 0xf20f59, , Modrm|||NoSuf, { Qword|Unspecified|BaseIndex|RegXMM, RegXMM } orpd, 0x660f56, , Modrm||C|NoSuf, { RegXMM|Unspecified|BaseIndex, RegXMM } shufpd, 0x660fc6, , Modrm|||NoSuf, { Imm8|Imm8S, RegXMM|Unspecified|BaseIndex, RegXMM } sqrtpd, 0x660f51, , Modrm||NoSuf, { RegXMM|Unspecified|BaseIndex, RegXMM } sqrtsd, 0xf20f51, , Modrm|||NoSuf, { Qword|Unspecified|BaseIndex|RegXMM, RegXMM } -subpd, 0x660f5c, , Modrm|||NoSuf, { RegXMM|Unspecified|BaseIndex, RegXMM } -subsd, 0xf20f5c, , Modrm|||NoSuf, { Qword|Unspecified|BaseIndex|RegXMM, RegXMM } ucomisd, 0x660f2e, , Modrm||NoSuf, { Qword|Unspecified|BaseIndex|RegXMM, RegXMM } unpckhpd, 0x660f15, , Modrm|||NoSuf, { RegXMM|Unspecified|BaseIndex, RegXMM } unpcklpd, 0x660f14, , Modrm|||NoSuf, { RegXMM|Unspecified|BaseIndex, RegXMM } @@ -1654,8 +1641,8 @@ gf2p8mulb, 0x660f38cf, GFNI -vaddp, 0x58, AVX, Modrm|Vex|Space0F|Src1VVVV|VexWIG|CheckOperandSize|NoSuf, { Unspecified|BaseIndex|RegXMM|RegYMM, RegXMM|RegYMM, RegXMM|RegYMM } -vadds, 0x58, AVX, Modrm|VexLIG|Space0F|Src1VVVV|VexWIG|NoSuf, { |Unspecified|BaseIndex|RegXMM, RegXMM, RegXMM } +vp, 0x, AVX, Modrm|Vex|Space0F|Src1VVVV|VexWIG|CheckOperandSize|NoSuf, { RegXMM|RegYMM|Unspecified|BaseIndex, RegXMM|RegYMM, RegXMM|RegYMM } +vs, 0x, AVX, Modrm|VexLIG|Space0F|Src1VVVV|VexWIG|NoSuf, { RegXMM||Unspecified|BaseIndex, RegXMM, RegXMM } vaddsubpd, 0x66d0, AVX, Modrm|Vex|Space0F|Src1VVVV|VexWIG|CheckOperandSize|NoSuf, { Unspecified|BaseIndex|RegXMM|RegYMM, RegXMM|RegYMM, RegXMM|RegYMM } vaddsubps, 0xf2d0, AVX, Modrm|Vex|Space0F|Src1VVVV|VexWIG|CheckOperandSize|NoSuf, { Unspecified|BaseIndex|RegXMM|RegYMM, RegXMM|RegYMM, RegXMM|RegYMM } vandnp, 0x55, AVX, Modrm|Vex|Space0F|Src1VVVV|VexWIG|CheckOperandSize|NoSuf|Optimize, { Unspecified|BaseIndex|RegXMM|RegYMM, RegXMM|RegYMM, RegXMM|RegYMM } @@ -1688,8 +1675,6 @@ vcvtss2sd, 0xf35a, AVX, Modrm|Vex=3|Spac vcvttpd2dq, 0x66e6, AVX, Modrm||Space0F|VexWIG|NoSuf|, { , RegXMM } vcvttps2dq, 0xf35b, AVX, Modrm|Vex|Space0F|VexWIG|NoSuf, { Unspecified|BaseIndex|RegXMM|RegYMM, RegXMM|RegYMM } vcvtts2si, 0x2c, AVX, Modrm|VexLIG|Space0F|No_bSuf|No_wSuf|No_sSuf, { |Unspecified|BaseIndex|RegXMM, Reg32|Reg64 } -vdivp, 0x5e, AVX, Modrm|Vex|Space0F|Src1VVVV|VexWIG|CheckOperandSize|NoSuf, { Unspecified|BaseIndex|RegXMM|RegYMM, RegXMM|RegYMM, RegXMM|RegYMM } -vdivs, 0x5e, AVX, Modrm|VexLIG|Space0F|Src1VVVV|VexWIG|NoSuf, { |Unspecified|BaseIndex|RegXMM, RegXMM, RegXMM } vdppd, 0x6641, AVX, Modrm|Vex|Space0F3A|Src1VVVV|VexWIG|NoSuf, { Imm8|Imm8S, Unspecified|BaseIndex|RegXMM, RegXMM, RegXMM } vdpps, 0x6640, AVX, Modrm|Vex|Space0F3A|Src1VVVV|VexWIG|CheckOperandSize|NoSuf, { Imm8|Imm8S, Unspecified|BaseIndex|RegXMM|RegYMM, RegXMM|RegYMM, RegXMM|RegYMM } vextractf128, 0x6619, AVX, Modrm|Vex256|Space0F3A|VexW0|NoSuf, { Imm8, RegYMM, Unspecified|BaseIndex|RegXMM } @@ -1710,10 +1695,6 @@ vldmxcsr, 0xae/2, AVX, Modrm|Vex128|Spac vmaskmovdqu, 0x66f7, AVX, Modrm|Vex|Space0F|VexWIG|NoSuf, { RegXMM, RegXMM } vmaskmovp, 0x662e | , AVX, Modrm|Vex|Space0F38|Src1VVVV|VexW0|CheckOperandSize|NoSuf, { RegXMM|RegYMM, RegXMM|RegYMM, Xmmword|Ymmword|Unspecified|BaseIndex } vmaskmovp, 0x662c | , AVX, Modrm|Vex|Space0F38|Src1VVVV|VexW0|CheckOperandSize|NoSuf, { Xmmword|Ymmword|Unspecified|BaseIndex, RegXMM|RegYMM, RegXMM|RegYMM } -vmaxp, 0x5f, AVX, Modrm|Vex|Space0F|Src1VVVV|VexWIG|CheckOperandSize|NoSuf, { Unspecified|BaseIndex|RegXMM|RegYMM, RegXMM|RegYMM, RegXMM|RegYMM } -vmaxs, 0x5f, AVX, Modrm|VexLIG|Space0F|Src1VVVV|VexWIG|NoSuf, { |Unspecified|BaseIndex|RegXMM, RegXMM, RegXMM } -vminp, 0x5d, AVX, Modrm|Vex|Space0F|Src1VVVV|VexWIG|CheckOperandSize|NoSuf, { Unspecified|BaseIndex|RegXMM|RegYMM, RegXMM|RegYMM, RegXMM|RegYMM } -vmins, 0x5d, AVX, Modrm|VexLIG|Space0F|Src1VVVV|VexWIG|NoSuf, { |Unspecified|BaseIndex|RegXMM, RegXMM, RegXMM } vmovap, 0x28, AVX, D|Modrm|Vex|Space0F|VexWIG|CheckOperandSize|NoSuf, { Unspecified|BaseIndex|RegXMM|RegYMM, RegXMM|RegYMM } // vmovd really shouldn't allow for 64bit operand (vmovq is the right // mnemonic for copying between Reg64/Mem64 and RegXMM, as is mandated @@ -1745,8 +1726,6 @@ vmovshdup, 0xf316, AVX, Modrm|Vex|Space0 vmovsldup, 0xf312, AVX, Modrm|Vex|Space0F|VexWIG|CheckOperandSize|NoSuf, { Unspecified|BaseIndex|RegXMM|RegYMM, RegXMM|RegYMM } vmovup, 0x10, AVX, D|Modrm|Vex|Space0F|VexWIG|CheckOperandSize|NoSuf, { Unspecified|BaseIndex|RegXMM|RegYMM, RegXMM|RegYMM } vmpsadbw, 0x6642, AVX|AVX2, Modrm|Vex|Space0F3A|Src1VVVV|VexWIG|CheckOperandSize|NoSuf, { Imm8|Imm8S, Unspecified|BaseIndex|RegXMM|RegYMM, RegXMM|RegYMM, RegXMM|RegYMM } -vmulp, 0x59, AVX, Modrm|Vex|Space0F|Src1VVVV|VexWIG|CheckOperandSize|NoSuf, { Unspecified|BaseIndex|RegXMM|RegYMM, RegXMM|RegYMM, RegXMM|RegYMM } -vmuls, 0x59, AVX, Modrm|VexLIG|Space0F|Src1VVVV|VexWIG|NoSuf, { |Unspecified|BaseIndex|RegXMM, RegXMM, RegXMM } vorp, 0x56, AVX, Modrm|C|Vex|Space0F|Src1VVVV|VexWIG|CheckOperandSize|NoSuf, { Unspecified|BaseIndex|RegXMM|RegYMM, RegXMM|RegYMM, RegXMM|RegYMM } vpabs, 0x661c | , AVX|AVX2, Modrm|Vex|Space0F38|VexWIG|CheckOperandSize|NoSuf, { Unspecified|BaseIndex|RegXMM|RegYMM, RegXMM|RegYMM } vpabsd, 0x661e, AVX|AVX2, Modrm|Vex|Space0F38|VexWIG|CheckOperandSize|NoSuf, { Unspecified|BaseIndex|RegXMM|RegYMM, RegXMM|RegYMM } @@ -1882,8 +1861,6 @@ vshufp, 0xc6, AVX, Modrm|Ve vsqrtp, 0x51, AVX, Modrm|Vex|Space0F|VexWIG|CheckOperandSize|NoSuf, { Unspecified|BaseIndex|RegXMM|RegYMM, RegXMM|RegYMM } vsqrts, 0x51, AVX, Modrm|VexLIG|Space0F|Src1VVVV|VexWIG|NoSuf, { |Unspecified|BaseIndex|RegXMM, RegXMM, RegXMM } vstmxcsr, 0xae/3, AVX, Modrm|Vex128|Space0F|VexWIG|NoSuf, { Dword|Unspecified|BaseIndex } -vsubp, 0x5c, AVX, Modrm|Vex|Space0F|Src1VVVV|VexWIG|CheckOperandSize|NoSuf, { Unspecified|BaseIndex|RegXMM|RegYMM, RegXMM|RegYMM, RegXMM|RegYMM } -vsubs, 0x5c, AVX, Modrm|VexLIG|Space0F|Src1VVVV|VexWIG|NoSuf, { |Unspecified|BaseIndex|RegXMM, RegXMM, RegXMM } vtestp, 0x660e | , AVX, Modrm|Vex|Space0F38|VexW0|CheckOperandSize|NoSuf, { Unspecified|BaseIndex|RegXMM|RegYMM, RegXMM|RegYMM } vucomis, 0x2e, AVX, Modrm|VexLIG|Space0F|VexWIG|NoSuf, { |Unspecified|BaseIndex|RegXMM, RegXMM } vunpckhp, 0x15, AVX, Modrm|Vex|Space0F|Src1VVVV|VexWIG|CheckOperandSize|NoSuf, { Unspecified|BaseIndex|RegXMM|RegYMM, RegXMM|RegYMM, RegXMM|RegYMM } @@ -2314,17 +2291,11 @@ kshiftr, 0x6630, , Modrm|Ve kunpckbw, 0x664B, AVX512F, Modrm|Vex=2|Space0F|Src1VVVV|VexW0|NoSuf, { RegMask, RegMask, RegMask } -vaddp, 0x58, , Modrm|Masking||Src1VVVV||Broadcast|Disp8ShiftVL|CheckOperandSize|NoSuf|StaticRounding|SAE, { RegXMM|RegYMM|RegZMM||Unspecified|BaseIndex, RegXMM|RegYMM|RegZMM, RegXMM|RegYMM|RegZMM } -vdivp, 0x5e, , Modrm|Masking||Src1VVVV||Broadcast|Disp8ShiftVL|CheckOperandSize|NoSuf|StaticRounding|SAE, { RegXMM|RegYMM|RegZMM||Unspecified|BaseIndex, RegXMM|RegYMM|RegZMM, RegXMM|RegYMM|RegZMM } -vmulp, 0x59, , Modrm|Masking||Src1VVVV||Broadcast|Disp8ShiftVL|CheckOperandSize|NoSuf|StaticRounding|SAE, { RegXMM|RegYMM|RegZMM||Unspecified|BaseIndex, RegXMM|RegYMM|RegZMM, RegXMM|RegYMM|RegZMM } -vsqrtp, 0x51, , Modrm|Masking|||Broadcast|Disp8ShiftVL|CheckOperandSize|NoSuf|StaticRounding|SAE, { RegXMM|RegYMM|RegZMM||Unspecified|BaseIndex, RegXMM|RegYMM|RegZMM } -vsubp, 0x5c, , Modrm|Masking||Src1VVVV||Broadcast|Disp8ShiftVL|CheckOperandSize|NoSuf|StaticRounding|SAE, { RegXMM|RegYMM|RegZMM||Unspecified|BaseIndex, RegXMM|RegYMM|RegZMM, RegXMM|RegYMM|RegZMM } +vp, 0x, , Modrm|Masking||Src1VVVV||Broadcast|Disp8ShiftVL|CheckOperandSize|NoSuf||SAE, { RegXMM|RegYMM|RegZMM||Unspecified|BaseIndex, RegXMM|RegYMM|RegZMM, RegXMM|RegYMM|RegZMM } +vs, 0x, , Modrm|EVexLIG|Masking||Src1VVVV||Disp8MemShift|NoSuf||SAE, { RegXMM||Unspecified|BaseIndex, RegXMM, RegXMM } -vadds, 0x58, , Modrm|EVexLIG|Masking||Src1VVVV||Disp8MemShift|NoSuf|StaticRounding|SAE, { RegXMM||Unspecified|BaseIndex, RegXMM, RegXMM } -vdivs, 0x5e, , Modrm|EVexLIG|Masking||Src1VVVV||Disp8MemShift|NoSuf|StaticRounding|SAE, { RegXMM||Unspecified|BaseIndex, RegXMM, RegXMM } -vmuls, 0x59, , Modrm|EVexLIG|Masking||Src1VVVV||Disp8MemShift|NoSuf|StaticRounding|SAE, { RegXMM||Unspecified|BaseIndex, RegXMM, RegXMM } +vsqrtp, 0x51, , Modrm|Masking|||Broadcast|Disp8ShiftVL|CheckOperandSize|NoSuf|StaticRounding|SAE, { RegXMM|RegYMM|RegZMM||Unspecified|BaseIndex, RegXMM|RegYMM|RegZMM } vsqrts, 0x51, , Modrm|EVexLIG|Masking||Src1VVVV||Disp8MemShift|NoSuf|StaticRounding|SAE, { RegXMM||Unspecified|BaseIndex, RegXMM, RegXMM } -vsubs, 0x5C, , Modrm|EVexLIG|Masking||Src1VVVV||Disp8MemShift|NoSuf|StaticRounding|SAE, { RegXMM||Unspecified|BaseIndex, RegXMM, RegXMM } valign, 0x6603, AVX512F, Modrm|Masking|Space0F3A|Src1VVVV||Broadcast|Disp8ShiftVL|CheckOperandSize|NoSuf, { Imm8, RegXMM|RegYMM|RegZMM||Unspecified|BaseIndex, RegXMM|RegYMM|RegZMM, RegXMM|RegYMM|RegZMM } vblendmp, 0x6665, AVX512F, Modrm|Masking|Space0F38|Src1VVVV||Broadcast|Disp8ShiftVL|CheckOperandSize|NoSuf, { RegXMM|RegYMM|RegZMM||Unspecified|BaseIndex, RegXMM|RegYMM|RegZMM, RegXMM|RegYMM|RegZMM } @@ -2476,12 +2447,6 @@ vinserti64x4, 0x663A, AVX512F, Modrm|EVe vinsertps, 0x6621, AVX512F, Modrm|EVex128|Space0F3A|Src1VVVV|VexW0|Disp8MemShift=2|NoSuf, { Imm8, RegXMM|Dword|Unspecified|BaseIndex, RegXMM, RegXMM } -vmaxp, 0x5f, , Modrm|Masking||Src1VVVV||Broadcast|Disp8ShiftVL|CheckOperandSize|NoSuf|SAE, { RegXMM|RegYMM|RegZMM||Unspecified|BaseIndex, RegXMM|RegYMM|RegZMM, RegXMM|RegYMM|RegZMM } -vmaxs, 0x5f, , Modrm|EVexLIG|Masking||Src1VVVV||Disp8MemShift|NoSuf|SAE, { RegXMM||Unspecified|BaseIndex, RegXMM, RegXMM } - -vminp, 0x5d, , Modrm|Masking||Src1VVVV||Broadcast|Disp8ShiftVL|CheckOperandSize|NoSuf|SAE, { RegXMM|RegYMM|RegZMM||Unspecified|BaseIndex, RegXMM|RegYMM|RegZMM, RegXMM|RegYMM|RegZMM } -vmins, 0x5d, , Modrm|EVexLIG|Masking||Src1VVVV||Disp8MemShift|NoSuf|SAE, { RegXMM||Unspecified|BaseIndex, RegXMM, RegXMM } - vmovap, 0x28, AVX512F, D|Modrm|Masking|Space0F||Disp8ShiftVL|CheckOperandSize|NoSuf, { RegXMM|RegYMM|RegZMM|Unspecified|BaseIndex, RegXMM|RegYMM|RegZMM } vmovntp, 0x2B, AVX512F, Modrm|Space0F||Disp8ShiftVL|CheckOperandSize|NoSuf, { RegXMM|RegYMM|RegZMM, XMMword|YMMword|ZMMword|Unspecified|BaseIndex } vmovup, 0x10, AVX512F, D|Modrm|Masking|Space0F||Disp8ShiftVL|CheckOperandSize|NoSuf, { RegXMM|RegYMM|RegZMM|Unspecified|BaseIndex, RegXMM|RegYMM|RegZMM }