RISC-V: avoid ld crashes due to bogus use by testcases

Message ID 7828c817-1a81-4a19-a449-b6d76dfbeb31@suse.com
State New
Headers
Series RISC-V: avoid ld crashes due to bogus use by testcases |

Commit Message

Jan Beulich Dec. 5, 2025, 1:24 p.m. UTC
  Specifying a little-endian emulation isn't very helpful when the target is
big-endian (and hence gas defaults to that). Surely the linker better
wouldn't crash when invoked like this, but making sure of this isn't the
purpose of any of these tests (afaict). Make assembly output match linker
options.

With this the ld testsuite completes successfully for me. binutils and gas
testsuites still have issues.
  

Comments

Nelson Chu Dec. 5, 2025, 7:33 p.m. UTC | #1
Thanks, please commit :-)

Nelson

On Fri, Dec 5, 2025 at 9:25 PM Jan Beulich <jbeulich@suse.com> wrote:

> Specifying a little-endian emulation isn't very helpful when the target is
> big-endian (and hence gas defaults to that). Surely the linker better
> wouldn't crash when invoked like this, but making sure of this isn't the
> purpose of any of these tests (afaict). Make assembly output match linker
> options.
>
> With this the ld testsuite completes successfully for me. binutils and gas
> testsuites still have issues.
>
> --- a/ld/testsuite/ld-riscv-elf/align-small-region.d
> +++ b/ld/testsuite/ld-riscv-elf/align-small-region.d
> @@ -1,5 +1,5 @@
>  #source: align-small-region.s
> -#as: -march=rv32i
> +#as: -march=rv32i -mlittle-endian
>  #ld: -melf32lriscv --relax -Talign-small-region.ld --defsym=_start=0x100
>  #objdump: -d
>
> --- a/ld/testsuite/ld-riscv-elf/code-model-medany-01.d
> +++ b/ld/testsuite/ld-riscv-elf/code-model-medany-01.d
> @@ -1,4 +1,4 @@
>  #source: code-model.s
> -#as: -march=rv64i -mabi=lp64 --defsym __medany__=1
> +#as: -march=rv64i -mabi=lp64 -mlittle-endian --defsym __medany__=1
>  #ld: -Tcode-model-01.ld -melf64lriscv --no-relax
>  #error: .*relocation truncated to fit: R_RISCV_GOT_HI20 against symbol
> `symbolG'
> --- a/ld/testsuite/ld-riscv-elf/code-model-medany-02.d
> +++ b/ld/testsuite/ld-riscv-elf/code-model-medany-02.d
> @@ -1,5 +1,5 @@
>  #source: code-model.s
> -#as: -march=rv64i -mabi=lp64 --defsym __medany__=1
> +#as: -march=rv64i -mabi=lp64 -mlittle-endian --defsym __medany__=1
>  #ld: -Tcode-model-02.ld -melf64lriscv --no-relax
>  #objdump: -d -Mno-aliases
>
> --- a/ld/testsuite/ld-riscv-elf/code-model-medany-weakref-01.d
> +++ b/ld/testsuite/ld-riscv-elf/code-model-medany-weakref-01.d
> @@ -1,4 +1,4 @@
>  #source: code-model.s
> -#as: -march=rv64i -mabi=lp64 --defsym __medany__=1 --defsym
> __undefweak__=1
> +#as: -march=rv64i -mabi=lp64 -mlittle-endian --defsym __medany__=1
> --defsym __undefweak__=1
>  #ld: -Tcode-model-01.ld -melf64lriscv --no-relax
>  #error: .*relocation truncated to fit: R_RISCV_GOT_HI20 against undefined
> symbol `symbolW'
> --- a/ld/testsuite/ld-riscv-elf/code-model-medany-weakref-02.d
> +++ b/ld/testsuite/ld-riscv-elf/code-model-medany-weakref-02.d
> @@ -1,5 +1,5 @@
>  #source: code-model.s
> -#as: -march=rv64i -mabi=lp64 --defsym __medany__=1 --defsym
> __undefweak__=1
> +#as: -march=rv64i -mabi=lp64 -mlittle-endian --defsym __medany__=1
> --defsym __undefweak__=1
>  #ld: -Tcode-model-02.ld -melf64lriscv --no-relax
>  #objdump: -d -Mno-aliases
>
> --- a/ld/testsuite/ld-riscv-elf/code-model-medlow-01.d
> +++ b/ld/testsuite/ld-riscv-elf/code-model-medlow-01.d
> @@ -1,4 +1,4 @@
>  #source: code-model.s
> -#as: -march=rv64i -mabi=lp64 --defsym __medlow__=1
> +#as: -march=rv64i -mabi=lp64 -mlittle-endian --defsym __medlow__=1
>  #ld: -Tcode-model-01.ld -melf64lriscv --no-relax
>  #error: .*relocation truncated to fit: R_RISCV_HI20 against `symbolL'
> --- a/ld/testsuite/ld-riscv-elf/code-model-medlow-02.d
> +++ b/ld/testsuite/ld-riscv-elf/code-model-medlow-02.d
> @@ -1,5 +1,5 @@
>  #source: code-model.s
> -#as: -march=rv64i -mabi=lp64 --defsym __medlow__=1
> +#as: -march=rv64i -mabi=lp64 -mlittle-endian --defsym __medlow__=1
>  #ld: -Tcode-model-02.ld -melf64lriscv --no-relax
>  #objdump: -d -Mno-aliases
>
> --- a/ld/testsuite/ld-riscv-elf/code-model-medlow-weakref-01.d
> +++ b/ld/testsuite/ld-riscv-elf/code-model-medlow-weakref-01.d
> @@ -1,5 +1,5 @@
>  #source: code-model.s
> -#as: -march=rv64i -mabi=lp64 --defsym __medlow__=1 --defsym
> __undefweak__=1
> +#as: -march=rv64i -mabi=lp64 -mlittle-endian --defsym __medlow__=1
> --defsym __undefweak__=1
>  #ld: -Tcode-model-01.ld -melf64lriscv --no-relax
>  #objdump: -d -Mno-aliases
>
> --- a/ld/testsuite/ld-riscv-elf/code-model-medlow-weakref-02.d
> +++ b/ld/testsuite/ld-riscv-elf/code-model-medlow-weakref-02.d
> @@ -1,5 +1,5 @@
>  #source: code-model.s
> -#as: -march=rv64i -mabi=lp64 --defsym __medlow__=1 --defsym
> __undefweak__=1
> +#as: -march=rv64i -mabi=lp64 -mlittle-endian --defsym __medlow__=1
> --defsym __undefweak__=1
>  #ld: -Tcode-model-02.ld -melf64lriscv --no-relax
>  #objdump: -d -Mno-aliases
>
> --- a/ld/testsuite/ld-riscv-elf/code-model-relax-medany-01.d
> +++ b/ld/testsuite/ld-riscv-elf/code-model-relax-medany-01.d
> @@ -1,4 +1,4 @@
>  #source: code-model.s
> -#as: -march=rv64i -mabi=lp64 --defsym __medany__=1
> +#as: -march=rv64i -mabi=lp64 -mlittle-endian --defsym __medany__=1
>  #ld: -Tcode-model-01.ld -melf64lriscv --relax
>  #error: .*relocation truncated to fit: R_RISCV_GOT_HI20 against symbol
> `symbolG'
> --- a/ld/testsuite/ld-riscv-elf/code-model-relax-medany-02.d
> +++ b/ld/testsuite/ld-riscv-elf/code-model-relax-medany-02.d
> @@ -1,5 +1,5 @@
>  #source: code-model.s
> -#as: -march=rv64i -mabi=lp64 --defsym __medany__=1
> +#as: -march=rv64i -mabi=lp64 -mlittle-endian --defsym __medany__=1
>  #ld: -Tcode-model-02.ld -melf64lriscv --relax
>  #objdump: -d -Mno-aliases
>
> --- a/ld/testsuite/ld-riscv-elf/code-model-relax-medany-weakref-01.d
> +++ b/ld/testsuite/ld-riscv-elf/code-model-relax-medany-weakref-01.d
> @@ -1,4 +1,4 @@
>  #source: code-model.s
> -#as: -march=rv64i -mabi=lp64 --defsym __medany__=1 --defsym
> __undefweak__=1
> +#as: -march=rv64i -mabi=lp64 -mlittle-endian --defsym __medany__=1
> --defsym __undefweak__=1
>  #ld: -Tcode-model-01.ld -melf64lriscv --relax
>  #error: .*relocation truncated to fit: R_RISCV_GOT_HI20 against undefined
> symbol `symbolW'
> --- a/ld/testsuite/ld-riscv-elf/code-model-relax-medany-weakref-02.d
> +++ b/ld/testsuite/ld-riscv-elf/code-model-relax-medany-weakref-02.d
> @@ -1,5 +1,5 @@
>  #source: code-model.s
> -#as: -march=rv64i -mabi=lp64 --defsym __medany__=1 --defsym
> __undefweak__=1
> +#as: -march=rv64i -mabi=lp64 -mlittle-endian --defsym __medany__=1
> --defsym __undefweak__=1
>  #ld: -Tcode-model-02.ld -melf64lriscv --relax
>  #objdump: -d -Mno-aliases
>
> --- a/ld/testsuite/ld-riscv-elf/code-model-relax-medlow-01.d
> +++ b/ld/testsuite/ld-riscv-elf/code-model-relax-medlow-01.d
> @@ -1,5 +1,5 @@
>  #source: code-model.s
> -#as: -march=rv64i -mabi=lp64 --defsym __medlow__=1
> +#as: -march=rv64i -mabi=lp64 -mlittle-endian --defsym __medlow__=1
>  #ld: -Tcode-model-01.ld -melf64lriscv --relax
>  #objdump: -d -Mno-aliases
>
> --- a/ld/testsuite/ld-riscv-elf/code-model-relax-medlow-01-norelaxgp.d
> +++ b/ld/testsuite/ld-riscv-elf/code-model-relax-medlow-01-norelaxgp.d
> @@ -1,4 +1,4 @@
>  #source: code-model.s
> -#as: -march=rv64i -mabi=lp64 --defsym __medlow__=1
> +#as: -march=rv64i -mabi=lp64 -mlittle-endian --defsym __medlow__=1
>  #ld: -Tcode-model-01.ld -melf64lriscv --no-relax-gp --relax
>  #error: .*relocation truncated to fit: R_RISCV_HI20 against `symbolL'
> --- a/ld/testsuite/ld-riscv-elf/code-model-relax-medlow-02.d
> +++ b/ld/testsuite/ld-riscv-elf/code-model-relax-medlow-02.d
> @@ -1,5 +1,5 @@
>  #source: code-model.s
> -#as: -march=rv64i -mabi=lp64 --defsym __medlow__=1
> +#as: -march=rv64i -mabi=lp64 -mlittle-endian --defsym __medlow__=1
>  #ld: -Tcode-model-02.ld -melf64lriscv --relax
>  #objdump: -d -Mno-aliases
>
> --- a/ld/testsuite/ld-riscv-elf/code-model-relax-medlow-weakref-01.d
> +++ b/ld/testsuite/ld-riscv-elf/code-model-relax-medlow-weakref-01.d
> @@ -1,5 +1,5 @@
>  #source: code-model.s
> -#as: -march=rv64i -mabi=lp64 --defsym __medlow__=1 --defsym
> __undefweak__=1
> +#as: -march=rv64i -mabi=lp64 -mlittle-endian --defsym __medlow__=1
> --defsym __undefweak__=1
>  #ld: -Tcode-model-01.ld -melf64lriscv --relax
>  #objdump: -d -Mno-aliases
>
> --- a/ld/testsuite/ld-riscv-elf/code-model-relax-medlow-weakref-02.d
> +++ b/ld/testsuite/ld-riscv-elf/code-model-relax-medlow-weakref-02.d
> @@ -1,5 +1,5 @@
>  #source: code-model.s
> -#as: -march=rv64i -mabi=lp64 --defsym __medlow__=1 --defsym
> __undefweak__=1
> +#as: -march=rv64i -mabi=lp64 -mlittle-endian --defsym __medlow__=1
> --defsym __undefweak__=1
>  #ld: -Tcode-model-02.ld -melf64lriscv --relax
>  #objdump: -d -Mno-aliases
>
> --- a/ld/testsuite/ld-riscv-elf/pcrel-reloc-abs-nopie.d
> +++ b/ld/testsuite/ld-riscv-elf/pcrel-reloc-abs-nopie.d
> @@ -1,6 +1,6 @@
>  #source: pcrel-reloc.s
>  #source: pcrel-reloc-abs.s
> -#as: -march=rv64i -mabi=lp64
> +#as: -march=rv64i -mabi=lp64 -mlittle-endian
>  #ld: -melf64lriscv --no-pie --no-relax
>  #objdump: -d
>
> --- a/ld/testsuite/ld-riscv-elf/pcrel-reloc-abs-pie.d
> +++ b/ld/testsuite/ld-riscv-elf/pcrel-reloc-abs-pie.d
> @@ -1,5 +1,5 @@
>  #source: pcrel-reloc.s
>  #source: pcrel-reloc-abs.s
> -#as: -march=rv64i -mabi=lp64
> +#as: -march=rv64i -mabi=lp64 -mlittle-endian
>  #ld: -melf64lriscv --pie --no-relax
>  #error: .*relocation R_RISCV_PCREL_HI20 against absolute symbol `sym' can
> not be used when making a shared objec.*t
> --- a/ld/testsuite/ld-riscv-elf/pcrel-reloc-rel-nopie.d
> +++ b/ld/testsuite/ld-riscv-elf/pcrel-reloc-rel-nopie.d
> @@ -1,6 +1,6 @@
>  #source: pcrel-reloc.s
>  #source: pcrel-reloc-rel.s
> -#as: -march=rv64i -mabi=lp64
> +#as: -march=rv64i -mabi=lp64 -mlittle-endian
>  #ld: -melf64lriscv --no-pie --no-relax
>  #objdump: -d
>
> --- a/ld/testsuite/ld-riscv-elf/pcrel-reloc-rel-pie.d
> +++ b/ld/testsuite/ld-riscv-elf/pcrel-reloc-rel-pie.d
> @@ -1,6 +1,6 @@
>  #source: pcrel-reloc.s
>  #source: pcrel-reloc-rel.s
> -#as: -march=rv64i -mabi=lp64
> +#as: -march=rv64i -mabi=lp64 -mlittle-endian
>  #ld: -melf64lriscv --pie --no-relax
>  #objdump: -d
>
> --- a/ld/testsuite/ld-riscv-elf/property-combine-and-1.d
> +++ b/ld/testsuite/ld-riscv-elf/property-combine-and-1.d
> @@ -1,6 +1,6 @@
>  #name: RISC-V GNU Property (multiple inputs, combine section) - 1
>  #source: property1.s
>  #source: property2.s
> -#as: -march=rv64g
> +#as: -march=rv64g -mlittle-endian
>  #ld: -shared -melf64lriscv
>  #readelf: -n
> --- a/ld/testsuite/ld-riscv-elf/property-combine-and-2.d
> +++ b/ld/testsuite/ld-riscv-elf/property-combine-and-2.d
> @@ -1,7 +1,7 @@
>  #name: RISC-V GNU Property (multiple inputs, combine section) - 2
>  #source: property1.s
>  #source: property3.s
> -#as: -march=rv64g
> +#as: -march=rv64g -mlittle-endian
>  #ld: -shared -melf64lriscv
>  #readelf: -n
>
> --- a/ld/testsuite/ld-riscv-elf/property-combine-and-3.d
> +++ b/ld/testsuite/ld-riscv-elf/property-combine-and-3.d
> @@ -1,7 +1,7 @@
>  #name: RISC-V GNU Property (multiple inputs, combine section) - 3
>  #source: property1.s
>  #source: property4.s
> -#as: -march=rv64g
> +#as: -march=rv64g -mlittle-endian
>  #ld: -shared -melf64lriscv
>  #readelf: -n
>
> --- a/ld/testsuite/ld-riscv-elf/property-zicfilp-unlabeled.d
> +++ b/ld/testsuite/ld-riscv-elf/property-zicfilp-unlabeled.d
> @@ -1,6 +1,6 @@
>  #name: GNU Property (single input, CFI_LP_UNLABELED)
>  #source: property-zicfilp-unlabeled.s
> -#as: -march=rv64g
> +#as: -march=rv64g -mlittle-endian
>  #ld: -shared -melf64lriscv
>  #readelf: -n
>
> --- a/ld/testsuite/ld-riscv-elf/property-zicfiss.d
> +++ b/ld/testsuite/ld-riscv-elf/property-zicfiss.d
> @@ -1,6 +1,6 @@
>  #name: GNU Property (single input, CFI_SS)
>  #source: property-zicfiss.s
> -#as: -march=rv64g
> +#as: -march=rv64g -mlittle-endian
>  #ld: -shared -melf64lriscv
>  #readelf: -n
>
> --- a/ld/testsuite/ld-riscv-elf/uleb128.d
> +++ b/ld/testsuite/ld-riscv-elf/uleb128.d
> @@ -1,5 +1,5 @@
>  #source: uleb128.s
> -#as: -march=rv32ic
> +#as: -march=rv32ic -mlittle-endian
>  #ld: -melf32lriscv
>  #objdump: -d
>
> --- a/ld/testsuite/ld-riscv-elf/zicfilp-unlabeled-plt.d
> +++ b/ld/testsuite/ld-riscv-elf/zicfilp-unlabeled-plt.d
> @@ -2,7 +2,7 @@
>  #source: zicfilp-unlabeled-plt.s
>  #ld: -shared -melf64lriscv
>  #objdump: -dr -j .plt
> -#as: -march=rv64gc_zicfilp
> +#as: -march=rv64gc_zicfilp -mlittle-endian
>
>  [^:]*: *file format elf64-.*riscv
>
>
  
Maciej W. Rozycki Dec. 6, 2025, 4:13 a.m. UTC | #2
On Fri, 5 Dec 2025, Jan Beulich wrote:

> Specifying a little-endian emulation isn't very helpful when the target is
> big-endian (and hence gas defaults to that). Surely the linker better
> wouldn't crash when invoked like this, but making sure of this isn't the
> purpose of any of these tests (afaict). Make assembly output match linker
> options.
> 
> With this the ld testsuite completes successfully for me. binutils and gas
> testsuites still have issues.

 The LD testsuite for which target though?  It's not named anywhere.

  Maciej
  
Jan Beulich Dec. 8, 2025, 7:44 a.m. UTC | #3
On 06.12.2025 05:13, Maciej W. Rozycki wrote:
> On Fri, 5 Dec 2025, Jan Beulich wrote:
> 
>> Specifying a little-endian emulation isn't very helpful when the target is
>> big-endian (and hence gas defaults to that). Surely the linker better
>> wouldn't crash when invoked like this, but making sure of this isn't the
>> purpose of any of these tests (afaict). Make assembly output match linker
>> options.
>>
>> With this the ld testsuite completes successfully for me. binutils and gas
>> testsuites still have issues.
> 
>  The LD testsuite for which target though?  It's not named anywhere.

I thought the RISC-V: prefix in the subject would make this entirely unambiguous.
Does it not?

Jan
  
Maciej W. Rozycki Dec. 8, 2025, 5:46 p.m. UTC | #4
On Mon, 8 Dec 2025, Jan Beulich wrote:

> >> Specifying a little-endian emulation isn't very helpful when the target is
> >> big-endian (and hence gas defaults to that). Surely the linker better
> >> wouldn't crash when invoked like this, but making sure of this isn't the
> >> purpose of any of these tests (afaict). Make assembly output match linker
> >> options.
> >>
> >> With this the ld testsuite completes successfully for me. binutils and gas
> >> testsuites still have issues.
> > 
> >  The LD testsuite for which target though?  It's not named anywhere.
> 
> I thought the RISC-V: prefix in the subject would make this entirely unambiguous.
> Does it not?

 It just names the target architecture and says nothing about the specific 
configuration triggering the failure.  Yes, digging through config.bfd or 
suchlike will likely let one figure this out, but just listing example 
target triplets would be more useful IMO.

 Also does it actually make sense to force the tests to use the little 
endianness, effectively limiting coverage for the other one?  Switching 
the linker emulation according to the target configuration would IMO make 
more sense unless the tests are inherently little-endian (why?).  Or 
getting rid of the linker emulation override altogether unless the default 
is not suitable (again, why?).  Or is using non-default settings the scope 
of the tests?  It doesn't appear to me to be the case though.

  Maciej
  
Jan Beulich Dec. 9, 2025, 8:07 a.m. UTC | #5
On 08.12.2025 18:46, Maciej W. Rozycki wrote:
>  Also does it actually make sense to force the tests to use the little 
> endianness, effectively limiting coverage for the other one?  Switching 
> the linker emulation according to the target configuration would IMO make 
> more sense unless the tests are inherently little-endian (why?).  Or 
> getting rid of the linker emulation override altogether unless the default 
> is not suitable (again, why?).  Or is using non-default settings the scope 
> of the tests?  It doesn't appear to me to be the case though.

All questions I asked myself as well. They need answering by the original
authors though, or the RISC-V maintainers. My first attempt was to simply
disable those tests for big-endian. Only then I thought of the assembler
option. How to pick the correct linker emulation in a dump test's .d file
I don't even know; if I knew, that would indeed have been my preferred
choice.

Jan
  

Patch

--- a/ld/testsuite/ld-riscv-elf/align-small-region.d
+++ b/ld/testsuite/ld-riscv-elf/align-small-region.d
@@ -1,5 +1,5 @@ 
 #source: align-small-region.s
-#as: -march=rv32i
+#as: -march=rv32i -mlittle-endian
 #ld: -melf32lriscv --relax -Talign-small-region.ld --defsym=_start=0x100
 #objdump: -d
 
--- a/ld/testsuite/ld-riscv-elf/code-model-medany-01.d
+++ b/ld/testsuite/ld-riscv-elf/code-model-medany-01.d
@@ -1,4 +1,4 @@ 
 #source: code-model.s
-#as: -march=rv64i -mabi=lp64 --defsym __medany__=1
+#as: -march=rv64i -mabi=lp64 -mlittle-endian --defsym __medany__=1
 #ld: -Tcode-model-01.ld -melf64lriscv --no-relax
 #error: .*relocation truncated to fit: R_RISCV_GOT_HI20 against symbol `symbolG'
--- a/ld/testsuite/ld-riscv-elf/code-model-medany-02.d
+++ b/ld/testsuite/ld-riscv-elf/code-model-medany-02.d
@@ -1,5 +1,5 @@ 
 #source: code-model.s
-#as: -march=rv64i -mabi=lp64 --defsym __medany__=1
+#as: -march=rv64i -mabi=lp64 -mlittle-endian --defsym __medany__=1
 #ld: -Tcode-model-02.ld -melf64lriscv --no-relax
 #objdump: -d -Mno-aliases
 
--- a/ld/testsuite/ld-riscv-elf/code-model-medany-weakref-01.d
+++ b/ld/testsuite/ld-riscv-elf/code-model-medany-weakref-01.d
@@ -1,4 +1,4 @@ 
 #source: code-model.s
-#as: -march=rv64i -mabi=lp64 --defsym __medany__=1 --defsym __undefweak__=1
+#as: -march=rv64i -mabi=lp64 -mlittle-endian --defsym __medany__=1 --defsym __undefweak__=1
 #ld: -Tcode-model-01.ld -melf64lriscv --no-relax
 #error: .*relocation truncated to fit: R_RISCV_GOT_HI20 against undefined symbol `symbolW'
--- a/ld/testsuite/ld-riscv-elf/code-model-medany-weakref-02.d
+++ b/ld/testsuite/ld-riscv-elf/code-model-medany-weakref-02.d
@@ -1,5 +1,5 @@ 
 #source: code-model.s
-#as: -march=rv64i -mabi=lp64 --defsym __medany__=1 --defsym __undefweak__=1
+#as: -march=rv64i -mabi=lp64 -mlittle-endian --defsym __medany__=1 --defsym __undefweak__=1
 #ld: -Tcode-model-02.ld -melf64lriscv --no-relax
 #objdump: -d -Mno-aliases
 
--- a/ld/testsuite/ld-riscv-elf/code-model-medlow-01.d
+++ b/ld/testsuite/ld-riscv-elf/code-model-medlow-01.d
@@ -1,4 +1,4 @@ 
 #source: code-model.s
-#as: -march=rv64i -mabi=lp64 --defsym __medlow__=1
+#as: -march=rv64i -mabi=lp64 -mlittle-endian --defsym __medlow__=1
 #ld: -Tcode-model-01.ld -melf64lriscv --no-relax
 #error: .*relocation truncated to fit: R_RISCV_HI20 against `symbolL'
--- a/ld/testsuite/ld-riscv-elf/code-model-medlow-02.d
+++ b/ld/testsuite/ld-riscv-elf/code-model-medlow-02.d
@@ -1,5 +1,5 @@ 
 #source: code-model.s
-#as: -march=rv64i -mabi=lp64 --defsym __medlow__=1
+#as: -march=rv64i -mabi=lp64 -mlittle-endian --defsym __medlow__=1
 #ld: -Tcode-model-02.ld -melf64lriscv --no-relax
 #objdump: -d -Mno-aliases
 
--- a/ld/testsuite/ld-riscv-elf/code-model-medlow-weakref-01.d
+++ b/ld/testsuite/ld-riscv-elf/code-model-medlow-weakref-01.d
@@ -1,5 +1,5 @@ 
 #source: code-model.s
-#as: -march=rv64i -mabi=lp64 --defsym __medlow__=1 --defsym __undefweak__=1
+#as: -march=rv64i -mabi=lp64 -mlittle-endian --defsym __medlow__=1 --defsym __undefweak__=1
 #ld: -Tcode-model-01.ld -melf64lriscv --no-relax
 #objdump: -d -Mno-aliases
 
--- a/ld/testsuite/ld-riscv-elf/code-model-medlow-weakref-02.d
+++ b/ld/testsuite/ld-riscv-elf/code-model-medlow-weakref-02.d
@@ -1,5 +1,5 @@ 
 #source: code-model.s
-#as: -march=rv64i -mabi=lp64 --defsym __medlow__=1 --defsym __undefweak__=1
+#as: -march=rv64i -mabi=lp64 -mlittle-endian --defsym __medlow__=1 --defsym __undefweak__=1
 #ld: -Tcode-model-02.ld -melf64lriscv --no-relax
 #objdump: -d -Mno-aliases
 
--- a/ld/testsuite/ld-riscv-elf/code-model-relax-medany-01.d
+++ b/ld/testsuite/ld-riscv-elf/code-model-relax-medany-01.d
@@ -1,4 +1,4 @@ 
 #source: code-model.s
-#as: -march=rv64i -mabi=lp64 --defsym __medany__=1
+#as: -march=rv64i -mabi=lp64 -mlittle-endian --defsym __medany__=1
 #ld: -Tcode-model-01.ld -melf64lriscv --relax
 #error: .*relocation truncated to fit: R_RISCV_GOT_HI20 against symbol `symbolG'
--- a/ld/testsuite/ld-riscv-elf/code-model-relax-medany-02.d
+++ b/ld/testsuite/ld-riscv-elf/code-model-relax-medany-02.d
@@ -1,5 +1,5 @@ 
 #source: code-model.s
-#as: -march=rv64i -mabi=lp64 --defsym __medany__=1
+#as: -march=rv64i -mabi=lp64 -mlittle-endian --defsym __medany__=1
 #ld: -Tcode-model-02.ld -melf64lriscv --relax
 #objdump: -d -Mno-aliases
 
--- a/ld/testsuite/ld-riscv-elf/code-model-relax-medany-weakref-01.d
+++ b/ld/testsuite/ld-riscv-elf/code-model-relax-medany-weakref-01.d
@@ -1,4 +1,4 @@ 
 #source: code-model.s
-#as: -march=rv64i -mabi=lp64 --defsym __medany__=1 --defsym __undefweak__=1
+#as: -march=rv64i -mabi=lp64 -mlittle-endian --defsym __medany__=1 --defsym __undefweak__=1
 #ld: -Tcode-model-01.ld -melf64lriscv --relax
 #error: .*relocation truncated to fit: R_RISCV_GOT_HI20 against undefined symbol `symbolW'
--- a/ld/testsuite/ld-riscv-elf/code-model-relax-medany-weakref-02.d
+++ b/ld/testsuite/ld-riscv-elf/code-model-relax-medany-weakref-02.d
@@ -1,5 +1,5 @@ 
 #source: code-model.s
-#as: -march=rv64i -mabi=lp64 --defsym __medany__=1 --defsym __undefweak__=1
+#as: -march=rv64i -mabi=lp64 -mlittle-endian --defsym __medany__=1 --defsym __undefweak__=1
 #ld: -Tcode-model-02.ld -melf64lriscv --relax
 #objdump: -d -Mno-aliases
 
--- a/ld/testsuite/ld-riscv-elf/code-model-relax-medlow-01.d
+++ b/ld/testsuite/ld-riscv-elf/code-model-relax-medlow-01.d
@@ -1,5 +1,5 @@ 
 #source: code-model.s
-#as: -march=rv64i -mabi=lp64 --defsym __medlow__=1
+#as: -march=rv64i -mabi=lp64 -mlittle-endian --defsym __medlow__=1
 #ld: -Tcode-model-01.ld -melf64lriscv --relax
 #objdump: -d -Mno-aliases
 
--- a/ld/testsuite/ld-riscv-elf/code-model-relax-medlow-01-norelaxgp.d
+++ b/ld/testsuite/ld-riscv-elf/code-model-relax-medlow-01-norelaxgp.d
@@ -1,4 +1,4 @@ 
 #source: code-model.s
-#as: -march=rv64i -mabi=lp64 --defsym __medlow__=1
+#as: -march=rv64i -mabi=lp64 -mlittle-endian --defsym __medlow__=1
 #ld: -Tcode-model-01.ld -melf64lriscv --no-relax-gp --relax
 #error: .*relocation truncated to fit: R_RISCV_HI20 against `symbolL'
--- a/ld/testsuite/ld-riscv-elf/code-model-relax-medlow-02.d
+++ b/ld/testsuite/ld-riscv-elf/code-model-relax-medlow-02.d
@@ -1,5 +1,5 @@ 
 #source: code-model.s
-#as: -march=rv64i -mabi=lp64 --defsym __medlow__=1
+#as: -march=rv64i -mabi=lp64 -mlittle-endian --defsym __medlow__=1
 #ld: -Tcode-model-02.ld -melf64lriscv --relax
 #objdump: -d -Mno-aliases
 
--- a/ld/testsuite/ld-riscv-elf/code-model-relax-medlow-weakref-01.d
+++ b/ld/testsuite/ld-riscv-elf/code-model-relax-medlow-weakref-01.d
@@ -1,5 +1,5 @@ 
 #source: code-model.s
-#as: -march=rv64i -mabi=lp64 --defsym __medlow__=1 --defsym __undefweak__=1
+#as: -march=rv64i -mabi=lp64 -mlittle-endian --defsym __medlow__=1 --defsym __undefweak__=1
 #ld: -Tcode-model-01.ld -melf64lriscv --relax
 #objdump: -d -Mno-aliases
 
--- a/ld/testsuite/ld-riscv-elf/code-model-relax-medlow-weakref-02.d
+++ b/ld/testsuite/ld-riscv-elf/code-model-relax-medlow-weakref-02.d
@@ -1,5 +1,5 @@ 
 #source: code-model.s
-#as: -march=rv64i -mabi=lp64 --defsym __medlow__=1 --defsym __undefweak__=1
+#as: -march=rv64i -mabi=lp64 -mlittle-endian --defsym __medlow__=1 --defsym __undefweak__=1
 #ld: -Tcode-model-02.ld -melf64lriscv --relax
 #objdump: -d -Mno-aliases
 
--- a/ld/testsuite/ld-riscv-elf/pcrel-reloc-abs-nopie.d
+++ b/ld/testsuite/ld-riscv-elf/pcrel-reloc-abs-nopie.d
@@ -1,6 +1,6 @@ 
 #source: pcrel-reloc.s
 #source: pcrel-reloc-abs.s
-#as: -march=rv64i -mabi=lp64
+#as: -march=rv64i -mabi=lp64 -mlittle-endian
 #ld: -melf64lriscv --no-pie --no-relax
 #objdump: -d
 
--- a/ld/testsuite/ld-riscv-elf/pcrel-reloc-abs-pie.d
+++ b/ld/testsuite/ld-riscv-elf/pcrel-reloc-abs-pie.d
@@ -1,5 +1,5 @@ 
 #source: pcrel-reloc.s
 #source: pcrel-reloc-abs.s
-#as: -march=rv64i -mabi=lp64
+#as: -march=rv64i -mabi=lp64 -mlittle-endian
 #ld: -melf64lriscv --pie --no-relax
 #error: .*relocation R_RISCV_PCREL_HI20 against absolute symbol `sym' can not be used when making a shared objec.*t
--- a/ld/testsuite/ld-riscv-elf/pcrel-reloc-rel-nopie.d
+++ b/ld/testsuite/ld-riscv-elf/pcrel-reloc-rel-nopie.d
@@ -1,6 +1,6 @@ 
 #source: pcrel-reloc.s
 #source: pcrel-reloc-rel.s
-#as: -march=rv64i -mabi=lp64
+#as: -march=rv64i -mabi=lp64 -mlittle-endian
 #ld: -melf64lriscv --no-pie --no-relax
 #objdump: -d
 
--- a/ld/testsuite/ld-riscv-elf/pcrel-reloc-rel-pie.d
+++ b/ld/testsuite/ld-riscv-elf/pcrel-reloc-rel-pie.d
@@ -1,6 +1,6 @@ 
 #source: pcrel-reloc.s
 #source: pcrel-reloc-rel.s
-#as: -march=rv64i -mabi=lp64
+#as: -march=rv64i -mabi=lp64 -mlittle-endian
 #ld: -melf64lriscv --pie --no-relax
 #objdump: -d
 
--- a/ld/testsuite/ld-riscv-elf/property-combine-and-1.d
+++ b/ld/testsuite/ld-riscv-elf/property-combine-and-1.d
@@ -1,6 +1,6 @@ 
 #name: RISC-V GNU Property (multiple inputs, combine section) - 1
 #source: property1.s
 #source: property2.s
-#as: -march=rv64g
+#as: -march=rv64g -mlittle-endian
 #ld: -shared -melf64lriscv
 #readelf: -n
--- a/ld/testsuite/ld-riscv-elf/property-combine-and-2.d
+++ b/ld/testsuite/ld-riscv-elf/property-combine-and-2.d
@@ -1,7 +1,7 @@ 
 #name: RISC-V GNU Property (multiple inputs, combine section) - 2
 #source: property1.s
 #source: property3.s
-#as: -march=rv64g
+#as: -march=rv64g -mlittle-endian
 #ld: -shared -melf64lriscv
 #readelf: -n
 
--- a/ld/testsuite/ld-riscv-elf/property-combine-and-3.d
+++ b/ld/testsuite/ld-riscv-elf/property-combine-and-3.d
@@ -1,7 +1,7 @@ 
 #name: RISC-V GNU Property (multiple inputs, combine section) - 3
 #source: property1.s
 #source: property4.s
-#as: -march=rv64g
+#as: -march=rv64g -mlittle-endian
 #ld: -shared -melf64lriscv
 #readelf: -n
 
--- a/ld/testsuite/ld-riscv-elf/property-zicfilp-unlabeled.d
+++ b/ld/testsuite/ld-riscv-elf/property-zicfilp-unlabeled.d
@@ -1,6 +1,6 @@ 
 #name: GNU Property (single input, CFI_LP_UNLABELED)
 #source: property-zicfilp-unlabeled.s
-#as: -march=rv64g
+#as: -march=rv64g -mlittle-endian
 #ld: -shared -melf64lriscv
 #readelf: -n
 
--- a/ld/testsuite/ld-riscv-elf/property-zicfiss.d
+++ b/ld/testsuite/ld-riscv-elf/property-zicfiss.d
@@ -1,6 +1,6 @@ 
 #name: GNU Property (single input, CFI_SS)
 #source: property-zicfiss.s
-#as: -march=rv64g
+#as: -march=rv64g -mlittle-endian
 #ld: -shared -melf64lriscv
 #readelf: -n
 
--- a/ld/testsuite/ld-riscv-elf/uleb128.d
+++ b/ld/testsuite/ld-riscv-elf/uleb128.d
@@ -1,5 +1,5 @@ 
 #source: uleb128.s
-#as: -march=rv32ic
+#as: -march=rv32ic -mlittle-endian
 #ld: -melf32lriscv
 #objdump: -d
 
--- a/ld/testsuite/ld-riscv-elf/zicfilp-unlabeled-plt.d
+++ b/ld/testsuite/ld-riscv-elf/zicfilp-unlabeled-plt.d
@@ -2,7 +2,7 @@ 
 #source: zicfilp-unlabeled-plt.s
 #ld: -shared -melf64lriscv
 #objdump: -dr -j .plt
-#as: -march=rv64gc_zicfilp
+#as: -march=rv64gc_zicfilp -mlittle-endian
 
 [^:]*: *file format elf64-.*riscv