@@ -1,21 +1,21 @@
[^:]*: Assembler messages:
-[^:]*:9: Error: shift value over 3 not allowed in thumb mode -- `add sp,sp,r0,LSL#4'
-[^:]*:10: Error: only LSL shift allowed in thumb mode -- `add sp,sp,r0,LSR#3'
-[^:]*:11: Error: only LSL shift allowed in thumb mode -- `add sp,sp,r0,ASR#3'
-[^:]*:12: Error: only LSL shift allowed in thumb mode -- `add sp,sp,r0,ROR#3'
+[^:]*:9: Error: shift value over 3 not allowed in thumb mode -- `add sp,sp,r0,LSL ?#4'
+[^:]*:10: Error: only LSL shift allowed in thumb mode -- `add sp,sp,r0,LSR ?#3'
+[^:]*:11: Error: only LSL shift allowed in thumb mode -- `add sp,sp,r0,ASR ?#3'
+[^:]*:12: Error: only LSL shift allowed in thumb mode -- `add sp,sp,r0,ROR ?#3'
[^:]*:13: Error: only LSL shift allowed in thumb mode -- `add sp,sp,r0,RRX'
-[^:]*:14: Error: shift value over 3 not allowed in thumb mode -- `adds sp,sp,r0,LSL#4'
-[^:]*:15: Error: only LSL shift allowed in thumb mode -- `adds sp,sp,r0,LSR#3'
-[^:]*:16: Error: only LSL shift allowed in thumb mode -- `adds sp,sp,r0,ASR#3'
-[^:]*:17: Error: only LSL shift allowed in thumb mode -- `adds sp,sp,r0,ROR#3'
+[^:]*:14: Error: shift value over 3 not allowed in thumb mode -- `adds sp,sp,r0,LSL ?#4'
+[^:]*:15: Error: only LSL shift allowed in thumb mode -- `adds sp,sp,r0,LSR ?#3'
+[^:]*:16: Error: only LSL shift allowed in thumb mode -- `adds sp,sp,r0,ASR ?#3'
+[^:]*:17: Error: only LSL shift allowed in thumb mode -- `adds sp,sp,r0,ROR ?#3'
[^:]*:18: Error: only LSL shift allowed in thumb mode -- `adds sp,sp,r0,RRX'
-[^:]*:19: Error: shift value over 3 not allowed in thumb mode -- `sub sp,sp,r0,LSL#4'
-[^:]*:20: Error: only LSL shift allowed in thumb mode -- `sub sp,sp,r0,LSR#3'
-[^:]*:21: Error: only LSL shift allowed in thumb mode -- `sub sp,sp,r0,ASR#3'
-[^:]*:22: Error: only LSL shift allowed in thumb mode -- `sub sp,sp,r0,ROR#3'
+[^:]*:19: Error: shift value over 3 not allowed in thumb mode -- `sub sp,sp,r0,LSL ?#4'
+[^:]*:20: Error: only LSL shift allowed in thumb mode -- `sub sp,sp,r0,LSR ?#3'
+[^:]*:21: Error: only LSL shift allowed in thumb mode -- `sub sp,sp,r0,ASR ?#3'
+[^:]*:22: Error: only LSL shift allowed in thumb mode -- `sub sp,sp,r0,ROR ?#3'
[^:]*:23: Error: only LSL shift allowed in thumb mode -- `sub sp,sp,r0,RRX'
-[^:]*:24: Error: shift value over 3 not allowed in thumb mode -- `subs sp,sp,r0,LSL#4'
-[^:]*:25: Error: only LSL shift allowed in thumb mode -- `subs sp,sp,r0,LSR#3'
-[^:]*:26: Error: only LSL shift allowed in thumb mode -- `subs sp,sp,r0,ASR#3'
-[^:]*:27: Error: only LSL shift allowed in thumb mode -- `subs sp,sp,r0,ROR#3'
+[^:]*:24: Error: shift value over 3 not allowed in thumb mode -- `subs sp,sp,r0,LSL ?#4'
+[^:]*:25: Error: only LSL shift allowed in thumb mode -- `subs sp,sp,r0,LSR ?#3'
+[^:]*:26: Error: only LSL shift allowed in thumb mode -- `subs sp,sp,r0,ASR ?#3'
+[^:]*:27: Error: only LSL shift allowed in thumb mode -- `subs sp,sp,r0,ROR ?#3'
[^:]*:28: Error: only LSL shift allowed in thumb mode -- `subs sp,sp,r0,RRX'
@@ -3,10 +3,10 @@
[^:]*:9: Error: selected processor does not support `pkhbt r9,r0,r0' in Thumb mode
[^:]*:10: Error: selected processor does not support `pkhbt r0,r9,r0' in Thumb mode
[^:]*:11: Error: selected processor does not support `pkhbt r0,r0,r9' in Thumb mode
-[^:]*:12: Error: selected processor does not support `pkhbt r0,r0,r0,lsl#0x14' in Thumb mode
-[^:]*:13: Error: selected processor does not support `pkhbt r0,r0,r0,lsl#3' in Thumb mode
+[^:]*:12: Error: selected processor does not support `pkhbt r0,r0,r0,lsl ?#0x14' in Thumb mode
+[^:]*:13: Error: selected processor does not support `pkhbt r0,r0,r0,lsl ?#3' in Thumb mode
[^:]*:14: Error: selected processor does not support `pkhtb r1,r2,r3' in Thumb mode
-[^:]*:15: Error: selected processor does not support `pkhtb r1,r2,r3,asr#0x11' in Thumb mode
+[^:]*:15: Error: selected processor does not support `pkhtb r1,r2,r3,asr ?#0x11' in Thumb mode
[^:]*:18: Error: selected processor does not support `qadd r1,r2,r3' in Thumb mode
[^:]*:19: Error: selected processor does not support `qadd16 r1,r2,r3' in Thumb mode
[^:]*:20: Error: selected processor does not support `qadd8 r1,r2,r3' in Thumb mode
@@ -121,10 +121,10 @@
[^:]*:143: Error: selected processor does not support `uxtb16 r1,r2' in Thumb mode
[^:]*:144: Error: selected processor does not support `uxtb16 r8,r9' in Thumb mode
[^:]*:147: Error: selected processor does not support `sxtab r0,r0,r0' in Thumb mode
-[^:]*:148: Error: selected processor does not support `sxtab r0,r0,r0,ror#0' in Thumb mode
-[^:]*:149: Error: selected processor does not support `sxtab r9,r0,r0,ror#8' in Thumb mode
-[^:]*:150: Error: selected processor does not support `sxtab r0,r9,r0,ror#16' in Thumb mode
-[^:]*:151: Error: selected processor does not support `sxtab r0,r0,r9,ror#24' in Thumb mode
+[^:]*:148: Error: selected processor does not support `sxtab r0,r0,r0,ror ?#0' in Thumb mode
+[^:]*:149: Error: selected processor does not support `sxtab r9,r0,r0,ror ?#8' in Thumb mode
+[^:]*:150: Error: selected processor does not support `sxtab r0,r9,r0,ror ?#16' in Thumb mode
+[^:]*:151: Error: selected processor does not support `sxtab r0,r0,r9,ror ?#24' in Thumb mode
[^:]*:153: Error: selected processor does not support `sxtab16 r1,r2,r3' in Thumb mode
[^:]*:154: Error: selected processor does not support `sxtah r1,r2,r3' in Thumb mode
[^:]*:155: Error: selected processor does not support `uxtab r1,r2,r3' in Thumb mode
@@ -103,20 +103,20 @@
[^:]*:88: Error: vector predicated instruction should be in VPT/VPST block -- `vldrdt.u64 q0,\[r0,q1\]'
[^:]*:90: Error: instruction missing MVE vector predication code -- `vldrd.u64 q0,\[r0,q1\]'
[^:]*:92: Error: shift expression expected -- `vldrb.u8 q0,\[r0,q1,#0\]'
-[^:]*:93: Error: can not shift offsets when accessing less than half-word -- `vldrb.u8 q0,\[r0,q1,UXTW#1\]'
-[^:]*:94: Error: can not shift offsets when accessing less than half-word -- `vldrb.u16 q0,\[r0,q1,UXTW#1\]'
-[^:]*:95: Error: can not shift offsets when accessing less than half-word -- `vldrb.u32 q0,\[r0,q1,UXTW#1\]'
+[^:]*:93: Error: can not shift offsets when accessing less than half-word -- `vldrb.u8 q0,\[r0,q1,UXTW ?#1\]'
+[^:]*:94: Error: can not shift offsets when accessing less than half-word -- `vldrb.u16 q0,\[r0,q1,UXTW ?#1\]'
+[^:]*:95: Error: can not shift offsets when accessing less than half-word -- `vldrb.u32 q0,\[r0,q1,UXTW ?#1\]'
[^:]*:96: Error: shift expression expected -- `vldrh.u16 q0,\[r0,q1,#1\]'
-[^:]*:97: Error: shift immediate must be 1, 2 or 3 for half-word, word or double-word accesses respectively -- `vldrh.u16 q0,\[r0,q1,UXTW#2\]'
-[^:]*:98: Error: shift immediate must be 1, 2 or 3 for half-word, word or double-word accesses respectively -- `vldrh.u32 q0,\[r0,q1,UXTW#2\]'
-[^:]*:99: Error: shift immediate must be 1, 2 or 3 for half-word, word or double-word accesses respectively -- `vldrh.u16 q0,\[r0,q1,UXTW#3\]'
-[^:]*:100: Error: shift immediate must be 1, 2 or 3 for half-word, word or double-word accesses respectively -- `vldrh.u32 q0,\[r0,q1,UXTW#3\]'
+[^:]*:97: Error: shift immediate must be 1, 2 or 3 for half-word, word or double-word accesses respectively -- `vldrh.u16 q0,\[r0,q1,UXTW ?#2\]'
+[^:]*:98: Error: shift immediate must be 1, 2 or 3 for half-word, word or double-word accesses respectively -- `vldrh.u32 q0,\[r0,q1,UXTW ?#2\]'
+[^:]*:99: Error: shift immediate must be 1, 2 or 3 for half-word, word or double-word accesses respectively -- `vldrh.u16 q0,\[r0,q1,UXTW ?#3\]'
+[^:]*:100: Error: shift immediate must be 1, 2 or 3 for half-word, word or double-word accesses respectively -- `vldrh.u32 q0,\[r0,q1,UXTW ?#3\]'
[^:]*:101: Error: shift expression expected -- `vldrw.u32 q0,\[r0,q1,#2\]'
-[^:]*:102: Error: shift immediate must be 1, 2 or 3 for half-word, word or double-word accesses respectively -- `vldrw.u32 q0,\[r0,q1,UXTW#1\]'
-[^:]*:103: Error: shift immediate must be 1, 2 or 3 for half-word, word or double-word accesses respectively -- `vldrw.u32 q0,\[r0,q1,UXTW#3\]'
+[^:]*:102: Error: shift immediate must be 1, 2 or 3 for half-word, word or double-word accesses respectively -- `vldrw.u32 q0,\[r0,q1,UXTW ?#1\]'
+[^:]*:103: Error: shift immediate must be 1, 2 or 3 for half-word, word or double-word accesses respectively -- `vldrw.u32 q0,\[r0,q1,UXTW ?#3\]'
[^:]*:104: Error: shift expression expected -- `vldrd.u64 q0,\[r0,q1,#3\]'
-[^:]*:105: Error: shift immediate must be 1, 2 or 3 for half-word, word or double-word accesses respectively -- `vldrd.u64 q0,\[r0,q1,UXTW#1\]'
-[^:]*:106: Error: shift immediate must be 1, 2 or 3 for half-word, word or double-word accesses respectively -- `vldrd.u64 q0,\[r0,q1,UXTW#2\]'
-[^:]*:107: Error: shift immediate must be 1, 2 or 3 for half-word, word or double-word accesses respectively -- `vldrd.u64 q0,\[r0,q1,UXTW#4\]'
+[^:]*:105: Error: shift immediate must be 1, 2 or 3 for half-word, word or double-word accesses respectively -- `vldrd.u64 q0,\[r0,q1,UXTW ?#1\]'
+[^:]*:106: Error: shift immediate must be 1, 2 or 3 for half-word, word or double-word accesses respectively -- `vldrd.u64 q0,\[r0,q1,UXTW ?#2\]'
+[^:]*:107: Error: shift immediate must be 1, 2 or 3 for half-word, word or double-word accesses respectively -- `vldrd.u64 q0,\[r0,q1,UXTW ?#4\]'
@@ -161,27 +161,27 @@
[^:]*:139: Error: bad element type for instruction -- `vldrb.p32 q0,\[r2,q3\]'
[^:]*:139: Error: bad element type for instruction -- `vldrb.p64 q0,\[r2,q3\]'
[^:]*:139: Error: bad element type for instruction -- `vldrb.s8 q0,\[r2,q3\]'
-[^:]*:142: Error: bad element type for instruction -- `vldrh.8 q0,\[r2,q3,uxtw#1\]'
-[^:]*:142: Error: bad element type for instruction -- `vldrh.32 q0,\[r2,q3,uxtw#1\]'
-[^:]*:142: Error: bad element type for instruction -- `vldrh.64 q0,\[r2,q3,uxtw#1\]'
-[^:]*:142: Error: bad element type for instruction -- `vldrh.f32 q0,\[r2,q3,uxtw#1\]'
-[^:]*:142: Error: bad element type for instruction -- `vldrh.f64 q0,\[r2,q3,uxtw#1\]'
-[^:]*:142: Error: bad element type for instruction -- `vldrh.p32 q0,\[r2,q3,uxtw#1\]'
-[^:]*:142: Error: bad element type for instruction -- `vldrh.p64 q0,\[r2,q3,uxtw#1\]'
-[^:]*:142: Error: bad element type for instruction -- `vldrh.s16 q0,\[r2,q3,uxtw#1\]'
-[^:]*:145: Error: bad element type for instruction -- `vldrw.8 q0,\[r2,q3,uxtw#2\]'
-[^:]*:145: Error: bad element type for instruction -- `vldrw.16 q0,\[r2,q3,uxtw#2\]'
-[^:]*:145: Error: bad element type for instruction -- `vldrw.64 q0,\[r2,q3,uxtw#2\]'
-[^:]*:145: Error: bad element type for instruction -- `vldrw.f16 q0,\[r2,q3,uxtw#2\]'
-[^:]*:145: Error: bad element type for instruction -- `vldrw.f64 q0,\[r2,q3,uxtw#2\]'
-[^:]*:145: Error: bad element type for instruction -- `vldrw.p16 q0,\[r2,q3,uxtw#2\]'
-[^:]*:145: Error: bad element type for instruction -- `vldrw.p64 q0,\[r2,q3,uxtw#2\]'
-[^:]*:145: Error: bad element type for instruction -- `vldrw.s32 q0,\[r2,q3,uxtw#2\]'
-[^:]*:148: Error: bad element type for instruction -- `vldrd.8 q0,\[r2,q3,uxtw#3\]'
-[^:]*:148: Error: bad element type for instruction -- `vldrd.16 q0,\[r2,q3,uxtw#3\]'
-[^:]*:148: Error: bad element type for instruction -- `vldrd.32 q0,\[r2,q3,uxtw#3\]'
-[^:]*:148: Error: bad element type for instruction -- `vldrd.f16 q0,\[r2,q3,uxtw#3\]'
-[^:]*:148: Error: bad element type for instruction -- `vldrd.f32 q0,\[r2,q3,uxtw#3\]'
-[^:]*:148: Error: bad element type for instruction -- `vldrd.p16 q0,\[r2,q3,uxtw#3\]'
-[^:]*:148: Error: bad element type for instruction -- `vldrd.p32 q0,\[r2,q3,uxtw#3\]'
-[^:]*:148: Error: bad element type for instruction -- `vldrd.s64 q0,\[r2,q3,uxtw#3\]'
+[^:]*:142: Error: bad element type for instruction -- `vldrh.8 q0,\[r2,q3,uxtw ?#1\]'
+[^:]*:142: Error: bad element type for instruction -- `vldrh.32 q0,\[r2,q3,uxtw ?#1\]'
+[^:]*:142: Error: bad element type for instruction -- `vldrh.64 q0,\[r2,q3,uxtw ?#1\]'
+[^:]*:142: Error: bad element type for instruction -- `vldrh.f32 q0,\[r2,q3,uxtw ?#1\]'
+[^:]*:142: Error: bad element type for instruction -- `vldrh.f64 q0,\[r2,q3,uxtw ?#1\]'
+[^:]*:142: Error: bad element type for instruction -- `vldrh.p32 q0,\[r2,q3,uxtw ?#1\]'
+[^:]*:142: Error: bad element type for instruction -- `vldrh.p64 q0,\[r2,q3,uxtw ?#1\]'
+[^:]*:142: Error: bad element type for instruction -- `vldrh.s16 q0,\[r2,q3,uxtw ?#1\]'
+[^:]*:145: Error: bad element type for instruction -- `vldrw.8 q0,\[r2,q3,uxtw ?#2\]'
+[^:]*:145: Error: bad element type for instruction -- `vldrw.16 q0,\[r2,q3,uxtw ?#2\]'
+[^:]*:145: Error: bad element type for instruction -- `vldrw.64 q0,\[r2,q3,uxtw ?#2\]'
+[^:]*:145: Error: bad element type for instruction -- `vldrw.f16 q0,\[r2,q3,uxtw ?#2\]'
+[^:]*:145: Error: bad element type for instruction -- `vldrw.f64 q0,\[r2,q3,uxtw ?#2\]'
+[^:]*:145: Error: bad element type for instruction -- `vldrw.p16 q0,\[r2,q3,uxtw ?#2\]'
+[^:]*:145: Error: bad element type for instruction -- `vldrw.p64 q0,\[r2,q3,uxtw ?#2\]'
+[^:]*:145: Error: bad element type for instruction -- `vldrw.s32 q0,\[r2,q3,uxtw ?#2\]'
+[^:]*:148: Error: bad element type for instruction -- `vldrd.8 q0,\[r2,q3,uxtw ?#3\]'
+[^:]*:148: Error: bad element type for instruction -- `vldrd.16 q0,\[r2,q3,uxtw ?#3\]'
+[^:]*:148: Error: bad element type for instruction -- `vldrd.32 q0,\[r2,q3,uxtw ?#3\]'
+[^:]*:148: Error: bad element type for instruction -- `vldrd.f16 q0,\[r2,q3,uxtw ?#3\]'
+[^:]*:148: Error: bad element type for instruction -- `vldrd.f32 q0,\[r2,q3,uxtw ?#3\]'
+[^:]*:148: Error: bad element type for instruction -- `vldrd.p16 q0,\[r2,q3,uxtw ?#3\]'
+[^:]*:148: Error: bad element type for instruction -- `vldrd.p32 q0,\[r2,q3,uxtw ?#3\]'
+[^:]*:148: Error: bad element type for instruction -- `vldrd.s64 q0,\[r2,q3,uxtw ?#3\]'
@@ -45,7 +45,7 @@
[^:]*:4: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:36: *Info: macro .*
[^:]*:39: Error: shift expression expected -- `vstrh.16 q0,\[r0,q1,#1\]'
-[^:]*:40: Error: shift immediate must be 1, 2 or 3 for half-word, word or double-word accesses respectively -- `vstrh.16 q0,\[r0,q1,UXTW#2\]'
+[^:]*:40: Error: shift immediate must be 1, 2 or 3 for half-word, word or double-word accesses respectively -- `vstrh.16 q0,\[r0,q1,UXTW ?#2\]'
[^:]*:41: Error: bad element type for instruction -- `vstrw.8 q0,\[r0,q1\]'
[^:]*:42: Error: bad element type for instruction -- `vstrw.u8 q0,\[r0,q1\]'
[^:]*:43: Error: bad element type for instruction -- `vstrw.s8 q0,\[r0,q1\]'
@@ -71,8 +71,8 @@
[^:]*:4: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:53: *Info: macro .*
[^:]*:56: Error: shift expression expected -- `vstrw.32 q0,\[r0,q1,#2\]'
-[^:]*:57: Error: shift immediate must be 1, 2 or 3 for half-word, word or double-word accesses respectively -- `vstrw.32 q0,\[r0,q1,UXTW#1\]'
-[^:]*:58: Error: shift immediate must be 1, 2 or 3 for half-word, word or double-word accesses respectively -- `vstrw.32 q0,\[r0,q1,UXTW#3\]'
+[^:]*:57: Error: shift immediate must be 1, 2 or 3 for half-word, word or double-word accesses respectively -- `vstrw.32 q0,\[r0,q1,UXTW ?#1\]'
+[^:]*:58: Error: shift immediate must be 1, 2 or 3 for half-word, word or double-word accesses respectively -- `vstrw.32 q0,\[r0,q1,UXTW ?#3\]'
[^:]*:59: Error: bad element type for instruction -- `vstrd.8 q0,\[r0,q1\]'
[^:]*:60: Error: bad element type for instruction -- `vstrd.u8 q0,\[r0,q1\]'
[^:]*:61: Error: bad element type for instruction -- `vstrd.s8 q0,\[r0,q1\]'
@@ -100,9 +100,9 @@
[^:]*:77: Warning: instruction is UNPREDICTABLE in an IT block
[^:]*:83: *Info: macro .*
[^:]*:84: Error: shift expression expected -- `vstrd.64 q0,\[r0,q1,#3\]'
-[^:]*:85: Error: shift immediate must be 1, 2 or 3 for half-word, word or double-word accesses respectively -- `vstrd.64 q0,\[r0,q1,UXTW#1\]'
-[^:]*:86: Error: shift immediate must be 1, 2 or 3 for half-word, word or double-word accesses respectively -- `vstrd.64 q0,\[r0,q1,UXTW#2\]'
-[^:]*:87: Error: shift immediate must be 1, 2 or 3 for half-word, word or double-word accesses respectively -- `vstrd.64 q0,\[r0,q1,UXTW#4\]'
+[^:]*:85: Error: shift immediate must be 1, 2 or 3 for half-word, word or double-word accesses respectively -- `vstrd.64 q0,\[r0,q1,UXTW ?#1\]'
+[^:]*:86: Error: shift immediate must be 1, 2 or 3 for half-word, word or double-word accesses respectively -- `vstrd.64 q0,\[r0,q1,UXTW ?#2\]'
+[^:]*:87: Error: shift immediate must be 1, 2 or 3 for half-word, word or double-word accesses respectively -- `vstrd.64 q0,\[r0,q1,UXTW ?#4\]'
[^:]*:90: Error: syntax error -- `vstrbeq.32 q0,\[r0,q1\]'
[^:]*:91: Error: syntax error -- `vstrbeq.32 q0,\[r0,q1\]'
[^:]*:93: Error: syntax error -- `vstrbeq.32 q0,\[r0,q1\]'
@@ -1,3 +1,3 @@
[^:]*: Assembler messages:
-[^:]*:1: Error: bad alignment -- `vld1.8 {d0},\[r0:128\]'
-[^:]*:2: Error: bad alignment -- `vld1.8 {q0},\[r0:256\]'
+[^:]*:1: Error: bad alignment -- `vld1.8 {d0},\[r0 ?:128\]'
+[^:]*:2: Error: bad alignment -- `vld1.8 {q0},\[r0 ?:256\]'
@@ -1,9 +1,9 @@
.*shift-bad.s: Assembler messages:
-.*shift-bad.s:2: Error: extraneous shift as part of operand to shift insn -- `asr r0,r1,r2,ror#5'
+.*shift-bad.s:2: Error: extraneous shift as part of operand to shift insn -- `asr r0,r1,r2,ror ?#5'
.*shift-bad.s:3: Error: extraneous shift as part of operand to shift insn -- `ror r0,r1,r2,lsl r3'
-.*shift-bad.s:7: Error: extraneous shift as part of operand to shift insn -- `ror r0,r0,r2,lsl#1'
-.*shift-bad.s:8: Error: extraneous shift as part of operand to shift insn -- `lsl r0,r0,r2,lsl#1'
+.*shift-bad.s:7: Error: extraneous shift as part of operand to shift insn -- `ror r0,r0,r2,lsl ?#1'
+.*shift-bad.s:8: Error: extraneous shift as part of operand to shift insn -- `lsl r0,r0,r2,lsl ?#1'
.*shift-bad.s:9: Error: extraneous shift as part of operand to shift insn -- `lsl r0,r0,r2,asr r0'
-.*shift-bad.s:13: Error: extraneous shift as part of operand to shift insn -- `ror r0,r1,r2,lsl#1'
-.*shift-bad.s:14: Error: extraneous shift as part of operand to shift insn -- `lsl r0,r1,r2,lsl#1'
+.*shift-bad.s:13: Error: extraneous shift as part of operand to shift insn -- `ror r0,r1,r2,lsl ?#1'
+.*shift-bad.s:14: Error: extraneous shift as part of operand to shift insn -- `lsl r0,r1,r2,lsl ?#1'
.*shift-bad.s:15: Error: extraneous shift as part of operand to shift insn -- `lsl r0,r1,r2,asr r0'
@@ -131,7 +131,7 @@
[^:]*:12: IT blocks containing more than one conditional instruction are performance deprecated in ARMv8-A and ARMv8-R
[^:]*:21: *Info: macro .*
[^:]*:45: *Info: macro .*
-[^:]*:12: Error: branch must be last instruction in IT block -- `ldreq.w r15,\[r0,r1,LSL#2\]'
+[^:]*:12: Error: branch must be last instruction in IT block -- `ldreq.w r15,\[r0,r1,LSL ?#2\]'
[^:]*:21: *Info: macro .*
[^:]*:45: *Info: macro .*
[^:]*:48: Error: r15 not allowed here -- `ldrb pc,\[r0,#4\]'
@@ -144,8 +144,8 @@
[^:]*:66: Error: r15 not allowed here -- `ldrb pc,\[r0,r1\]'
[^:]*:67: Error: cannot use register index with PC-relative addressing -- `ldrb r0,\[pc,r1\]'
[^:]*:68: Error: r15 not allowed here -- `ldrb r0,\[r1,pc\]'
-[^:]*:69: Error: r15 not allowed here -- `ldrb.w pc,\[r0,r1,LSL#1\]'
-[^:]*:71: Error: r15 not allowed here -- `ldrb.w r2,\[r0,pc,LSL#2\]'
+[^:]*:69: Error: r15 not allowed here -- `ldrb.w pc,\[r0,r1,LSL ?#1\]'
+[^:]*:71: Error: r15 not allowed here -- `ldrb.w r2,\[r0,pc,LSL ?#2\]'
[^:]*:75: Error: r15 not allowed here -- `ldrbt pc,\[r0,#4\]'
[^:]*:79: Error: r15 not allowed here -- `ldrd pc,r0,\[r1\]'
[^:]*:81: Error: r12 not allowed here -- `ldrd r12,\[r1\]'
@@ -184,8 +184,8 @@
[^:]*:149: Error: r15 not allowed here -- `ldrh pc,\[r0,r1\]'
[^:]*:150: Error: cannot use register index with PC-relative addressing -- `ldrh r0,\[pc,r1\]'
[^:]*:151: Error: r15 not allowed here -- `ldrh r0,\[r1,pc\]'
-[^:]*:152: Error: r15 not allowed here -- `ldrh.w pc,\[r0,r1,LSL#1\]'
-[^:]*:154: Error: r15 not allowed here -- `ldrh.w r2,\[r0,pc,LSL#1\]'
+[^:]*:152: Error: r15 not allowed here -- `ldrh.w pc,\[r0,r1,LSL ?#1\]'
+[^:]*:154: Error: r15 not allowed here -- `ldrh.w r2,\[r0,pc,LSL ?#1\]'
[^:]*:158: Error: r15 not allowed here -- `ldrht pc,\[r0,#4\]'
[^:]*:162: Error: r15 not allowed here -- `ldrsb pc,\[r0,#4\]'
[^:]*:165: Error: r15 not allowed here -- `ldrsb pc,\[r0,#-4\]'
@@ -196,8 +196,8 @@
[^:]*:179: Error: r15 not allowed here -- `ldrsb pc,\[r0,r1\]'
[^:]*:180: Error: cannot use register index with PC-relative addressing -- `ldrsb r0,\[pc,r1\]'
[^:]*:181: Error: r15 not allowed here -- `ldrsb r0,\[r1,pc\]'
-[^:]*:182: Error: r15 not allowed here -- `ldrsb.w pc,\[r0,r1,LSL#2\]'
-[^:]*:185: Error: r15 not allowed here -- `ldrsb.w r2,\[r0,pc,LSL#2\]'
+[^:]*:182: Error: r15 not allowed here -- `ldrsb.w pc,\[r0,r1,LSL ?#2\]'
+[^:]*:185: Error: r15 not allowed here -- `ldrsb.w r2,\[r0,pc,LSL ?#2\]'
[^:]*:190: Error: r15 not allowed here -- `ldrsbt pc,\[r0,#4\]'
[^:]*:195: Error: r15 not allowed here -- `ldrsh pc,\[r0,#4\]'
[^:]*:197: Error: r15 not allowed here -- `ldrsh pc,\[r0,#-4\]'
@@ -207,8 +207,8 @@
[^:]*:210: Error: r15 not allowed here -- `ldrsh pc,\[r0,r1\]'
[^:]*:211: Error: cannot use register index with PC-relative addressing -- `ldrsh r0,\[pc,r1\]'
[^:]*:212: Error: r15 not allowed here -- `ldrsh r0,\[r1,pc\]'
-[^:]*:214: Error: r15 not allowed here -- `ldrsh.w pc,\[r0,r1,LSL#3\]'
-[^:]*:217: Error: r15 not allowed here -- `ldrsh.w r0,\[r1,pc,LSL#3\]'
+[^:]*:214: Error: r15 not allowed here -- `ldrsh.w pc,\[r0,r1,LSL ?#3\]'
+[^:]*:217: Error: r15 not allowed here -- `ldrsh.w r0,\[r1,pc,LSL ?#3\]'
[^:]*:221: Error: r15 not allowed here -- `ldrsht pc,\[r0,#4\]'
[^:]*:226: Error: r15 not allowed here -- `ldrt pc,\[r0,#4\]'
[^:]*:232: Error: r15 not allowed here -- `str pc,\[r0,#4\]'
@@ -217,7 +217,7 @@
[^:]*:235: Error: cannot use post-indexing with PC-relative addressing -- `str r0,\[pc\],#4'
[^:]*:236: Error: cannot use writeback with PC-relative addressing -- `str r0,\[pc,#4\]!'
[^:]*:239: Error: cannot use register index with PC-relative addressing -- `str.w r0,\[pc,r1\]'
-[^:]*:240: Error: cannot use register index with PC-relative addressing -- `str.w r0,\[pc,r1,LSL#2\]'
+[^:]*:240: Error: cannot use register index with PC-relative addressing -- `str.w r0,\[pc,r1,LSL ?#2\]'
[^:]*:246: Error: cannot use register index with PC-relative addressing -- `strb.w r0,\[pc,#4\]'
[^:]*:247: Error: r15 not allowed here -- `strb.w pc,\[r0,#4\]'
[^:]*:249: Error: cannot use register index with PC-relative addressing -- `strb r0,\[pc,#-4\]'
@@ -227,11 +227,11 @@
[^:]*:253: Error: r15 not allowed here -- `strb pc,\[r0\],#4'
[^:]*:254: Error: r15 not allowed here -- `strb pc,\[r0,#4\]!'
[^:]*:260: Error: cannot use register index with PC-relative addressing -- `strb.w r0,\[pc,r1\]'
-[^:]*:261: Error: cannot use register index with PC-relative addressing -- `strb.w r0,\[pc,r1,LSL#2\]'
+[^:]*:261: Error: cannot use register index with PC-relative addressing -- `strb.w r0,\[pc,r1,LSL ?#2\]'
[^:]*:262: Error: r15 not allowed here -- `strb.w pc,\[r0,r1\]'
-[^:]*:263: Error: r15 not allowed here -- `strb.w pc,\[r0,r1,LSL#2\]'
+[^:]*:263: Error: r15 not allowed here -- `strb.w pc,\[r0,r1,LSL ?#2\]'
[^:]*:266: Error: r15 not allowed here -- `strb.w r0,\[r1,pc\]'
-[^:]*:267: Error: r15 not allowed here -- `strb.w r0,\[r1,pc,LSL#2\]'
+[^:]*:267: Error: r15 not allowed here -- `strb.w r0,\[r1,pc,LSL ?#2\]'
[^:]*:272: Error: cannot use register index with PC-relative addressing -- `strbt r0,\[pc,#4\]'
[^:]*:273: Error: r15 not allowed here -- `strbt pc,\[r0,#4\]'
[^:]*:277: Error: cannot use register index with PC-relative addressing -- `strd r0,r1,\[pc,#4\]'
@@ -265,7 +265,7 @@
[^:]*:335: Error: cannot use post-indexing with PC-relative addressing -- `strh r0,\[pc\],#4'
[^:]*:336: Error: cannot use writeback with PC-relative addressing -- `strh r0,\[pc,#4\]!'
[^:]*:339: Error: cannot use register index with PC-relative addressing -- `strh.w r0,\[pc,r1\]'
-[^:]*:340: Error: cannot use register index with PC-relative addressing -- `strh.w r0,\[pc,r1,LSL#2\]'
+[^:]*:340: Error: cannot use register index with PC-relative addressing -- `strh.w r0,\[pc,r1,LSL ?#2\]'
[^:]*:341: Error: r15 not allowed here -- `strh.w pc,\[r0,#4\]'
[^:]*:342: Error: r15 not allowed here -- `strh.w pc,\[r0\]'
[^:]*:345: Error: r15 not allowed here -- `strh pc,\[r0,#-4\]'
@@ -273,8 +273,8 @@
[^:]*:347: Error: r15 not allowed here -- `strh pc,\[r0,#4\]!'
[^:]*:351: Error: r15 not allowed here -- `strh.w pc,\[r0,r1\]'
[^:]*:353: Error: r15 not allowed here -- `strh.w r0,\[r1,pc\]'
-[^:]*:355: Error: r15 not allowed here -- `strh.w pc,\[r0,r1,LSL#2\]'
-[^:]*:357: Error: r15 not allowed here -- `strh.w r0,\[r1,pc,LSL#2\]'
+[^:]*:355: Error: r15 not allowed here -- `strh.w pc,\[r0,r1,LSL ?#2\]'
+[^:]*:357: Error: r15 not allowed here -- `strh.w r0,\[r1,pc,LSL ?#2\]'
[^:]*:361: Error: cannot use register index with PC-relative addressing -- `strht r0,\[pc,#4\]'
[^:]*:362: Error: r15 not allowed here -- `strht pc,\[r0,#4\]'
[^:]*:363: Error: cannot use register index with PC-relative addressing -- `strht sp,\[pc,#4\]'
@@ -41,7 +41,7 @@
[^:]*:12: Error: branch must be last instruction in IT block -- `ldreq.w r15,\[r0,r1\]'
[^:]*:21: *Info: macro .*
[^:]*:44: *Info: macro .*
-[^:]*:12: Error: branch must be last instruction in IT block -- `ldreq.w r15,\[r0,r1,LSL#2\]'
+[^:]*:12: Error: branch must be last instruction in IT block -- `ldreq.w r15,\[r0,r1,LSL ?#2\]'
[^:]*:21: *Info: macro .*
[^:]*:45: *Info: macro .*
[^:]*:48: Error: r15 not allowed here -- `ldrb pc,\[r0,#4\]'
@@ -59,10 +59,10 @@
[^:]*:66: Error: r15 not allowed here -- `ldrb pc,\[r0,r1\]'
[^:]*:67: Error: cannot use register index with PC-relative addressing -- `ldrb r0,\[pc,r1\]'
[^:]*:68: Error: r15 not allowed here -- `ldrb r0,\[r1,pc\]'
-[^:]*:69: Error: r15 not allowed here -- `ldrb.w pc,\[r0,r1,LSL#1\]'
+[^:]*:69: Error: r15 not allowed here -- `ldrb.w pc,\[r0,r1,LSL ?#1\]'
[^:]*:70: Error: r13 not allowed here -- `ldrb.w sp,\[r0,r1\]'
-[^:]*:71: Error: r15 not allowed here -- `ldrb.w r2,\[r0,pc,LSL#2\]'
-[^:]*:72: Error: r13 not allowed here -- `ldrb.w r2,\[r0,sp,LSL#2\]'
+[^:]*:71: Error: r15 not allowed here -- `ldrb.w r2,\[r0,pc,LSL ?#2\]'
+[^:]*:72: Error: r13 not allowed here -- `ldrb.w r2,\[r0,sp,LSL ?#2\]'
[^:]*:75: Error: r15 not allowed here -- `ldrbt pc,\[r0,#4\]'
[^:]*:76: Error: r13 not allowed here -- `ldrbt sp,\[r0,#4\]'
[^:]*:79: Error: r15 not allowed here -- `ldrd pc,r0,\[r1\]'
@@ -123,10 +123,10 @@
[^:]*:149: Error: r15 not allowed here -- `ldrh pc,\[r0,r1\]'
[^:]*:150: Error: cannot use register index with PC-relative addressing -- `ldrh r0,\[pc,r1\]'
[^:]*:151: Error: r15 not allowed here -- `ldrh r0,\[r1,pc\]'
-[^:]*:152: Error: r15 not allowed here -- `ldrh.w pc,\[r0,r1,LSL#1\]'
-[^:]*:153: Error: r13 not allowed here -- `ldrh.w sp,\[r0,r1,LSL#1\]'
-[^:]*:154: Error: r15 not allowed here -- `ldrh.w r2,\[r0,pc,LSL#1\]'
-[^:]*:155: Error: r13 not allowed here -- `ldrh.w r2,\[r0,sp,LSL#1\]'
+[^:]*:152: Error: r15 not allowed here -- `ldrh.w pc,\[r0,r1,LSL ?#1\]'
+[^:]*:153: Error: r13 not allowed here -- `ldrh.w sp,\[r0,r1,LSL ?#1\]'
+[^:]*:154: Error: r15 not allowed here -- `ldrh.w r2,\[r0,pc,LSL ?#1\]'
+[^:]*:155: Error: r13 not allowed here -- `ldrh.w r2,\[r0,sp,LSL ?#1\]'
[^:]*:158: Error: r15 not allowed here -- `ldrht pc,\[r0,#4\]'
[^:]*:159: Error: r13 not allowed here -- `ldrht sp,\[r0,#4\]'
[^:]*:162: Error: r15 not allowed here -- `ldrsb pc,\[r0,#4\]'
@@ -144,10 +144,10 @@
[^:]*:179: Error: r15 not allowed here -- `ldrsb pc,\[r0,r1\]'
[^:]*:180: Error: cannot use register index with PC-relative addressing -- `ldrsb r0,\[pc,r1\]'
[^:]*:181: Error: r15 not allowed here -- `ldrsb r0,\[r1,pc\]'
-[^:]*:182: Error: r15 not allowed here -- `ldrsb.w pc,\[r0,r1,LSL#2\]'
-[^:]*:184: Error: r13 not allowed here -- `ldrsb.w sp,\[r0,r1,LSL#2\]'
-[^:]*:185: Error: r15 not allowed here -- `ldrsb.w r2,\[r0,pc,LSL#2\]'
-[^:]*:186: Error: r13 not allowed here -- `ldrsb.w r2,\[r0,sp,LSL#2\]'
+[^:]*:182: Error: r15 not allowed here -- `ldrsb.w pc,\[r0,r1,LSL ?#2\]'
+[^:]*:184: Error: r13 not allowed here -- `ldrsb.w sp,\[r0,r1,LSL ?#2\]'
+[^:]*:185: Error: r15 not allowed here -- `ldrsb.w r2,\[r0,pc,LSL ?#2\]'
+[^:]*:186: Error: r13 not allowed here -- `ldrsb.w r2,\[r0,sp,LSL ?#2\]'
[^:]*:190: Error: r15 not allowed here -- `ldrsbt pc,\[r0,#4\]'
[^:]*:191: Error: r13 not allowed here -- `ldrsbt sp,\[r0,#4\]'
[^:]*:195: Error: r15 not allowed here -- `ldrsh pc,\[r0,#4\]'
@@ -164,10 +164,10 @@
[^:]*:210: Error: r15 not allowed here -- `ldrsh pc,\[r0,r1\]'
[^:]*:211: Error: cannot use register index with PC-relative addressing -- `ldrsh r0,\[pc,r1\]'
[^:]*:212: Error: r15 not allowed here -- `ldrsh r0,\[r1,pc\]'
-[^:]*:214: Error: r15 not allowed here -- `ldrsh.w pc,\[r0,r1,LSL#3\]'
-[^:]*:215: Error: r13 not allowed here -- `ldrsh.w sp,\[r0,r1,LSL#3\]'
-[^:]*:216: Error: r13 not allowed here -- `ldrsh.w r0,\[r1,sp,LSL#3\]'
-[^:]*:217: Error: r15 not allowed here -- `ldrsh.w r0,\[r1,pc,LSL#3\]'
+[^:]*:214: Error: r15 not allowed here -- `ldrsh.w pc,\[r0,r1,LSL ?#3\]'
+[^:]*:215: Error: r13 not allowed here -- `ldrsh.w sp,\[r0,r1,LSL ?#3\]'
+[^:]*:216: Error: r13 not allowed here -- `ldrsh.w r0,\[r1,sp,LSL ?#3\]'
+[^:]*:217: Error: r15 not allowed here -- `ldrsh.w r0,\[r1,pc,LSL ?#3\]'
[^:]*:221: Error: r15 not allowed here -- `ldrsht pc,\[r0,#4\]'
[^:]*:222: Error: r13 not allowed here -- `ldrsht sp,\[r0,#4\]'
[^:]*:226: Error: r15 not allowed here -- `ldrt pc,\[r0,#4\]'
@@ -178,7 +178,7 @@
[^:]*:235: Error: cannot use post-indexing with PC-relative addressing -- `str r0,\[pc\],#4'
[^:]*:236: Error: cannot use writeback with PC-relative addressing -- `str r0,\[pc,#4\]!'
[^:]*:239: Error: cannot use register index with PC-relative addressing -- `str.w r0,\[pc,r1\]'
-[^:]*:240: Error: cannot use register index with PC-relative addressing -- `str.w r0,\[pc,r1,LSL#2\]'
+[^:]*:240: Error: cannot use register index with PC-relative addressing -- `str.w r0,\[pc,r1,LSL ?#2\]'
[^:]*:246: Error: cannot use register index with PC-relative addressing -- `strb.w r0,\[pc,#4\]'
[^:]*:247: Error: r15 not allowed here -- `strb.w pc,\[r0,#4\]'
[^:]*:248: Error: r13 not allowed here -- `strb.w sp,\[r0,#4\]'
@@ -192,15 +192,15 @@
[^:]*:256: Error: r13 not allowed here -- `strb sp,\[r0\],#4'
[^:]*:257: Error: r13 not allowed here -- `strb sp,\[r0,#4\]!'
[^:]*:260: Error: cannot use register index with PC-relative addressing -- `strb.w r0,\[pc,r1\]'
-[^:]*:261: Error: cannot use register index with PC-relative addressing -- `strb.w r0,\[pc,r1,LSL#2\]'
+[^:]*:261: Error: cannot use register index with PC-relative addressing -- `strb.w r0,\[pc,r1,LSL ?#2\]'
[^:]*:262: Error: r15 not allowed here -- `strb.w pc,\[r0,r1\]'
-[^:]*:263: Error: r15 not allowed here -- `strb.w pc,\[r0,r1,LSL#2\]'
+[^:]*:263: Error: r15 not allowed here -- `strb.w pc,\[r0,r1,LSL ?#2\]'
[^:]*:264: Error: r13 not allowed here -- `strb.w sp,\[r0,r1\]'
-[^:]*:265: Error: r13 not allowed here -- `strb.w sp,\[r0,r1,LSL#2\]'
+[^:]*:265: Error: r13 not allowed here -- `strb.w sp,\[r0,r1,LSL ?#2\]'
[^:]*:266: Error: r15 not allowed here -- `strb.w r0,\[r1,pc\]'
-[^:]*:267: Error: r15 not allowed here -- `strb.w r0,\[r1,pc,LSL#2\]'
+[^:]*:267: Error: r15 not allowed here -- `strb.w r0,\[r1,pc,LSL ?#2\]'
[^:]*:268: Error: r13 not allowed here -- `strb.w r0,\[r1,sp\]'
-[^:]*:269: Error: r13 not allowed here -- `strb.w r0,\[r1,sp,LSL#2\]'
+[^:]*:269: Error: r13 not allowed here -- `strb.w r0,\[r1,sp,LSL ?#2\]'
[^:]*:272: Error: cannot use register index with PC-relative addressing -- `strbt r0,\[pc,#4\]'
[^:]*:273: Error: r15 not allowed here -- `strbt pc,\[r0,#4\]'
[^:]*:274: Error: r13 not allowed here -- `strbt sp,\[r0,#4\]'
@@ -252,7 +252,7 @@
[^:]*:335: Error: cannot use post-indexing with PC-relative addressing -- `strh r0,\[pc\],#4'
[^:]*:336: Error: cannot use writeback with PC-relative addressing -- `strh r0,\[pc,#4\]!'
[^:]*:339: Error: cannot use register index with PC-relative addressing -- `strh.w r0,\[pc,r1\]'
-[^:]*:340: Error: cannot use register index with PC-relative addressing -- `strh.w r0,\[pc,r1,LSL#2\]'
+[^:]*:340: Error: cannot use register index with PC-relative addressing -- `strh.w r0,\[pc,r1,LSL ?#2\]'
[^:]*:341: Error: r15 not allowed here -- `strh.w pc,\[r0,#4\]'
[^:]*:342: Error: r15 not allowed here -- `strh.w pc,\[r0\]'
[^:]*:343: Error: r13 not allowed here -- `strh.w sp,\[r0,#4\]'
@@ -267,10 +267,10 @@
[^:]*:352: Error: r13 not allowed here -- `strh.w sp,\[r0,r1\]'
[^:]*:353: Error: r15 not allowed here -- `strh.w r0,\[r1,pc\]'
[^:]*:354: Error: r13 not allowed here -- `strh.w r0,\[r1,sp\]'
-[^:]*:355: Error: r15 not allowed here -- `strh.w pc,\[r0,r1,LSL#2\]'
-[^:]*:356: Error: r13 not allowed here -- `strh.w sp,\[r0,r1,LSL#2\]'
-[^:]*:357: Error: r15 not allowed here -- `strh.w r0,\[r1,pc,LSL#2\]'
-[^:]*:358: Error: r13 not allowed here -- `strh.w r0,\[r1,sp,LSL#2\]'
+[^:]*:355: Error: r15 not allowed here -- `strh.w pc,\[r0,r1,LSL ?#2\]'
+[^:]*:356: Error: r13 not allowed here -- `strh.w sp,\[r0,r1,LSL ?#2\]'
+[^:]*:357: Error: r15 not allowed here -- `strh.w r0,\[r1,pc,LSL ?#2\]'
+[^:]*:358: Error: r13 not allowed here -- `strh.w r0,\[r1,sp,LSL ?#2\]'
[^:]*:361: Error: cannot use register index with PC-relative addressing -- `strht r0,\[pc,#4\]'
[^:]*:362: Error: r15 not allowed here -- `strht pc,\[r0,#4\]'
[^:]*:363: Error: r13 not allowed here -- `strht sp,\[pc,#4\]'
@@ -1,27 +1,27 @@
[^:]*: Assembler messages:
-[^:]*:11: Error: cannot use register index with PC-relative addressing -- `ldr r0,\[r1,pc,LSL#2\]'
-[^:]*:12: Error: cannot use register index with PC-relative addressing -- `ldr r0,\[r1,pc,LSL#2\]!'
-[^:]*:13: Error: cannot use register index with PC-relative addressing -- `ldr r0,\[r1\],pc,LSL#2'
-[^:]*:14: Error: cannot use register index with PC-relative addressing -- `ldr r0,\[pc,r1,LSL#2\]!'
-[^:]*:15: Error: cannot use register index with PC-relative addressing -- `ldr r0,\[pc\],r1,LSL#2'
+[^:]*:11: Error: cannot use register index with PC-relative addressing -- `ldr r0,\[r1,pc,LSL ?#2\]'
+[^:]*:12: Error: cannot use register index with PC-relative addressing -- `ldr r0,\[r1,pc,LSL ?#2\]!'
+[^:]*:13: Error: cannot use register index with PC-relative addressing -- `ldr r0,\[r1\],pc,LSL ?#2'
+[^:]*:14: Error: cannot use register index with PC-relative addressing -- `ldr r0,\[pc,r1,LSL ?#2\]!'
+[^:]*:15: Error: cannot use register index with PC-relative addressing -- `ldr r0,\[pc\],r1,LSL ?#2'
[^:]*:18: Error: r15 not allowed here -- `ldrb pc,\[r0,#4\]'
[^:]*:19: Error: r15 not allowed here -- `ldrb pc,\[r0\],#4'
[^:]*:20: Error: r15 not allowed here -- `ldrb pc,\[r0,#4\]!'
[^:]*:23: Error: r15 not allowed here -- `ldrb pc,label'
[^:]*:24: Error: r15 not allowed here -- `ldrb pc,\[pc,#-0\]'
-[^:]*:27: Error: r15 not allowed here -- `ldrb pc,\[r0,r1,LSL#2\]'
-[^:]*:28: Error: r15 not allowed here -- `ldrb pc,\[r0,r1,LSL#2\]!'
-[^:]*:29: Error: r15 not allowed here -- `ldrb pc,\[r0\],r1,LSL#2'
-[^:]*:30: Error: cannot use register index with PC-relative addressing -- `ldrb r0,\[r1,pc,LSL#2\]'
-[^:]*:31: Error: cannot use register index with PC-relative addressing -- `ldrb r0,\[r1,pc,LSL#2\]!'
-[^:]*:32: Error: cannot use register index with PC-relative addressing -- `ldrb r0,\[r1\],pc,LSL#2'
-[^:]*:33: Error: cannot use register index with PC-relative addressing -- `ldrb r0,\[pc,r1,LSL#2\]!'
-[^:]*:34: Error: cannot use register index with PC-relative addressing -- `ldrb r0,\[pc\],r1,LSL#2'
+[^:]*:27: Error: r15 not allowed here -- `ldrb pc,\[r0,r1,LSL ?#2\]'
+[^:]*:28: Error: r15 not allowed here -- `ldrb pc,\[r0,r1,LSL ?#2\]!'
+[^:]*:29: Error: r15 not allowed here -- `ldrb pc,\[r0\],r1,LSL ?#2'
+[^:]*:30: Error: cannot use register index with PC-relative addressing -- `ldrb r0,\[r1,pc,LSL ?#2\]'
+[^:]*:31: Error: cannot use register index with PC-relative addressing -- `ldrb r0,\[r1,pc,LSL ?#2\]!'
+[^:]*:32: Error: cannot use register index with PC-relative addressing -- `ldrb r0,\[r1\],pc,LSL ?#2'
+[^:]*:33: Error: cannot use register index with PC-relative addressing -- `ldrb r0,\[pc,r1,LSL ?#2\]!'
+[^:]*:34: Error: cannot use register index with PC-relative addressing -- `ldrb r0,\[pc\],r1,LSL ?#2'
[^:]*:37: Error: r15 not allowed here -- `ldrbt pc,\[r0\],#4'
[^:]*:38: Error: cannot use register index with PC-relative addressing -- `ldrbt r0,\[pc\],#4'
-[^:]*:39: Error: r15 not allowed here -- `ldrbt pc,\[r0\],r1,LSL#4'
-[^:]*:40: Error: cannot use register index with PC-relative addressing -- `ldrbt r0,\[pc\],r1,LSL#4'
-[^:]*:41: Error: cannot use register index with PC-relative addressing -- `ldrbt r0,\[r1\],pc,LSL#4'
+[^:]*:39: Error: r15 not allowed here -- `ldrbt pc,\[r0\],r1,LSL ?#4'
+[^:]*:40: Error: cannot use register index with PC-relative addressing -- `ldrbt r0,\[pc\],r1,LSL ?#4'
+[^:]*:41: Error: cannot use register index with PC-relative addressing -- `ldrbt r0,\[r1\],pc,LSL ?#4'
[^:]*:44: Error: r15 not allowed here -- `ldrd r0,pc,\[r1,#4\]'
[^:]*:45: Error: r15 not allowed here -- `ldrd r0,pc,\[r1\],#4'
[^:]*:46: Error: r15 not allowed here -- `ldrd r0,pc,\[r1,#4\]!'
@@ -98,32 +98,32 @@
[^:]*:153: Error: cannot use register index with PC-relative addressing -- `ldrsht r0,\[r1\],pc'
[^:]*:156: Error: r15 not allowed here -- `ldrt pc,\[r0\],#4'
[^:]*:157: Error: cannot use register index with PC-relative addressing -- `ldrt r0,\[pc\],#4'
-[^:]*:158: Error: r15 not allowed here -- `ldrt pc,\[r0\],r1,LSL#4'
-[^:]*:159: Error: cannot use register index with PC-relative addressing -- `ldrt r0,\[pc\],r1,LSL#4'
-[^:]*:160: Error: cannot use register index with PC-relative addressing -- `ldrt r0,\[r1\],pc,LSL#4'
+[^:]*:158: Error: r15 not allowed here -- `ldrt pc,\[r0\],r1,LSL ?#4'
+[^:]*:159: Error: cannot use register index with PC-relative addressing -- `ldrt r0,\[pc\],r1,LSL ?#4'
+[^:]*:160: Error: cannot use register index with PC-relative addressing -- `ldrt r0,\[r1\],pc,LSL ?#4'
[^:]*:166: Error: cannot use register index with PC-relative addressing -- `str r0,\[pc\],#4'
[^:]*:167: Error: cannot use register index with PC-relative addressing -- `str r0,\[pc,#4\]!'
-[^:]*:170: Error: cannot use register index with PC-relative addressing -- `str r0,\[r1,pc,LSL#4\]'
-[^:]*:171: Error: cannot use register index with PC-relative addressing -- `str r0,\[r1,pc,LSL#4\]!'
-[^:]*:172: Error: cannot use register index with PC-relative addressing -- `str r0,\[r1\],pc,LSL#4'
+[^:]*:170: Error: cannot use register index with PC-relative addressing -- `str r0,\[r1,pc,LSL ?#4\]'
+[^:]*:171: Error: cannot use register index with PC-relative addressing -- `str r0,\[r1,pc,LSL ?#4\]!'
+[^:]*:172: Error: cannot use register index with PC-relative addressing -- `str r0,\[r1\],pc,LSL ?#4'
[^:]*:175: Error: r15 not allowed here -- `strb pc,\[r0,#4\]'
[^:]*:176: Error: r15 not allowed here -- `strb pc,\[r0\],#4'
[^:]*:177: Error: r15 not allowed here -- `strb pc,\[r0,#4\]!'
[^:]*:178: Error: cannot use register index with PC-relative addressing -- `strb r0,\[pc\],#4'
[^:]*:179: Error: cannot use register index with PC-relative addressing -- `strb r0,\[pc,#4\]!'
-[^:]*:182: Error: r15 not allowed here -- `strb pc,\[r0,r1,LSL#4\]'
-[^:]*:183: Error: r15 not allowed here -- `strb pc,\[r0,r1,LSL#4\]!'
-[^:]*:184: Error: r15 not allowed here -- `strb pc,\[r0\],r1,LSL#4'
-[^:]*:185: Error: cannot use register index with PC-relative addressing -- `strb r1,\[r0,pc,LSL#4\]'
-[^:]*:186: Error: cannot use register index with PC-relative addressing -- `strb r1,\[r0,pc,LSL#4\]!'
-[^:]*:187: Error: cannot use register index with PC-relative addressing -- `strb r1,\[r0\],pc,LSL#4'
-[^:]*:188: Error: cannot use register index with PC-relative addressing -- `strb r0,\[pc,r1,LSL#4\]!'
-[^:]*:189: Error: cannot use register index with PC-relative addressing -- `strb r0,\[pc\],r1,LSL#4'
+[^:]*:182: Error: r15 not allowed here -- `strb pc,\[r0,r1,LSL ?#4\]'
+[^:]*:183: Error: r15 not allowed here -- `strb pc,\[r0,r1,LSL ?#4\]!'
+[^:]*:184: Error: r15 not allowed here -- `strb pc,\[r0\],r1,LSL ?#4'
+[^:]*:185: Error: cannot use register index with PC-relative addressing -- `strb r1,\[r0,pc,LSL ?#4\]'
+[^:]*:186: Error: cannot use register index with PC-relative addressing -- `strb r1,\[r0,pc,LSL ?#4\]!'
+[^:]*:187: Error: cannot use register index with PC-relative addressing -- `strb r1,\[r0\],pc,LSL ?#4'
+[^:]*:188: Error: cannot use register index with PC-relative addressing -- `strb r0,\[pc,r1,LSL ?#4\]!'
+[^:]*:189: Error: cannot use register index with PC-relative addressing -- `strb r0,\[pc\],r1,LSL ?#4'
[^:]*:192: Error: r15 not allowed here -- `strbt pc,\[r0\],#4'
[^:]*:193: Error: cannot use register index with PC-relative addressing -- `strbt r0,\[pc\],#4'
-[^:]*:194: Error: r15 not allowed here -- `strbt pc,\[r0\],r1,LSL#4'
-[^:]*:195: Error: cannot use register index with PC-relative addressing -- `strbt r0,\[pc\],r1,LSL#4'
-[^:]*:196: Error: cannot use register index with PC-relative addressing -- `strbt r0,\[r1\],pc,LSL#4'
+[^:]*:194: Error: r15 not allowed here -- `strbt pc,\[r0\],r1,LSL ?#4'
+[^:]*:195: Error: cannot use register index with PC-relative addressing -- `strbt r0,\[pc\],r1,LSL ?#4'
+[^:]*:196: Error: cannot use register index with PC-relative addressing -- `strbt r0,\[r1\],pc,LSL ?#4'
[^:]*:199: Error: r15 not allowed here -- `strd r0,pc,\[r1,#4\]'
[^:]*:200: Error: r15 not allowed here -- `strd r0,pc,\[r1\],#4'
[^:]*:201: Error: r15 not allowed here -- `strd r0,pc,\[r1,#4\]!'
@@ -167,5 +167,5 @@
[^:]*:255: Error: cannot use register index with PC-relative addressing -- `strht r0,\[pc\],r1'
[^:]*:256: Error: cannot use register index with PC-relative addressing -- `strht r0,\[r1\],pc'
[^:]*:259: Error: cannot use register index with PC-relative addressing -- `strt r0,\[pc\],#4'
-[^:]*:260: Error: cannot use register index with PC-relative addressing -- `strt r0,\[pc\],r1,LSL#4'
-[^:]*:261: Error: cannot use register index with PC-relative addressing -- `strt r0,\[r1\],pc,LSL#4'
+[^:]*:260: Error: cannot use register index with PC-relative addressing -- `strt r0,\[pc\],r1,LSL ?#4'
+[^:]*:261: Error: cannot use register index with PC-relative addressing -- `strt r0,\[r1\],pc,LSL ?#4'
@@ -7,7 +7,7 @@
[^:]*:36: *Info: macro .*
[^:]*:16: Error: unshifted register required -- `tst r0,#12'
[^:]*:36: *Info: macro .*
-[^:]*:17: Error: unshifted register required -- `tst r0,r1,lsl#2'
+[^:]*:17: Error: unshifted register required -- `tst r0,r1,lsl ?#2'
[^:]*:36: *Info: macro .*
[^:]*:18: Error: unshifted register required -- `tst r0,r1,lsl r3'
[^:]*:36: *Info: macro .*
@@ -19,7 +19,7 @@
[^:]*:37: *Info: macro .*
[^:]*:16: Error: unshifted register required -- `cmn r0,#12'
[^:]*:37: *Info: macro .*
-[^:]*:17: Error: unshifted register required -- `cmn r0,r1,lsl#2'
+[^:]*:17: Error: unshifted register required -- `cmn r0,r1,lsl ?#2'
[^:]*:37: *Info: macro .*
[^:]*:18: Error: unshifted register required -- `cmn r0,r1,lsl r3'
[^:]*:37: *Info: macro .*
@@ -31,7 +31,7 @@
[^:]*:38: *Info: macro .*
[^:]*:16: Error: unshifted register required -- `mvn r0,#12'
[^:]*:38: *Info: macro .*
-[^:]*:17: Error: unshifted register required -- `mvn r0,r1,lsl#2'
+[^:]*:17: Error: unshifted register required -- `mvn r0,r1,lsl ?#2'
[^:]*:38: *Info: macro .*
[^:]*:18: Error: unshifted register required -- `mvn r0,r1,lsl r3'
[^:]*:38: *Info: macro .*
@@ -57,7 +57,7 @@
[^:]*:12: Error: lo register required -- `sxtb r0,r8'
[^:]*:21: *Info: macro .*
[^:]*:43: *Info: macro .*
-[^:]*:22: Error: Thumb encoding does not support rotation -- `sxtb r0,r1,ror#8'
+[^:]*:22: Error: Thumb encoding does not support rotation -- `sxtb r0,r1,ror ?#8'
[^:]*:43: *Info: macro .*
[^:]*:11: Error: lo register required -- `sxth r8,r0'
[^:]*:21: *Info: macro .*
@@ -65,7 +65,7 @@
[^:]*:12: Error: lo register required -- `sxth r0,r8'
[^:]*:21: *Info: macro .*
[^:]*:44: *Info: macro .*
-[^:]*:22: Error: Thumb encoding does not support rotation -- `sxth r0,r1,ror#8'
+[^:]*:22: Error: Thumb encoding does not support rotation -- `sxth r0,r1,ror ?#8'
[^:]*:44: *Info: macro .*
[^:]*:11: Error: lo register required -- `uxtb r8,r0'
[^:]*:21: *Info: macro .*
@@ -73,7 +73,7 @@
[^:]*:12: Error: lo register required -- `uxtb r0,r8'
[^:]*:21: *Info: macro .*
[^:]*:45: *Info: macro .*
-[^:]*:22: Error: Thumb encoding does not support rotation -- `uxtb r0,r1,ror#8'
+[^:]*:22: Error: Thumb encoding does not support rotation -- `uxtb r0,r1,ror ?#8'
[^:]*:45: *Info: macro .*
[^:]*:11: Error: lo register required -- `uxth r8,r0'
[^:]*:21: *Info: macro .*
@@ -81,7 +81,7 @@
[^:]*:12: Error: lo register required -- `uxth r0,r8'
[^:]*:21: *Info: macro .*
[^:]*:46: *Info: macro .*
-[^:]*:22: Error: Thumb encoding does not support rotation -- `uxth r0,r1,ror#8'
+[^:]*:22: Error: Thumb encoding does not support rotation -- `uxth r0,r1,ror ?#8'
[^:]*:46: *Info: macro .*
[^:]*:25: Error: dest must overlap one source register -- `adc r1,r2,r3'
[^:]*:30: *Info: macro .*
@@ -94,7 +94,7 @@
[^:]*:48: *Info: macro .*
[^:]*:31: Error: unshifted register required -- `adc r0,#12'
[^:]*:48: *Info: macro .*
-[^:]*:32: Error: unshifted register required -- `adc r0,r1,lsl#2'
+[^:]*:32: Error: unshifted register required -- `adc r0,r1,lsl ?#2'
[^:]*:48: *Info: macro .*
[^:]*:33: Error: unshifted register required -- `adc r0,r1,lsl r3'
[^:]*:48: *Info: macro .*
@@ -109,7 +109,7 @@
[^:]*:49: *Info: macro .*
[^:]*:31: Error: unshifted register required -- `and r0,#12'
[^:]*:49: *Info: macro .*
-[^:]*:32: Error: unshifted register required -- `and r0,r1,lsl#2'
+[^:]*:32: Error: unshifted register required -- `and r0,r1,lsl ?#2'
[^:]*:49: *Info: macro .*
[^:]*:33: Error: unshifted register required -- `and r0,r1,lsl r3'
[^:]*:49: *Info: macro .*
@@ -124,7 +124,7 @@
[^:]*:50: *Info: macro .*
[^:]*:31: Error: unshifted register required -- `bic r0,#12'
[^:]*:50: *Info: macro .*
-[^:]*:32: Error: unshifted register required -- `bic r0,r1,lsl#2'
+[^:]*:32: Error: unshifted register required -- `bic r0,r1,lsl ?#2'
[^:]*:50: *Info: macro .*
[^:]*:33: Error: unshifted register required -- `bic r0,r1,lsl r3'
[^:]*:50: *Info: macro .*
@@ -139,7 +139,7 @@
[^:]*:51: *Info: macro .*
[^:]*:31: Error: unshifted register required -- `eor r0,#12'
[^:]*:51: *Info: macro .*
-[^:]*:32: Error: unshifted register required -- `eor r0,r1,lsl#2'
+[^:]*:32: Error: unshifted register required -- `eor r0,r1,lsl ?#2'
[^:]*:51: *Info: macro .*
[^:]*:33: Error: unshifted register required -- `eor r0,r1,lsl r3'
[^:]*:51: *Info: macro .*
@@ -154,7 +154,7 @@
[^:]*:52: *Info: macro .*
[^:]*:31: Error: unshifted register required -- `orr r0,#12'
[^:]*:52: *Info: macro .*
-[^:]*:32: Error: unshifted register required -- `orr r0,r1,lsl#2'
+[^:]*:32: Error: unshifted register required -- `orr r0,r1,lsl ?#2'
[^:]*:52: *Info: macro .*
[^:]*:33: Error: unshifted register required -- `orr r0,r1,lsl r3'
[^:]*:52: *Info: macro .*
@@ -169,7 +169,7 @@
[^:]*:53: *Info: macro .*
[^:]*:31: Error: unshifted register required -- `sbc r0,#12'
[^:]*:53: *Info: macro .*
-[^:]*:32: Error: unshifted register required -- `sbc r0,r1,lsl#2'
+[^:]*:32: Error: unshifted register required -- `sbc r0,r1,lsl ?#2'
[^:]*:53: *Info: macro .*
[^:]*:33: Error: unshifted register required -- `sbc r0,r1,lsl r3'
[^:]*:53: *Info: macro .*
@@ -220,7 +220,7 @@
[^:]*:60: *Info: macro .*
[^:]*:65: *Info: macro .*
[^:]*:66: Error: ror #imm not supported -- `ror r0,r1,#12'
-[^:]*:69: Error: unshifted register required -- `add r0,r1,lsl#2'
+[^:]*:69: Error: unshifted register required -- `add r0,r1,lsl ?#2'
[^:]*:70: Error: unshifted register required -- `add r0,r1,lsl r3'
[^:]*:71: Error: lo register required -- `add r8,r0,#1'
[^:]*:72: Error: lo register required -- `add r0,r8,#1'
@@ -236,7 +236,7 @@
[^:]*:27: Error: lo register required -- `sub r0,r8'
[^:]*:30: *Info: macro .*
[^:]*:80: *Info: macro .*
-[^:]*:32: Error: unshifted register required -- `sub r0,r1,lsl#2'
+[^:]*:32: Error: unshifted register required -- `sub r0,r1,lsl ?#2'
[^:]*:80: *Info: macro .*
[^:]*:33: Error: unshifted register required -- `sub r0,r1,lsl r3'
[^:]*:80: *Info: macro .*
@@ -246,10 +246,10 @@
[^:]*:84: Error: lo register required -- `sub r8,r1,r2'
[^:]*:85: Error: lo register required -- `sub r1,r8,r2'
[^:]*:86: Error: lo register required -- `sub r1,r2,r8'
-[^:]*:88: Error: shifts in CMP/MOV instructions are only supported in unified syntax -- `cmp r0,r1,lsl#2'
+[^:]*:88: Error: shifts in CMP/MOV instructions are only supported in unified syntax -- `cmp r0,r1,lsl ?#2'
[^:]*:89: Error: shifts in CMP/MOV instructions are only supported in unified syntax -- `cmp r0,r1,lsl r3'
[^:]*:90: Error: only lo regs allowed with immediate -- `cmp r8,#255'
-[^:]*:92: Error: shifts in CMP/MOV instructions are only supported in unified syntax -- `mov r0,r1,lsl#2'
+[^:]*:92: Error: shifts in CMP/MOV instructions are only supported in unified syntax -- `mov r0,r1,lsl ?#2'
[^:]*:93: Error: shifts in CMP/MOV instructions are only supported in unified syntax -- `mov r0,r1,lsl r3'
[^:]*:94: Error: only lo regs allowed with immediate -- `mov r8,#255'
[^:]*:98: Error: lo register required -- `ldr r8,\[r0\]'
@@ -364,8 +364,8 @@
[^:]*:113: *Info: macro .*
[^:]*:104: Error: Thumb does not support this addressing mode -- `strh r0,\[r1\],r2'
[^:]*:113: *Info: macro .*
-[^:]*:115: Error: Thumb does not support this addressing mode -- `ldr r0,\[r1,r2,lsl#1\]'
-[^:]*:116: Error: Thumb does not support this addressing mode -- `str r0,\[r1,r2,lsl#1\]'
+[^:]*:115: Error: Thumb does not support this addressing mode -- `ldr r0,\[r1,r2,lsl ?#1\]'
+[^:]*:116: Error: Thumb does not support this addressing mode -- `str r0,\[r1,r2,lsl ?#1\]'
[^:]*:119: Error: lo register required -- `ldmia r8!,{r1,r2}'
[^:]*:120: Error: lo register required -- `ldmia r7!,{r8}'
[^:]*:121: Warning: this instruction will write back the base register
@@ -514,7 +514,7 @@
[^:]*:[0-9]+: Error: r15 not allowed here -- `ssat r15,#1,r0'
[^:]*:[0-9]+: Error: r13 not allowed here -- `ssat r0,#1,r13'
[^:]*:[0-9]+: Error: r15 not allowed here -- `ssat r0,#1,r15'
-[^:]*:[0-9]+: Error: shift expression is too large -- `ssat r1,#1,r3,asr#32'
+[^:]*:[0-9]+: Error: shift expression is too large -- `ssat r1,#1,r3,asr ?#32'
[^:]*:[0-9]+: Error: r13 not allowed here -- `ssat16 r13,#1,r0'
[^:]*:[0-9]+: Error: r15 not allowed here -- `ssat16 r15,#1,r0'
[^:]*:[0-9]+: Error: r13 not allowed here -- `ssat16 r0,#1,r13'
@@ -742,7 +742,7 @@
[^:]*:[0-9]+: Error: r15 not allowed here -- `usat r15,#1,r0'
[^:]*:[0-9]+: Error: r13 not allowed here -- `usat r0,#1,r13'
[^:]*:[0-9]+: Error: r15 not allowed here -- `usat r0,#1,r15'
-[^:]*:[0-9]+: Error: shift expression is too large -- `usat r1,#1,r3,asr#32'
+[^:]*:[0-9]+: Error: shift expression is too large -- `usat r1,#1,r3,asr ?#32'
[^:]*:[0-9]+: Error: r13 not allowed here -- `usat16 r13,#1,r0'
[^:]*:[0-9]+: Error: r15 not allowed here -- `usat16 r15,#1,r0'
[^:]*:[0-9]+: Error: r13 not allowed here -- `usat16 r0,#1,r13'