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struct _i386_insn @@ -5359,6 +5360,9 @@ md_assemble (char *line) case invalid_register_operand: err_msg = _("invalid register operand"); break; + case internal_error: + err_msg = _("internal error"); + break; } as_bad (_("%s for `%s'"), err_msg, pass1_mnem ? pass1_mnem : insn_name (current_templates->start)); @@ -7447,6 +7451,33 @@ match_template (char mnem_suffix) continue; } + /* Check whether to use the shorter VEX encoding for certain insns where + the EVEX enconding comes first in the table. This requires the respective + AVX-* feature to be explicitly enabled. */ + if (t == current_templates->start + && t->opcode_modifier.disp8memshift + && !t->opcode_modifier.vex + && !need_evex_encoding () + && t + 1 < current_templates->end + && t[1].opcode_modifier.vex) + { + i386_cpu_flags cpu; + unsigned int memshift = i.memshift; + + i.memshift = 0; + cpu = cpu_flags_and (cpu_flags_from_attr (t[1].cpu), cpu_arch_isa_flags); + if (!cpu_flags_all_zero (&cpu) + && (!i.types[0].bitfield.disp8 + || !operand_type_check (i.types[0], disp) + || i.op[0].disps->X_op != O_constant + || fits_in_disp8 (i.op[0].disps->X_add_number))) + { + specific_error = progress (internal_error); + continue; + } + i.memshift = memshift; + } + /* We've found a match; break out of loop. */ break; } --- a/gas/testsuite/gas/i386/avx-ifma-intel.d +++ b/gas/testsuite/gas/i386/avx-ifma-intel.d @@ -32,6 +32,6 @@ Disassembly of section .text: [ ]*[a-f0-9]+:[ ]*c4 e2 f9 b5 c0[ ]*\{vex\} vpmadd52huq xmm0,xmm0,xmm0 [ ]*[a-f0-9]+:[ ]*c4 e2 fd b5 c0[ ]*\{vex\} vpmadd52huq ymm0,ymm0,ymm0 [ ]*[a-f0-9]+:[ ]*c4 e2 f9 b5 c0[ ]*\{vex\} vpmadd52huq xmm0,xmm0,xmm0 -[ ]*[a-f0-9]+:[ ]*62 f2 dd 08 b5 d2[ ]*vpmadd52huq xmm2,xmm4,xmm2 -[ ]*[a-f0-9]+:[ ]*62 f2 dd 28 b5 d2[ ]*vpmadd52huq ymm2,ymm4,ymm2 +[ ]*[a-f0-9]+:[ ]*c4 e2 d9 b5 d2[ ]*\{vex\} vpmadd52huq xmm2,xmm4,xmm2 +[ ]*[a-f0-9]+:[ ]*c4 e2 dd b5 d2[ ]*\{vex\} vpmadd52huq ymm2,ymm4,ymm2 #pass --- a/gas/testsuite/gas/i386/avx-ifma.d +++ b/gas/testsuite/gas/i386/avx-ifma.d @@ -32,6 +32,6 @@ Disassembly of section .text: [ ]*[a-f0-9]+:[ ]*c4 e2 f9 b5 c0[ ]*\{vex\} vpmadd52huq %xmm0,%xmm0,%xmm0 [ ]*[a-f0-9]+:[ ]*c4 e2 fd b5 c0[ ]*\{vex\} vpmadd52huq %ymm0,%ymm0,%ymm0 [ ]*[a-f0-9]+:[ ]*c4 e2 f9 b5 c0[ ]*\{vex\} vpmadd52huq %xmm0,%xmm0,%xmm0 -[ ]*[a-f0-9]+:[ ]*62 f2 dd 08 b5 d2[ ]*vpmadd52huq %xmm2,%xmm4,%xmm2 -[ ]*[a-f0-9]+:[ ]*62 f2 dd 28 b5 d2[ ]*vpmadd52huq %ymm2,%ymm4,%ymm2 +[ ]*[a-f0-9]+:[ ]*c4 e2 d9 b5 d2[ ]*\{vex\} vpmadd52huq %xmm2,%xmm4,%xmm2 +[ ]*[a-f0-9]+:[ ]*c4 e2 dd b5 d2[ ]*\{vex\} vpmadd52huq %ymm2,%ymm4,%ymm2 #pass --- /dev/null +++ b/gas/testsuite/gas/i386/avx-vex.l @@ -0,0 +1,181 @@ +.*: Assembler messages: +.*:15: Error: .* `vpmadd52luq' +.*:21: Error: .* `vcvtneps2bf16y' +.*:15: Error: .* `vpmadd52luq' +.*:21: Error: .* `vcvtneps2bf16y' +#... +[ ]*[0-9]+[ ]+\.irp isa, default, .* +#... +[ ]*[0-9]+[ ]+\.endr +#... +[ ]*[0-9]+[ ]+> \.arch default +[ ]*[0-9]+[ ]+> \.arch default +[ ]*[0-9]+[ ]+> * +[ ]*[0-9]+[ ]+\?\?\?\? 62F27528 > vpdpbusd %ymm0,%ymm1,%ymm2 +[ ]*[0-9]+[ ]+50D0 +[ ]*[0-9]+[ ]+\?\?\?\? 62F27528 > vpdpbusd 0x20\(%eax\),%ymm1,%ymm2 +[ ]*[0-9]+[ ]+505001 +[ ]*[0-9]+[ ]+\?\?\?\? 62F27528 > vpdpbusd 0x100\(%eax\),%ymm1,%ymm2 +[ ]*[0-9]+[ ]+505008 +[ ]*[0-9]+[ ]+> * +[ ]*[0-9]+[ ]+\?\?\?\? 62F2F528 > vpmadd52luq %ymm0,%ymm1,%ymm2 +[ ]*[0-9]+[ ]+B4D0 +[ ]*[0-9]+[ ]+\?\?\?\? 62F2F528 > vpmadd52luq 0x20\(%eax\),%ymm1,%ymm2 +[ ]*[0-9]+[ ]+B45001 +[ ]*[0-9]+[ ]+\?\?\?\? 62F2F528 > vpmadd52luq 0x100\(%eax\),%ymm1,%ymm2 +[ ]*[0-9]+[ ]+B45008 +[ ]*[0-9]+[ ]+\?\?\?\? 62F2F538 > vpmadd52luq \(%eax\)\{1to4\},%ymm1,%ymm2 +[ ]*[0-9]+[ ]+B410 +[ ]*[0-9]+[ ]+> * +[ ]*[0-9]+[ ]+>.* +[ ]*[0-9]+[ ]+\?\?\?\? 62F27E28 > vcvtneps2bf16y %ymm0,%xmm1 +[ ]*[0-9]+[ ]+72C8 +[ ]*[0-9]+[ ]+\?\?\?\? 62F27E28 > vcvtneps2bf16y 0x20\(%eax\),%xmm1 +[ ]*[0-9]+[ ]+724801 +[ ]*[0-9]+[ ]+\?\?\?\? 62F27E28 > vcvtneps2bf16y 0x100\(%eax\),%xmm1 +[ ]*[0-9]+[ ]+724808 +[ ]*[0-9]+[ ]+\?\?\?\? 62F27E38 > vcvtneps2bf16y \(%eax\)\{1to8\},%xmm1 +[ ]*[0-9]+[ ]+7208 +#... +[ ]*[0-9]+[ ]+> \.arch \.noavx512vl +[ ]*[0-9]+[ ]+> * +[ ]*[0-9]+[ ]+\?\?\?\? C4E27550 > vpdpbusd %ymm0,%ymm1,%ymm2 +[ ]*[0-9]+[ ]+D0 +[ ]*[0-9]+[ ]+\?\?\?\? C4E27550 > vpdpbusd 0x20\(%eax\),%ymm1,%ymm2 +[ ]*[0-9]+[ ]+5020 +[ ]*[0-9]+[ ]+\?\?\?\? C4E27550 > vpdpbusd 0x100\(%eax\),%ymm1,%ymm2 +[ ]*[0-9]+[ ]+90000100 * +[ ]*[0-9]+[ ]+00 +[ ]*[0-9]+[ ]+> * +[ ]*[0-9]+[ ]+\?\?\?\? C4E2F5B4 > vpmadd52luq %ymm0,%ymm1,%ymm2 +[ ]*[0-9]+[ ]+D0 +[ ]*[0-9]+[ ]+\?\?\?\? C4E2F5B4 > vpmadd52luq 0x20\(%eax\),%ymm1,%ymm2 +[ ]*[0-9]+[ ]+5020 +[ ]*[0-9]+[ ]+\?\?\?\? C4E2F5B4 > vpmadd52luq 0x100\(%eax\),%ymm1,%ymm2 +[ ]*[0-9]+[ ]+90000100 * +[ ]*[0-9]+[ ]+00 +[ ]*[0-9]+[ ]+> vpmadd52luq \(%eax\)\{1to4\},%ymm1,%ymm2 +[ ]*[0-9]+[ ]+> * +[ ]*[0-9]+[ ]+>.* +[ ]*[0-9]+[ ]+\?\?\?\? C4E27E72 > vcvtneps2bf16y %ymm0,%xmm1 +[ ]*[0-9]+[ ]+C8 +[ ]*[0-9]+[ ]+\?\?\?\? C4E27E72 > vcvtneps2bf16y 0x20\(%eax\),%xmm1 +[ ]*[0-9]+[ ]+4820 +[ ]*[0-9]+[ ]+\?\?\?\? C4E27E72 > vcvtneps2bf16y 0x100\(%eax\),%xmm1 +[ ]*[0-9]+[ ]+88000100 * +[ ]*[0-9]+[ ]+00 +[ ]*[0-9]+[ ]+> vcvtneps2bf16y \(%eax\)\{1to8\},%xmm1 +#... +[ ]*[0-9]+[ ]+> \.arch \.noavx512f +[ ]*[0-9]+[ ]+> * +[ ]*[0-9]+[ ]+\?\?\?\? C4E27550 > vpdpbusd %ymm0,%ymm1,%ymm2 +[ ]*[0-9]+[ ]+D0 +[ ]*[0-9]+[ ]+\?\?\?\? C4E27550 > vpdpbusd 0x20\(%eax\),%ymm1,%ymm2 +[ ]*[0-9]+[ ]+5020 +[ ]*[0-9]+[ ]+\?\?\?\? C4E27550 > vpdpbusd 0x100\(%eax\),%ymm1,%ymm2 +[ ]*[0-9]+[ ]+90000100 * +[ ]*[0-9]+[ ]+00 +[ ]*[0-9]+[ ]+> * +[ ]*[0-9]+[ ]+\?\?\?\? C4E2F5B4 > vpmadd52luq %ymm0,%ymm1,%ymm2 +[ ]*[0-9]+[ ]+D0 +[ ]*[0-9]+[ ]+\?\?\?\? C4E2F5B4 > vpmadd52luq 0x20\(%eax\),%ymm1,%ymm2 +[ ]*[0-9]+[ ]+5020 +[ ]*[0-9]+[ ]+\?\?\?\? C4E2F5B4 > vpmadd52luq 0x100\(%eax\),%ymm1,%ymm2 +[ ]*[0-9]+[ ]+90000100 * +[ ]*[0-9]+[ ]+00 +[ ]*[0-9]+[ ]+> vpmadd52luq \(%eax\)\{1to4\},%ymm1,%ymm2 +[ ]*[0-9]+[ ]+> * +[ ]*[0-9]+[ ]+>.* +[ ]*[0-9]+[ ]+\?\?\?\? C4E27E72 > vcvtneps2bf16y %ymm0,%xmm1 +[ ]*[0-9]+[ ]+C8 +[ ]*[0-9]+[ ]+\?\?\?\? C4E27E72 > vcvtneps2bf16y 0x20\(%eax\),%xmm1 +[ ]*[0-9]+[ ]+4820 +[ ]*[0-9]+[ ]+\?\?\?\? C4E27E72 > vcvtneps2bf16y 0x100\(%eax\),%xmm1 +[ ]*[0-9]+[ ]+88000100 * +[ ]*[0-9]+[ ]+00 +[ ]*[0-9]+[ ]+> vcvtneps2bf16y \(%eax\)\{1to8\},%xmm1 +#... +[ ]*[0-9]+[ ]+> \.arch \.avx_vnni +[ ]*[0-9]+[ ]+> * +[ ]*[0-9]+[ ]+\?\?\?\? C4E27550 > vpdpbusd %ymm0,%ymm1,%ymm2 +[ ]*[0-9]+[ ]+D0 +[ ]*[0-9]+[ ]+\?\?\?\? C4E27550 > vpdpbusd 0x20\(%eax\),%ymm1,%ymm2 +[ ]*[0-9]+[ ]+5020 +[ ]*[0-9]+[ ]+\?\?\?\? 62F27528 > vpdpbusd 0x100\(%eax\),%ymm1,%ymm2 +[ ]*[0-9]+[ ]+505008 +[ ]*[0-9]+[ ]+> * +[ ]*[0-9]+[ ]+\?\?\?\? 62F2F528 > vpmadd52luq %ymm0,%ymm1,%ymm2 +[ ]*[0-9]+[ ]+B4D0 +[ ]*[0-9]+[ ]+\?\?\?\? 62F2F528 > vpmadd52luq 0x20\(%eax\),%ymm1,%ymm2 +[ ]*[0-9]+[ ]+B45001 +[ ]*[0-9]+[ ]+\?\?\?\? 62F2F528 > vpmadd52luq 0x100\(%eax\),%ymm1,%ymm2 +[ ]*[0-9]+[ ]+B45008 +[ ]*[0-9]+[ ]+\?\?\?\? 62F2F538 > vpmadd52luq \(%eax\)\{1to4\},%ymm1,%ymm2 +[ ]*[0-9]+[ ]+B410 +[ ]*[0-9]+[ ]+> * +[ ]*[0-9]+[ ]+>.* +[ ]*[0-9]+[ ]+\?\?\?\? 62F27E28 > vcvtneps2bf16y %ymm0,%xmm1 +[ ]*[0-9]+[ ]+72C8 +[ ]*[0-9]+[ ]+\?\?\?\? 62F27E28 > vcvtneps2bf16y 0x20\(%eax\),%xmm1 +[ ]*[0-9]+[ ]+724801 +[ ]*[0-9]+[ ]+\?\?\?\? 62F27E28 > vcvtneps2bf16y 0x100\(%eax\),%xmm1 +[ ]*[0-9]+[ ]+724808 +[ ]*[0-9]+[ ]+\?\?\?\? 62F27E38 > vcvtneps2bf16y \(%eax\)\{1to8\},%xmm1 +[ ]*[0-9]+[ ]+7208 +#... +[ ]*[0-9]+[ ]+> \.arch \.avx_ifma +[ ]*[0-9]+[ ]+> * +[ ]*[0-9]+[ ]+\?\?\?\? 62F27528 > vpdpbusd %ymm0,%ymm1,%ymm2 +[ ]*[0-9]+[ ]+50D0 +[ ]*[0-9]+[ ]+\?\?\?\? 62F27528 > vpdpbusd 0x20\(%eax\),%ymm1,%ymm2 +[ ]*[0-9]+[ ]+505001 +[ ]*[0-9]+[ ]+\?\?\?\? 62F27528 > vpdpbusd 0x100\(%eax\),%ymm1,%ymm2 +[ ]*[0-9]+[ ]+505008 +[ ]*[0-9]+[ ]+> * +[ ]*[0-9]+[ ]+\?\?\?\? C4E2F5B4 > vpmadd52luq %ymm0,%ymm1,%ymm2 +[ ]*[0-9]+[ ]+D0 +[ ]*[0-9]+[ ]+\?\?\?\? C4E2F5B4 > vpmadd52luq 0x20\(%eax\),%ymm1,%ymm2 +[ ]*[0-9]+[ ]+5020 +[ ]*[0-9]+[ ]+\?\?\?\? 62F2F528 > vpmadd52luq 0x100\(%eax\),%ymm1,%ymm2 +[ ]*[0-9]+[ ]+B45008 +[ ]*[0-9]+[ ]+\?\?\?\? 62F2F538 > vpmadd52luq \(%eax\)\{1to4\},%ymm1,%ymm2 +[ ]*[0-9]+[ ]+B410 +[ ]*[0-9]+[ ]+> * +[ ]*[0-9]+[ ]+>.* +[ ]*[0-9]+[ ]+\?\?\?\? 62F27E28 > vcvtneps2bf16y %ymm0,%xmm1 +[ ]*[0-9]+[ ]+72C8 +[ ]*[0-9]+[ ]+\?\?\?\? 62F27E28 > vcvtneps2bf16y 0x20\(%eax\),%xmm1 +[ ]*[0-9]+[ ]+724801 +[ ]*[0-9]+[ ]+\?\?\?\? 62F27E28 > vcvtneps2bf16y 0x100\(%eax\),%xmm1 +[ ]*[0-9]+[ ]+724808 +[ ]*[0-9]+[ ]+\?\?\?\? 62F27E38 > vcvtneps2bf16y \(%eax\)\{1to8\},%xmm1 +[ ]*[0-9]+[ ]+7208 +#... +[ ]*[0-9]+[ ]+> \.arch \.avx_ne_convert +[ ]*[0-9]+[ ]+> * +[ ]*[0-9]+[ ]+\?\?\?\? 62F27528 > vpdpbusd %ymm0,%ymm1,%ymm2 +[ ]*[0-9]+[ ]+50D0 +[ ]*[0-9]+[ ]+\?\?\?\? 62F27528 > vpdpbusd 0x20\(%eax\),%ymm1,%ymm2 +[ ]*[0-9]+[ ]+505001 +[ ]*[0-9]+[ ]+\?\?\?\? 62F27528 > vpdpbusd 0x100\(%eax\),%ymm1,%ymm2 +[ ]*[0-9]+[ ]+505008 +[ ]*[0-9]+[ ]+> * +[ ]*[0-9]+[ ]+\?\?\?\? 62F2F528 > vpmadd52luq %ymm0,%ymm1,%ymm2 +[ ]*[0-9]+[ ]+B4D0 +[ ]*[0-9]+[ ]+\?\?\?\? 62F2F528 > vpmadd52luq 0x20\(%eax\),%ymm1,%ymm2 +[ ]*[0-9]+[ ]+B45001 +[ ]*[0-9]+[ ]+\?\?\?\? 62F2F528 > vpmadd52luq 0x100\(%eax\),%ymm1,%ymm2 +[ ]*[0-9]+[ ]+B45008 +[ ]*[0-9]+[ ]+\?\?\?\? 62F2F538 > vpmadd52luq \(%eax\)\{1to4\},%ymm1,%ymm2 +[ ]*[0-9]+[ ]+B410 +[ ]*[0-9]+[ ]+> * +[ ]*[0-9]+[ ]+>.* +[ ]*[0-9]+[ ]+\?\?\?\? C4E27E72 > vcvtneps2bf16y %ymm0,%xmm1 +[ ]*[0-9]+[ ]+C8 +[ ]*[0-9]+[ ]+\?\?\?\? C4E27E72 > vcvtneps2bf16y 0x20\(%eax\),%xmm1 +[ ]*[0-9]+[ ]+4820 +[ ]*[0-9]+[ ]+\?\?\?\? 62F27E28 > vcvtneps2bf16y 0x100\(%eax\),%xmm1 +[ ]*[0-9]+[ ]+724808 +[ ]*[0-9]+[ ]+\?\?\?\? 62F27E38 > vcvtneps2bf16y \(%eax\)\{1to8\},%xmm1 +[ ]*[0-9]+[ ]+7208 +#pass --- /dev/null +++ b/gas/testsuite/gas/i386/avx-vex.s @@ -0,0 +1,23 @@ + .text + + .irp isa, default, .noavx512vl, .noavx512f, .avx_vnni, .avx_ifma, .avx_ne_convert + + .arch default + .arch \isa + + vpdpbusd %ymm0, %ymm1, %ymm2 + vpdpbusd 0x20(%eax), %ymm1, %ymm2 + vpdpbusd 0x100(%eax), %ymm1, %ymm2 + + vpmadd52luq %ymm0, %ymm1, %ymm2 + vpmadd52luq 0x20(%eax), %ymm1, %ymm2 + vpmadd52luq 0x100(%eax), %ymm1, %ymm2 + vpmadd52luq (%eax){1to4}, %ymm1, %ymm2 + +# vcvtneps2bf16 %ymm0, %xmm1 + vcvtneps2bf16y %ymm0, %xmm1 + vcvtneps2bf16y 0x20(%eax), %xmm1 + vcvtneps2bf16y 0x100(%eax), %xmm1 + vcvtneps2bf16y (%eax){1to8}, %xmm1 + + .endr --- a/gas/testsuite/gas/i386/avx-vnni.d +++ b/gas/testsuite/gas/i386/avx-vnni.d @@ -38,6 +38,6 @@ Disassembly of section .text: +[a-f0-9]+: c4 e2 79 50 c0 \{vex\} vpdpbusd %xmm0,%xmm0,%xmm0 +[a-f0-9]+: c4 e2 7d 50 c0 \{vex\} vpdpbusd %ymm0,%ymm0,%ymm0 +[a-f0-9]+: c4 e2 79 50 c0 \{vex\} vpdpbusd %xmm0,%xmm0,%xmm0 - +[a-f0-9]+: 62 f2 5d 08 50 d2 vpdpbusd %xmm2,%xmm4,%xmm2 + +[a-f0-9]+: c4 e2 59 50 d2 \{vex\} vpdpbusd %xmm2,%xmm4,%xmm2 +[a-f0-9]+: c4 e2 59 50 91 f0 07 00 00 \{vex\} vpdpbusd 0x7f0\(%ecx\),%xmm4,%xmm2 #pass --- a/gas/testsuite/gas/i386/i386.exp +++ b/gas/testsuite/gas/i386/i386.exp @@ -495,6 +495,7 @@ if [gas_32_check] then { run_list_test "msrlist-inval" run_dump_test "avx-ne-convert" run_dump_test "avx-ne-convert-intel" + run_list_test "avx-vex" "-almn" run_dump_test "raoint" run_dump_test "raoint-intel" run_list_test "amx-complex-inval" --- a/gas/testsuite/gas/i386/x86-64-avx-ifma-intel.d +++ b/gas/testsuite/gas/i386/x86-64-avx-ifma-intel.d @@ -29,6 +29,6 @@ Disassembly of section .text: [ ]*[a-f0-9]+:[ ]*c4 c2 dd b4 d4[ ]*\{vex\} vpmadd52luq ymm2,ymm4,ymm12 [ ]*[a-f0-9]+:[ ]*c4 e2 dd b4 11[ ]*\{vex\} vpmadd52luq ymm2,ymm4,YMMWORD PTR \[rcx\] [ ]*[a-f0-9]+:[ ]*62 b2 dd 28 b4 d6[ ]*vpmadd52luq ymm2,ymm4,ymm22 -[ ]*[a-f0-9]+:[ ]*62 d2 dd 08 b5 d4[ ]*vpmadd52huq xmm2,xmm4,xmm12 -[ ]*[a-f0-9]+:[ ]*62 d2 dd 28 b5 d4[ ]*vpmadd52huq ymm2,ymm4,ymm12 +[ ]*[a-f0-9]+:[ ]*c4 c2 d9 b5 d4[ ]*\{vex\} vpmadd52huq xmm2,xmm4,xmm12 +[ ]*[a-f0-9]+:[ ]*c4 c2 dd b5 d4[ ]*\{vex\} vpmadd52huq ymm2,ymm4,ymm12 #pass --- a/gas/testsuite/gas/i386/x86-64-avx-ifma.d +++ b/gas/testsuite/gas/i386/x86-64-avx-ifma.d @@ -29,6 +29,6 @@ Disassembly of section .text: [ ]*[a-f0-9]+:[ ]*c4 c2 dd b4 d4[ ]*\{vex\} vpmadd52luq %ymm12,%ymm4,%ymm2 [ ]*[a-f0-9]+:[ ]*c4 e2 dd b4 11[ ]*\{vex\} vpmadd52luq \(%rcx\),%ymm4,%ymm2 [ ]*[a-f0-9]+:[ ]*62 b2 dd 28 b4 d6[ ]*vpmadd52luq %ymm22,%ymm4,%ymm2 -[ ]*[a-f0-9]+:[ ]*62 d2 dd 08 b5 d4[ ]*vpmadd52huq %xmm12,%xmm4,%xmm2 -[ ]*[a-f0-9]+:[ ]*62 d2 dd 28 b5 d4[ ]*vpmadd52huq %ymm12,%ymm4,%ymm2 +[ ]*[a-f0-9]+:[ ]*c4 c2 d9 b5 d4[ ]*\{vex\} vpmadd52huq %xmm12,%xmm4,%xmm2 +[ ]*[a-f0-9]+:[ ]*c4 c2 dd b5 d4[ ]*\{vex\} vpmadd52huq %ymm12,%ymm4,%ymm2 #pass --- a/gas/testsuite/gas/i386/x86-64-avx-vnni.d +++ b/gas/testsuite/gas/i386/x86-64-avx-vnni.d @@ -35,6 +35,6 @@ Disassembly of section .text: +[a-f0-9]+: c4 e2 59 53 11 \{vex\} vpdpwssds \(%rcx\),%xmm4,%xmm2 +[a-f0-9]+: c4 e2 59 53 11 \{vex\} vpdpwssds \(%rcx\),%xmm4,%xmm2 +[a-f0-9]+: 62 b2 5d 08 53 d6 vpdpwssds %xmm22,%xmm4,%xmm2 - +[a-f0-9]+: 62 d2 5d 08 50 d4 vpdpbusd %xmm12,%xmm4,%xmm2 + +[a-f0-9]+: c4 c2 59 50 d4 \{vex\} vpdpbusd %xmm12,%xmm4,%xmm2 +[a-f0-9]+: c4 e2 59 50 91 f0 07 00 00 \{vex\} vpdpbusd 0x7f0\(%rcx\),%xmm4,%xmm2 #pass