diff mbox series

[v2,01/16] RISC-V: rename operand descriptor O4

Message ID	25ba2a4c-a254-4276-b03a-aae99d5b9eb1@suse.com
State	New
Headers	DMARC-Filter: OpenDMARC Filter v1.4.2 sourceware.org 028484BBC0BC Message-ID: <25ba2a4c-a254-4276-b03a-aae99d5b9eb1@suse.com> Date: Fri, 15 May 2026 15:28:49 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: [PATCH v2 01/16] RISC-V: rename operand descriptor O4 From: Jan Beulich <jbeulich@suse.com> To: Binutils <binutils@sourceware.org> Cc: Palmer Dabbelt <palmer@dabbelt.com>, Andrew Waterman <andrew@sifive.com>, Jim Wilson <jim.wilson.gcc@gmail.com>, Nelson Chu <nelson.chu1990@gmail.com>, jiawei <jiawei@iscas.ac.cn> References: <c32643f7-c8b2-4a0e-9eeb-4ba00369b147@suse.com> Content-Language: en-US Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <c32643f7-c8b2-4a0e-9eeb-4ba00369b147@suse.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit Precedence: list Errors-To: binutils-bounces~patchwork=sourceware.org@sourceware.org
Series	RISC-V: assorted fixes and (hopefully) improvements \| [v2,00/16] RISC-V: assorted fixes and (hopefully) improvements [v2,01/16] RISC-V: rename operand descriptor O4 [v2,02/16] RISC-V: fold redundant code in riscv_ip() [v2,03/16] RISC-V: add dedicated vector arithmetic .insn forms [v2,04/16] RISC-V: match_*() improvements [v2,05/16] RISC-V: EEW64 checking [v2,06/16] bfd/RISC-V: Zvfbfwma implies Zvfbfmin [v2,07/16] RISC-V: drop FCVT.Q.L{,U} forms with rounding mode operand [v2,08/16] RISC-V: make FP rounding mode an optional argument [v2,09/16] RISC-V: check operands for Zdinx in RV32 [v2,10/16] RISC-V: riscv_set_arch() can fail [v2,11/16] RISC-V: riscv_parse_subset_t's isa_spec is only parser input [v2,12/16] RISC-V: error handling for subset parsing [v2,13/16] RISC-V: avoid buffer underrun in subset parsing [v2,14/16] RISC-V: drop dead code from subset parsing [v2,15/16] bfd/RISC-V: move _bfd_riscv_elf_merge_private_bfd_data() [v2,16/16] RISC-V/gas: .attribute vs .insn [v2,17/16] RISC-V: warn about non-boolean unaligned-access attribute [v2,18/16] RISC-V: warn about non-power-of-2 stack-align attribute [v2,19/16] RISC-V: check operands for Zqinx

Checks

Context	Check	Description
linaro-tcwg-bot/tcwg_binutils_build--master-arm	success	Build passed
linaro-tcwg-bot/tcwg_binutils_build--master-aarch64	success	Build passed
linaro-tcwg-bot/tcwg_binutils_check--master-aarch64	success	Test passed
linaro-tcwg-bot/tcwg_binutils_check--master-arm	success	Test passed

Commit Message

Jan Beulich May 15, 2026, 1:28 p.m. UTC

  It's describing a 7-bit field, so O7 is the more consistent (with other
O<n> and F<n>) name. This way a subsequent change will also be a little
easier.
---
v2: New.

Comments

Jiawei May 15, 2026, 3:50 p.m. UTC | #1

> It's describing a 7-bit field, so O7 is the more consistent (with other
> O<n> and F<n>) name. This way a subsequent change will also be a little
> easier.
> ---
> v2: New.
>
> --- a/gas/config/tc-riscv.c
> +++ b/gas/config/tc-riscv.c
> @@ -1620,7 +1620,7 @@ validate_riscv_insn (const struct riscv_
>   	case 'O': /* Opcode for .insn directive.  */
>   	  switch (*++oparg)
>   	    {
> -	    case '4': USE_BITS (OP_MASK_OP, OP_SH_OP); break;
> +	    case '7': USE_BITS (OP_MASK_OP, OP_SH_OP); break;
>   	    case '2': USE_BITS (OP_MASK_OP2, OP_SH_OP2); break;
>   	    default:
>   	      goto unknown_validate_operand;
> @@ -3711,7 +3711,7 @@ riscv_ip (char *str, struct riscv_cl_ins
>   	    case 'O':
>   	      switch (*++oparg)
>   		{
> -		case '4':
> +		case '7':
>   		  if (my_getOpcodeExpression (imm_expr, imm_reloc, asarg)
>   		      || imm_expr->X_op != O_constant
>   		      || imm_expr->X_add_number < 0
LGTM.

Renaming O4 to O7 looks right to me.  The operand describes the full 7-bit
opcode field, so O7 is more consistent with the other O<n>/F<n> operand
names and avoids the temporary regno == 4 special case in the following
cleanup.
> --- a/opcodes/riscv-opc.c
> +++ b/opcodes/riscv-opc.c
> @@ -3587,74 +3587,74 @@ const struct riscv_opcode riscv_opcodes[
>   const struct riscv_opcode riscv_insn_types[] =
>   {
>   /* name, xlen, isa, operands, match, mask, match_func, pinfo.  */
> -{"r",       0, INSN_CLASS_I,       "O4,F3,F7,d,s,t",    0, 0, NULL, 0 },
> -{"r",       0, INSN_CLASS_F,       "O4,F3,F7,D,s,t",    0, 0, NULL, 0 },
> -{"r",       0, INSN_CLASS_F,       "O4,F3,F7,d,S,t",    0, 0, NULL, 0 },
> -{"r",       0, INSN_CLASS_F,       "O4,F3,F7,D,S,t",    0, 0, NULL, 0 },
> -{"r",       0, INSN_CLASS_F,       "O4,F3,F7,d,s,T",    0, 0, NULL, 0 },
> -{"r",       0, INSN_CLASS_F,       "O4,F3,F7,D,s,T",    0, 0, NULL, 0 },
> -{"r",       0, INSN_CLASS_F,       "O4,F3,F7,d,S,T",    0, 0, NULL, 0 },
> -{"r",       0, INSN_CLASS_F,       "O4,F3,F7,D,S,T",    0, 0, NULL, 0 },
> -{"r",       0, INSN_CLASS_I,       "O4,F3,F2,d,s,t,r",  0, 0, NULL, 0 },
> -{"r",       0, INSN_CLASS_F,       "O4,F3,F2,D,s,t,r",  0, 0, NULL, 0 },
> -{"r",       0, INSN_CLASS_F,       "O4,F3,F2,d,S,t,r",  0, 0, NULL, 0 },
> -{"r",       0, INSN_CLASS_F,       "O4,F3,F2,D,S,t,r",  0, 0, NULL, 0 },
> -{"r",       0, INSN_CLASS_F,       "O4,F3,F2,d,s,T,r",  0, 0, NULL, 0 },
> -{"r",       0, INSN_CLASS_F,       "O4,F3,F2,D,s,T,r",  0, 0, NULL, 0 },
> -{"r",       0, INSN_CLASS_F,       "O4,F3,F2,d,S,T,r",  0, 0, NULL, 0 },
> -{"r",       0, INSN_CLASS_F,       "O4,F3,F2,D,S,T,r",  0, 0, NULL, 0 },
> -{"r",       0, INSN_CLASS_F,       "O4,F3,F2,d,s,t,R",  0, 0, NULL, 0 },
> -{"r",       0, INSN_CLASS_F,       "O4,F3,F2,D,s,t,R",  0, 0, NULL, 0 },
> -{"r",       0, INSN_CLASS_F,       "O4,F3,F2,d,S,t,R",  0, 0, NULL, 0 },
> -{"r",       0, INSN_CLASS_F,       "O4,F3,F2,D,S,t,R",  0, 0, NULL, 0 },
> -{"r",       0, INSN_CLASS_F,       "O4,F3,F2,d,s,T,R",  0, 0, NULL, 0 },
> -{"r",       0, INSN_CLASS_F,       "O4,F3,F2,D,s,T,R",  0, 0, NULL, 0 },
> -{"r",       0, INSN_CLASS_F,       "O4,F3,F2,d,S,T,R",  0, 0, NULL, 0 },
> -{"r",       0, INSN_CLASS_F,       "O4,F3,F2,D,S,T,R",  0, 0, NULL, 0 },
> -
> -{"r4",      0, INSN_CLASS_I,       "O4,F3,F2,d,s,t,r",  0, 0, NULL, 0 },
> -{"r4",      0, INSN_CLASS_F,       "O4,F3,F2,D,s,t,r",  0, 0, NULL, 0 },
> -{"r4",      0, INSN_CLASS_F,       "O4,F3,F2,d,S,t,r",  0, 0, NULL, 0 },
> -{"r4",      0, INSN_CLASS_F,       "O4,F3,F2,D,S,t,r",  0, 0, NULL, 0 },
> -{"r4",      0, INSN_CLASS_F,       "O4,F3,F2,d,s,T,r",  0, 0, NULL, 0 },
> -{"r4",      0, INSN_CLASS_F,       "O4,F3,F2,D,s,T,r",  0, 0, NULL, 0 },
> -{"r4",      0, INSN_CLASS_F,       "O4,F3,F2,d,S,T,r",  0, 0, NULL, 0 },
> -{"r4",      0, INSN_CLASS_F,       "O4,F3,F2,D,S,T,r",  0, 0, NULL, 0 },
> -{"r4",      0, INSN_CLASS_F,       "O4,F3,F2,d,s,t,R",  0, 0, NULL, 0 },
> -{"r4",      0, INSN_CLASS_F,       "O4,F3,F2,D,s,t,R",  0, 0, NULL, 0 },
> -{"r4",      0, INSN_CLASS_F,       "O4,F3,F2,d,S,t,R",  0, 0, NULL, 0 },
> -{"r4",      0, INSN_CLASS_F,       "O4,F3,F2,D,S,t,R",  0, 0, NULL, 0 },
> -{"r4",      0, INSN_CLASS_F,       "O4,F3,F2,d,s,T,R",  0, 0, NULL, 0 },
> -{"r4",      0, INSN_CLASS_F,       "O4,F3,F2,D,s,T,R",  0, 0, NULL, 0 },
> -{"r4",      0, INSN_CLASS_F,       "O4,F3,F2,d,S,T,R",  0, 0, NULL, 0 },
> -{"r4",      0, INSN_CLASS_F,       "O4,F3,F2,D,S,T,R",  0, 0, NULL, 0 },
> -
> -{"i",       0, INSN_CLASS_I,       "O4,F3,d,s,j",       0, 0, NULL, 0 },
> -{"i",       0, INSN_CLASS_F,       "O4,F3,D,s,j",       0, 0, NULL, 0 },
> -{"i",       0, INSN_CLASS_F,       "O4,F3,d,S,j",       0, 0, NULL, 0 },
> -{"i",       0, INSN_CLASS_F,       "O4,F3,D,S,j",       0, 0, NULL, 0 },
> -{"i",       0, INSN_CLASS_I,       "O4,F3,d,o(s)",      0, 0, NULL, 0 },
> -{"i",       0, INSN_CLASS_F,       "O4,F3,D,o(s)",      0, 0, NULL, 0 },
> -
> -{"s",       0, INSN_CLASS_I,       "O4,F3,t,q(s)",      0, 0, NULL, 0 },
> -{"s",       0, INSN_CLASS_F,       "O4,F3,T,q(s)",      0, 0, NULL, 0 },
> -
> -{"sb",      0, INSN_CLASS_I,       "O4,F3,s,t,p",       0, 0, NULL, 0 },
> -{"sb",      0, INSN_CLASS_F,       "O4,F3,S,t,p",       0, 0, NULL, 0 },
> -{"sb",      0, INSN_CLASS_F,       "O4,F3,s,T,p",       0, 0, NULL, 0 },
> -{"sb",      0, INSN_CLASS_F,       "O4,F3,S,T,p",       0, 0, NULL, 0 },
> -{"b",       0, INSN_CLASS_I,       "O4,F3,s,t,p",       0, 0, NULL, 0 },
> -{"b",       0, INSN_CLASS_F,       "O4,F3,S,t,p",       0, 0, NULL, 0 },
> -{"b",       0, INSN_CLASS_F,       "O4,F3,s,T,p",       0, 0, NULL, 0 },
> -{"b",       0, INSN_CLASS_F,       "O4,F3,S,T,p",       0, 0, NULL, 0 },
> -
> -{"u",       0, INSN_CLASS_I,       "O4,d,u",            0, 0, NULL, 0 },
> -{"u",       0, INSN_CLASS_F,       "O4,D,u",            0, 0, NULL, 0 },
> -
> -{"uj",      0, INSN_CLASS_I,       "O4,d,a",            0, 0, NULL, 0 },
> -{"uj",      0, INSN_CLASS_F,       "O4,D,a",            0, 0, NULL, 0 },
> -{"j",       0, INSN_CLASS_I,       "O4,d,a",            0, 0, NULL, 0 },
> -{"j",       0, INSN_CLASS_F,       "O4,D,a",            0, 0, NULL, 0 },
> +{"r",       0, INSN_CLASS_I,       "O7,F3,F7,d,s,t",    0, 0, NULL, 0 },
> +{"r",       0, INSN_CLASS_F,       "O7,F3,F7,D,s,t",    0, 0, NULL, 0 },
> +{"r",       0, INSN_CLASS_F,       "O7,F3,F7,d,S,t",    0, 0, NULL, 0 },
> +{"r",       0, INSN_CLASS_F,       "O7,F3,F7,D,S,t",    0, 0, NULL, 0 },
> +{"r",       0, INSN_CLASS_F,       "O7,F3,F7,d,s,T",    0, 0, NULL, 0 },
> +{"r",       0, INSN_CLASS_F,       "O7,F3,F7,D,s,T",    0, 0, NULL, 0 },
> +{"r",       0, INSN_CLASS_F,       "O7,F3,F7,d,S,T",    0, 0, NULL, 0 },
> +{"r",       0, INSN_CLASS_F,       "O7,F3,F7,D,S,T",    0, 0, NULL, 0 },
> +{"r",       0, INSN_CLASS_I,       "O7,F3,F2,d,s,t,r",  0, 0, NULL, 0 },
> +{"r",       0, INSN_CLASS_F,       "O7,F3,F2,D,s,t,r",  0, 0, NULL, 0 },
> +{"r",       0, INSN_CLASS_F,       "O7,F3,F2,d,S,t,r",  0, 0, NULL, 0 },
> +{"r",       0, INSN_CLASS_F,       "O7,F3,F2,D,S,t,r",  0, 0, NULL, 0 },
> +{"r",       0, INSN_CLASS_F,       "O7,F3,F2,d,s,T,r",  0, 0, NULL, 0 },
> +{"r",       0, INSN_CLASS_F,       "O7,F3,F2,D,s,T,r",  0, 0, NULL, 0 },
> +{"r",       0, INSN_CLASS_F,       "O7,F3,F2,d,S,T,r",  0, 0, NULL, 0 },
> +{"r",       0, INSN_CLASS_F,       "O7,F3,F2,D,S,T,r",  0, 0, NULL, 0 },
> +{"r",       0, INSN_CLASS_F,       "O7,F3,F2,d,s,t,R",  0, 0, NULL, 0 },
> +{"r",       0, INSN_CLASS_F,       "O7,F3,F2,D,s,t,R",  0, 0, NULL, 0 },
> +{"r",       0, INSN_CLASS_F,       "O7,F3,F2,d,S,t,R",  0, 0, NULL, 0 },
> +{"r",       0, INSN_CLASS_F,       "O7,F3,F2,D,S,t,R",  0, 0, NULL, 0 },
> +{"r",       0, INSN_CLASS_F,       "O7,F3,F2,d,s,T,R",  0, 0, NULL, 0 },
> +{"r",       0, INSN_CLASS_F,       "O7,F3,F2,D,s,T,R",  0, 0, NULL, 0 },
> +{"r",       0, INSN_CLASS_F,       "O7,F3,F2,d,S,T,R",  0, 0, NULL, 0 },
> +{"r",       0, INSN_CLASS_F,       "O7,F3,F2,D,S,T,R",  0, 0, NULL, 0 },
> +
> +{"r4",      0, INSN_CLASS_I,       "O7,F3,F2,d,s,t,r",  0, 0, NULL, 0 },
> +{"r4",      0, INSN_CLASS_F,       "O7,F3,F2,D,s,t,r",  0, 0, NULL, 0 },
> +{"r4",      0, INSN_CLASS_F,       "O7,F3,F2,d,S,t,r",  0, 0, NULL, 0 },
> +{"r4",      0, INSN_CLASS_F,       "O7,F3,F2,D,S,t,r",  0, 0, NULL, 0 },
> +{"r4",      0, INSN_CLASS_F,       "O7,F3,F2,d,s,T,r",  0, 0, NULL, 0 },
> +{"r4",      0, INSN_CLASS_F,       "O7,F3,F2,D,s,T,r",  0, 0, NULL, 0 },
> +{"r4",      0, INSN_CLASS_F,       "O7,F3,F2,d,S,T,r",  0, 0, NULL, 0 },
> +{"r4",      0, INSN_CLASS_F,       "O7,F3,F2,D,S,T,r",  0, 0, NULL, 0 },
> +{"r4",      0, INSN_CLASS_F,       "O7,F3,F2,d,s,t,R",  0, 0, NULL, 0 },
> +{"r4",      0, INSN_CLASS_F,       "O7,F3,F2,D,s,t,R",  0, 0, NULL, 0 },
> +{"r4",      0, INSN_CLASS_F,       "O7,F3,F2,d,S,t,R",  0, 0, NULL, 0 },
> +{"r4",      0, INSN_CLASS_F,       "O7,F3,F2,D,S,t,R",  0, 0, NULL, 0 },
> +{"r4",      0, INSN_CLASS_F,       "O7,F3,F2,d,s,T,R",  0, 0, NULL, 0 },
> +{"r4",      0, INSN_CLASS_F,       "O7,F3,F2,D,s,T,R",  0, 0, NULL, 0 },
> +{"r4",      0, INSN_CLASS_F,       "O7,F3,F2,d,S,T,R",  0, 0, NULL, 0 },
> +{"r4",      0, INSN_CLASS_F,       "O7,F3,F2,D,S,T,R",  0, 0, NULL, 0 },
> +
> +{"i",       0, INSN_CLASS_I,       "O7,F3,d,s,j",       0, 0, NULL, 0 },
> +{"i",       0, INSN_CLASS_F,       "O7,F3,D,s,j",       0, 0, NULL, 0 },
> +{"i",       0, INSN_CLASS_F,       "O7,F3,d,S,j",       0, 0, NULL, 0 },
> +{"i",       0, INSN_CLASS_F,       "O7,F3,D,S,j",       0, 0, NULL, 0 },
> +{"i",       0, INSN_CLASS_I,       "O7,F3,d,o(s)",      0, 0, NULL, 0 },
> +{"i",       0, INSN_CLASS_F,       "O7,F3,D,o(s)",      0, 0, NULL, 0 },
> +
> +{"s",       0, INSN_CLASS_I,       "O7,F3,t,q(s)",      0, 0, NULL, 0 },
> +{"s",       0, INSN_CLASS_F,       "O7,F3,T,q(s)",      0, 0, NULL, 0 },
> +
> +{"sb",      0, INSN_CLASS_I,       "O7,F3,s,t,p",       0, 0, NULL, 0 },
> +{"sb",      0, INSN_CLASS_F,       "O7,F3,S,t,p",       0, 0, NULL, 0 },
> +{"sb",      0, INSN_CLASS_F,       "O7,F3,s,T,p",       0, 0, NULL, 0 },
> +{"sb",      0, INSN_CLASS_F,       "O7,F3,S,T,p",       0, 0, NULL, 0 },
> +{"b",       0, INSN_CLASS_I,       "O7,F3,s,t,p",       0, 0, NULL, 0 },
> +{"b",       0, INSN_CLASS_F,       "O7,F3,S,t,p",       0, 0, NULL, 0 },
> +{"b",       0, INSN_CLASS_F,       "O7,F3,s,T,p",       0, 0, NULL, 0 },
> +{"b",       0, INSN_CLASS_F,       "O7,F3,S,T,p",       0, 0, NULL, 0 },
> +
> +{"u",       0, INSN_CLASS_I,       "O7,d,u",            0, 0, NULL, 0 },
> +{"u",       0, INSN_CLASS_F,       "O7,D,u",            0, 0, NULL, 0 },
> +
> +{"uj",      0, INSN_CLASS_I,       "O7,d,a",            0, 0, NULL, 0 },
> +{"uj",      0, INSN_CLASS_F,       "O7,D,a",            0, 0, NULL, 0 },
> +{"j",       0, INSN_CLASS_I,       "O7,d,a",            0, 0, NULL, 0 },
> +{"j",       0, INSN_CLASS_F,       "O7,D,a",            0, 0, NULL, 0 },
>   
>   {"cr",      0, INSN_CLASS_ZCA,       "O2,CF4,d,CV",       0, 0, NULL, 0 },
>   {"cr",      0, INSN_CLASS_ZCF, "O2,CF4,D,CV",       0, 0, NULL, 0 },

Reviewed-by: Jiawei <jiawei@iscas.ac.cn>

diff mbox series

Patch

--- a/gas/config/tc-riscv.c
+++ b/gas/config/tc-riscv.c
@@ -1620,7 +1620,7 @@  validate_riscv_insn (const struct riscv_
 	case 'O': /* Opcode for .insn directive.  */
 	  switch (*++oparg)
 	    {
-	    case '4': USE_BITS (OP_MASK_OP, OP_SH_OP); break;
+	    case '7': USE_BITS (OP_MASK_OP, OP_SH_OP); break;
 	    case '2': USE_BITS (OP_MASK_OP2, OP_SH_OP2); break;
 	    default:
 	      goto unknown_validate_operand;
@@ -3711,7 +3711,7 @@  riscv_ip (char *str, struct riscv_cl_ins
 	    case 'O':
 	      switch (*++oparg)
 		{
-		case '4':
+		case '7':
 		  if (my_getOpcodeExpression (imm_expr, imm_reloc, asarg)
 		      || imm_expr->X_op != O_constant
 		      || imm_expr->X_add_number < 0
--- a/opcodes/riscv-opc.c
+++ b/opcodes/riscv-opc.c
@@ -3587,74 +3587,74 @@  const struct riscv_opcode riscv_opcodes[
 const struct riscv_opcode riscv_insn_types[] =
 {
 /* name, xlen, isa, operands, match, mask, match_func, pinfo.  */
-{"r",       0, INSN_CLASS_I,       "O4,F3,F7,d,s,t",    0, 0, NULL, 0 },
-{"r",       0, INSN_CLASS_F,       "O4,F3,F7,D,s,t",    0, 0, NULL, 0 },
-{"r",       0, INSN_CLASS_F,       "O4,F3,F7,d,S,t",    0, 0, NULL, 0 },
-{"r",       0, INSN_CLASS_F,       "O4,F3,F7,D,S,t",    0, 0, NULL, 0 },
-{"r",       0, INSN_CLASS_F,       "O4,F3,F7,d,s,T",    0, 0, NULL, 0 },
-{"r",       0, INSN_CLASS_F,       "O4,F3,F7,D,s,T",    0, 0, NULL, 0 },
-{"r",       0, INSN_CLASS_F,       "O4,F3,F7,d,S,T",    0, 0, NULL, 0 },
-{"r",       0, INSN_CLASS_F,       "O4,F3,F7,D,S,T",    0, 0, NULL, 0 },
-{"r",       0, INSN_CLASS_I,       "O4,F3,F2,d,s,t,r",  0, 0, NULL, 0 },
-{"r",       0, INSN_CLASS_F,       "O4,F3,F2,D,s,t,r",  0, 0, NULL, 0 },
-{"r",       0, INSN_CLASS_F,       "O4,F3,F2,d,S,t,r",  0, 0, NULL, 0 },
-{"r",       0, INSN_CLASS_F,       "O4,F3,F2,D,S,t,r",  0, 0, NULL, 0 },
-{"r",       0, INSN_CLASS_F,       "O4,F3,F2,d,s,T,r",  0, 0, NULL, 0 },
-{"r",       0, INSN_CLASS_F,       "O4,F3,F2,D,s,T,r",  0, 0, NULL, 0 },
-{"r",       0, INSN_CLASS_F,       "O4,F3,F2,d,S,T,r",  0, 0, NULL, 0 },
-{"r",       0, INSN_CLASS_F,       "O4,F3,F2,D,S,T,r",  0, 0, NULL, 0 },
-{"r",       0, INSN_CLASS_F,       "O4,F3,F2,d,s,t,R",  0, 0, NULL, 0 },
-{"r",       0, INSN_CLASS_F,       "O4,F3,F2,D,s,t,R",  0, 0, NULL, 0 },
-{"r",       0, INSN_CLASS_F,       "O4,F3,F2,d,S,t,R",  0, 0, NULL, 0 },
-{"r",       0, INSN_CLASS_F,       "O4,F3,F2,D,S,t,R",  0, 0, NULL, 0 },
-{"r",       0, INSN_CLASS_F,       "O4,F3,F2,d,s,T,R",  0, 0, NULL, 0 },
-{"r",       0, INSN_CLASS_F,       "O4,F3,F2,D,s,T,R",  0, 0, NULL, 0 },
-{"r",       0, INSN_CLASS_F,       "O4,F3,F2,d,S,T,R",  0, 0, NULL, 0 },
-{"r",       0, INSN_CLASS_F,       "O4,F3,F2,D,S,T,R",  0, 0, NULL, 0 },
-
-{"r4",      0, INSN_CLASS_I,       "O4,F3,F2,d,s,t,r",  0, 0, NULL, 0 },
-{"r4",      0, INSN_CLASS_F,       "O4,F3,F2,D,s,t,r",  0, 0, NULL, 0 },
-{"r4",      0, INSN_CLASS_F,       "O4,F3,F2,d,S,t,r",  0, 0, NULL, 0 },
-{"r4",      0, INSN_CLASS_F,       "O4,F3,F2,D,S,t,r",  0, 0, NULL, 0 },
-{"r4",      0, INSN_CLASS_F,       "O4,F3,F2,d,s,T,r",  0, 0, NULL, 0 },
-{"r4",      0, INSN_CLASS_F,       "O4,F3,F2,D,s,T,r",  0, 0, NULL, 0 },
-{"r4",      0, INSN_CLASS_F,       "O4,F3,F2,d,S,T,r",  0, 0, NULL, 0 },
-{"r4",      0, INSN_CLASS_F,       "O4,F3,F2,D,S,T,r",  0, 0, NULL, 0 },
-{"r4",      0, INSN_CLASS_F,       "O4,F3,F2,d,s,t,R",  0, 0, NULL, 0 },
-{"r4",      0, INSN_CLASS_F,       "O4,F3,F2,D,s,t,R",  0, 0, NULL, 0 },
-{"r4",      0, INSN_CLASS_F,       "O4,F3,F2,d,S,t,R",  0, 0, NULL, 0 },
-{"r4",      0, INSN_CLASS_F,       "O4,F3,F2,D,S,t,R",  0, 0, NULL, 0 },
-{"r4",      0, INSN_CLASS_F,       "O4,F3,F2,d,s,T,R",  0, 0, NULL, 0 },
-{"r4",      0, INSN_CLASS_F,       "O4,F3,F2,D,s,T,R",  0, 0, NULL, 0 },
-{"r4",      0, INSN_CLASS_F,       "O4,F3,F2,d,S,T,R",  0, 0, NULL, 0 },
-{"r4",      0, INSN_CLASS_F,       "O4,F3,F2,D,S,T,R",  0, 0, NULL, 0 },
-
-{"i",       0, INSN_CLASS_I,       "O4,F3,d,s,j",       0, 0, NULL, 0 },
-{"i",       0, INSN_CLASS_F,       "O4,F3,D,s,j",       0, 0, NULL, 0 },
-{"i",       0, INSN_CLASS_F,       "O4,F3,d,S,j",       0, 0, NULL, 0 },
-{"i",       0, INSN_CLASS_F,       "O4,F3,D,S,j",       0, 0, NULL, 0 },
-{"i",       0, INSN_CLASS_I,       "O4,F3,d,o(s)",      0, 0, NULL, 0 },
-{"i",       0, INSN_CLASS_F,       "O4,F3,D,o(s)",      0, 0, NULL, 0 },
-
-{"s",       0, INSN_CLASS_I,       "O4,F3,t,q(s)",      0, 0, NULL, 0 },
-{"s",       0, INSN_CLASS_F,       "O4,F3,T,q(s)",      0, 0, NULL, 0 },
-
-{"sb",      0, INSN_CLASS_I,       "O4,F3,s,t,p",       0, 0, NULL, 0 },
-{"sb",      0, INSN_CLASS_F,       "O4,F3,S,t,p",       0, 0, NULL, 0 },
-{"sb",      0, INSN_CLASS_F,       "O4,F3,s,T,p",       0, 0, NULL, 0 },
-{"sb",      0, INSN_CLASS_F,       "O4,F3,S,T,p",       0, 0, NULL, 0 },
-{"b",       0, INSN_CLASS_I,       "O4,F3,s,t,p",       0, 0, NULL, 0 },
-{"b",       0, INSN_CLASS_F,       "O4,F3,S,t,p",       0, 0, NULL, 0 },
-{"b",       0, INSN_CLASS_F,       "O4,F3,s,T,p",       0, 0, NULL, 0 },
-{"b",       0, INSN_CLASS_F,       "O4,F3,S,T,p",       0, 0, NULL, 0 },
-
-{"u",       0, INSN_CLASS_I,       "O4,d,u",            0, 0, NULL, 0 },
-{"u",       0, INSN_CLASS_F,       "O4,D,u",            0, 0, NULL, 0 },
-
-{"uj",      0, INSN_CLASS_I,       "O4,d,a",            0, 0, NULL, 0 },
-{"uj",      0, INSN_CLASS_F,       "O4,D,a",            0, 0, NULL, 0 },
-{"j",       0, INSN_CLASS_I,       "O4,d,a",            0, 0, NULL, 0 },
-{"j",       0, INSN_CLASS_F,       "O4,D,a",            0, 0, NULL, 0 },
+{"r",       0, INSN_CLASS_I,       "O7,F3,F7,d,s,t",    0, 0, NULL, 0 },
+{"r",       0, INSN_CLASS_F,       "O7,F3,F7,D,s,t",    0, 0, NULL, 0 },
+{"r",       0, INSN_CLASS_F,       "O7,F3,F7,d,S,t",    0, 0, NULL, 0 },
+{"r",       0, INSN_CLASS_F,       "O7,F3,F7,D,S,t",    0, 0, NULL, 0 },
+{"r",       0, INSN_CLASS_F,       "O7,F3,F7,d,s,T",    0, 0, NULL, 0 },
+{"r",       0, INSN_CLASS_F,       "O7,F3,F7,D,s,T",    0, 0, NULL, 0 },
+{"r",       0, INSN_CLASS_F,       "O7,F3,F7,d,S,T",    0, 0, NULL, 0 },
+{"r",       0, INSN_CLASS_F,       "O7,F3,F7,D,S,T",    0, 0, NULL, 0 },
+{"r",       0, INSN_CLASS_I,       "O7,F3,F2,d,s,t,r",  0, 0, NULL, 0 },
+{"r",       0, INSN_CLASS_F,       "O7,F3,F2,D,s,t,r",  0, 0, NULL, 0 },
+{"r",       0, INSN_CLASS_F,       "O7,F3,F2,d,S,t,r",  0, 0, NULL, 0 },
+{"r",       0, INSN_CLASS_F,       "O7,F3,F2,D,S,t,r",  0, 0, NULL, 0 },
+{"r",       0, INSN_CLASS_F,       "O7,F3,F2,d,s,T,r",  0, 0, NULL, 0 },
+{"r",       0, INSN_CLASS_F,       "O7,F3,F2,D,s,T,r",  0, 0, NULL, 0 },
+{"r",       0, INSN_CLASS_F,       "O7,F3,F2,d,S,T,r",  0, 0, NULL, 0 },
+{"r",       0, INSN_CLASS_F,       "O7,F3,F2,D,S,T,r",  0, 0, NULL, 0 },
+{"r",       0, INSN_CLASS_F,       "O7,F3,F2,d,s,t,R",  0, 0, NULL, 0 },
+{"r",       0, INSN_CLASS_F,       "O7,F3,F2,D,s,t,R",  0, 0, NULL, 0 },
+{"r",       0, INSN_CLASS_F,       "O7,F3,F2,d,S,t,R",  0, 0, NULL, 0 },
+{"r",       0, INSN_CLASS_F,       "O7,F3,F2,D,S,t,R",  0, 0, NULL, 0 },
+{"r",       0, INSN_CLASS_F,       "O7,F3,F2,d,s,T,R",  0, 0, NULL, 0 },
+{"r",       0, INSN_CLASS_F,       "O7,F3,F2,D,s,T,R",  0, 0, NULL, 0 },
+{"r",       0, INSN_CLASS_F,       "O7,F3,F2,d,S,T,R",  0, 0, NULL, 0 },
+{"r",       0, INSN_CLASS_F,       "O7,F3,F2,D,S,T,R",  0, 0, NULL, 0 },
+
+{"r4",      0, INSN_CLASS_I,       "O7,F3,F2,d,s,t,r",  0, 0, NULL, 0 },
+{"r4",      0, INSN_CLASS_F,       "O7,F3,F2,D,s,t,r",  0, 0, NULL, 0 },
+{"r4",      0, INSN_CLASS_F,       "O7,F3,F2,d,S,t,r",  0, 0, NULL, 0 },
+{"r4",      0, INSN_CLASS_F,       "O7,F3,F2,D,S,t,r",  0, 0, NULL, 0 },
+{"r4",      0, INSN_CLASS_F,       "O7,F3,F2,d,s,T,r",  0, 0, NULL, 0 },
+{"r4",      0, INSN_CLASS_F,       "O7,F3,F2,D,s,T,r",  0, 0, NULL, 0 },
+{"r4",      0, INSN_CLASS_F,       "O7,F3,F2,d,S,T,r",  0, 0, NULL, 0 },
+{"r4",      0, INSN_CLASS_F,       "O7,F3,F2,D,S,T,r",  0, 0, NULL, 0 },
+{"r4",      0, INSN_CLASS_F,       "O7,F3,F2,d,s,t,R",  0, 0, NULL, 0 },
+{"r4",      0, INSN_CLASS_F,       "O7,F3,F2,D,s,t,R",  0, 0, NULL, 0 },
+{"r4",      0, INSN_CLASS_F,       "O7,F3,F2,d,S,t,R",  0, 0, NULL, 0 },
+{"r4",      0, INSN_CLASS_F,       "O7,F3,F2,D,S,t,R",  0, 0, NULL, 0 },
+{"r4",      0, INSN_CLASS_F,       "O7,F3,F2,d,s,T,R",  0, 0, NULL, 0 },
+{"r4",      0, INSN_CLASS_F,       "O7,F3,F2,D,s,T,R",  0, 0, NULL, 0 },
+{"r4",      0, INSN_CLASS_F,       "O7,F3,F2,d,S,T,R",  0, 0, NULL, 0 },
+{"r4",      0, INSN_CLASS_F,       "O7,F3,F2,D,S,T,R",  0, 0, NULL, 0 },
+
+{"i",       0, INSN_CLASS_I,       "O7,F3,d,s,j",       0, 0, NULL, 0 },
+{"i",       0, INSN_CLASS_F,       "O7,F3,D,s,j",       0, 0, NULL, 0 },
+{"i",       0, INSN_CLASS_F,       "O7,F3,d,S,j",       0, 0, NULL, 0 },
+{"i",       0, INSN_CLASS_F,       "O7,F3,D,S,j",       0, 0, NULL, 0 },
+{"i",       0, INSN_CLASS_I,       "O7,F3,d,o(s)",      0, 0, NULL, 0 },
+{"i",       0, INSN_CLASS_F,       "O7,F3,D,o(s)",      0, 0, NULL, 0 },
+
+{"s",       0, INSN_CLASS_I,       "O7,F3,t,q(s)",      0, 0, NULL, 0 },
+{"s",       0, INSN_CLASS_F,       "O7,F3,T,q(s)",      0, 0, NULL, 0 },
+
+{"sb",      0, INSN_CLASS_I,       "O7,F3,s,t,p",       0, 0, NULL, 0 },
+{"sb",      0, INSN_CLASS_F,       "O7,F3,S,t,p",       0, 0, NULL, 0 },
+{"sb",      0, INSN_CLASS_F,       "O7,F3,s,T,p",       0, 0, NULL, 0 },
+{"sb",      0, INSN_CLASS_F,       "O7,F3,S,T,p",       0, 0, NULL, 0 },
+{"b",       0, INSN_CLASS_I,       "O7,F3,s,t,p",       0, 0, NULL, 0 },
+{"b",       0, INSN_CLASS_F,       "O7,F3,S,t,p",       0, 0, NULL, 0 },
+{"b",       0, INSN_CLASS_F,       "O7,F3,s,T,p",       0, 0, NULL, 0 },
+{"b",       0, INSN_CLASS_F,       "O7,F3,S,T,p",       0, 0, NULL, 0 },
+
+{"u",       0, INSN_CLASS_I,       "O7,d,u",            0, 0, NULL, 0 },
+{"u",       0, INSN_CLASS_F,       "O7,D,u",            0, 0, NULL, 0 },
+
+{"uj",      0, INSN_CLASS_I,       "O7,d,a",            0, 0, NULL, 0 },
+{"uj",      0, INSN_CLASS_F,       "O7,D,a",            0, 0, NULL, 0 },
+{"j",       0, INSN_CLASS_I,       "O7,d,a",            0, 0, NULL, 0 },
+{"j",       0, INSN_CLASS_F,       "O7,D,a",            0, 0, NULL, 0 },
 
 {"cr",      0, INSN_CLASS_ZCA,       "O2,CF4,d,CV",       0, 0, NULL, 0 },
 {"cr",      0, INSN_CLASS_ZCF, "O2,CF4,D,CV",       0, 0, NULL, 0 },