diff mbox series

[17/20] s390: Rename insn format RRR_F0FF to RRF_F0FF

Message ID 20260930081834.2948939-39-jremus@linux.ibm.com
State New
Headers
Series s390: Instruction cleanups |

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Commit Message

Jens Remus Sept. 30, 2026, 8:18 a.m. UTC 
  Former instruction format RRR has been merged into RRF-a since IBM z196.
[1, 2]

[1]: IBM z/Architecture Principles of Operation, SA22-7832-07, IBM z10,
     https://publibfp.dhe.ibm.com/epubs/pdf/dz9zr007.pdf

[2]: IBM z/Architecture Principles of Operation, SA22-7832-08, IBM z196,
     https://publibfp.dhe.ibm.com/epubs/pdf/dz9zr008.pdf

opcodes/
	* s390-opc.c (INSTR_RRR_F0FF, MASK_RRR_F0FF): Rename to
	INSTR_RRF_F0FF and MASK_RRF_F0FF.
	* s390-opc.txt (adtr, ddtr, mdtr, sdtr): Use renamed insn
	format RRF_F0FF.

Signed-off-by: Jens Remus <jremus@linux.ibm.com>
---
 opcodes/s390-opc.c   | 4 ++--
 opcodes/s390-opc.txt | 8 ++++----
 2 files changed, 6 insertions(+), 6 deletions(-)
diff mbox series

Patch

diff --git a/opcodes/s390-opc.c b/opcodes/s390-opc.c
index 3b15c9f95d9f..d5cfca847b52 100644
--- a/opcodes/s390-opc.c
+++ b/opcodes/s390-opc.c
@@ -364,6 +364,7 @@  unused_s390_operands_static_asserts (void)
 #define INSTR_RRF_F0FF2    4, { F_24,F_16,F_28,0,0,0 }           /* e.g. cpsdr */
 #define INSTR_RRF_F0FR     4, { F_24,F_16,R_28,0,0,0 }           /* e.g. iedtr */
 #define INSTR_RRF_FE0FER   4, { FE_24,FE_16,R_28,0,0,0 }         /* e.g. iextr */
+#define INSTR_RRF_F0FF     4, { F_24,F_28,F_16,0,0,0 }           /* e.g. ddtr  */
 #define INSTR_RRF_FUFF     4, { F_24,F_16,F_28,U4_20,0,0 }       /* e.g. didbr */
 #define INSTR_RRF_FEUFEFE  4, { FE_24,FE_16,FE_28,U4_20,0,0 }    /* e.g. qaxtr */
 #define INSTR_RRF_FUFF2    4, { F_24,F_28,F_16,U4_20,0,0 }       /* e.g. adtra */
@@ -408,7 +409,6 @@  unused_s390_operands_static_asserts (void)
 #define INSTR_RR_RERE      2, { RE_8,RE_12,0,0,0,0 }             /* e.g. clcl  */
 #define INSTR_RR_U0        2, { U8_8, 0,0,0,0,0 }                /* e.g. svc   */
 #define INSTR_RR_UR        2, { U4_8,R_12,0,0,0,0 }              /* e.g. bcr   */
-#define INSTR_RRR_F0FF     4, { F_24,F_28,F_16,0,0,0 }           /* e.g. ddtr  */
 #define INSTR_RRR_FE0FEFE  4, { FE_24,FE_28,FE_16,0,0,0 }        /* e.g. axtr  */
 #define INSTR_RRS_RRRDU    6, { R_8,R_12,U4_32,D_20,B_16 }       /* e.g. crb   */
 #define INSTR_RRS_RRRD0    6, { R_8,R_12,D_20,B_16,0 }           /* e.g. crbne */
@@ -599,6 +599,7 @@  unused_s390_operands_static_asserts (void)
 #define MASK_RRF_F0FF2    { 0xff, 0xff, 0x0f, 0x00, 0x00, 0x00 }
 #define MASK_RRF_F0FR     { 0xff, 0xff, 0x0f, 0x00, 0x00, 0x00 }
 #define MASK_RRF_FE0FER   { 0xff, 0xff, 0x0f, 0x00, 0x00, 0x00 }
+#define MASK_RRF_F0FF     { 0xff, 0xff, 0x0f, 0x00, 0x00, 0x00 }
 #define MASK_RRF_FUFF     { 0xff, 0xff, 0x00, 0x00, 0x00, 0x00 }
 #define MASK_RRF_FEUFEFE  { 0xff, 0xff, 0x00, 0x00, 0x00, 0x00 }
 #define MASK_RRF_FUFF2    { 0xff, 0xff, 0x00, 0x00, 0x00, 0x00 }
@@ -643,7 +644,6 @@  unused_s390_operands_static_asserts (void)
 #define MASK_RR_RERE      { 0xff, 0x00, 0x00, 0x00, 0x00, 0x00 }
 #define MASK_RR_U0        { 0xff, 0x00, 0x00, 0x00, 0x00, 0x00 }
 #define MASK_RR_UR        { 0xff, 0x00, 0x00, 0x00, 0x00, 0x00 }
-#define MASK_RRR_F0FF     { 0xff, 0xff, 0x0f, 0x00, 0x00, 0x00 }
 #define MASK_RRR_FE0FEFE  { 0xff, 0xff, 0x0f, 0x00, 0x00, 0x00 }
 #define MASK_RRS_RRRDU    { 0xff, 0x00, 0x00, 0x00, 0x0f, 0xff }
 #define MASK_RRS_RRRD0    { 0xff, 0x00, 0x00, 0x00, 0xff, 0xff }
diff --git a/opcodes/s390-opc.txt b/opcodes/s390-opc.txt
index 45637501e27b..aa0daef0f2f3 100644
--- a/opcodes/s390-opc.txt
+++ b/opcodes/s390-opc.txt
@@ -822,7 +822,7 @@  b372 cpsdr RRF_F0FF2 "copy sign" z9-ec zarch
 b373 lcdfr RRE_FF "load complement no cc" z9-ec zarch
 b3c1 ldgr RRE_FR "load FPR from GR" z9-ec zarch
 b3cd lgdr RRE_RF "load GR from FPR" z9-ec zarch
-b3d2 adtr RRR_F0FF "add long dfp" z9-ec zarch
+b3d2 adtr RRF_F0FF "add long dfp" z9-ec zarch
 b3da axtr RRR_FE0FEFE "add extended dfp" z9-ec zarch
 b3e4 cdtr RRE_FF "compare long dfp" z9-ec zarch
 b3ec cxtr RRE_FEFE "compare extended dfp" z9-ec zarch
@@ -842,7 +842,7 @@  b3e3 csdtr RRF_0URF "convert from long dfp to signed bcd" z9-ec zarch
 b3eb csxtr RRF_0UREFE "convert from extended dfp to signed bcd" z9-ec zarch
 b3e2 cudtr RRE_RF "convert from long dfp to unsigned bcd" z9-ec zarch
 b3ea cuxtr RRE_RFE "convert from extended dfp to unsigned bcd" z9-ec zarch
-b3d1 ddtr RRR_F0FF "divide long dfp" z9-ec zarch
+b3d1 ddtr RRF_F0FF "divide long dfp" z9-ec zarch
 b3d9 dxtr RRR_FE0FEFE "divide extended dfp" z9-ec zarch
 b3e5 eedtr RRE_RF "extract biased exponent from long dfp" z9-ec zarch
 b3ed eextr RRE_RFE "extract biased exponent from extended dfp" z9-ec zarch
@@ -859,7 +859,7 @@  b3d4 ldetr RRF_0UFF "load lengthened long dfp" z9-ec zarch
 b3dc lxdtr RRF_0UFEF "load lengthened extended dfp" z9-ec zarch
 b3d5 ledtr RRF_UUFF "load rounded long dfp" z9-ec zarch
 b3dd ldxtr RRF_UUFFE "load rounded extended dfp" z9-ec zarch
-b3d0 mdtr RRR_F0FF "multiply long dfp" z9-ec zarch
+b3d0 mdtr RRF_F0FF "multiply long dfp" z9-ec zarch
 b3d8 mxtr RRR_FE0FEFE "multiply extended dfp" z9-ec zarch
 b3f5 qadtr RRF_FUFF "Quantize long dfp" z9-ec zarch
 b3fd qaxtr RRF_FEUFEFE "Quantize extended dfp" z9-ec zarch
@@ -871,7 +871,7 @@  ed0000000040 sldt RXF_FRRDF "shift coefficient left long dfp" z9-ec zarch
 ed0000000048 slxt RXF_FERRDFE "shift coefficient left extended dfp" z9-ec zarch
 ed0000000041 srdt RXF_FRRDF "shift coefficient right long dfp" z9-ec zarch
 ed0000000049 srxt RXF_FERRDFE "shift coefficient right extended dfp" z9-ec zarch
-b3d3 sdtr RRR_F0FF "subtract long dfp" z9-ec zarch
+b3d3 sdtr RRF_F0FF "subtract long dfp" z9-ec zarch
 b3db sxtr RRR_FE0FEFE "subtract extended dfp" z9-ec zarch
 ed0000000050 tdcet RXE_FRRD "test data class short dfp" z9-ec zarch
 ed0000000054 tdcdt RXE_FRRD "test data class long dfp" z9-ec zarch