clcle R1,R3,D2(B2) operands R1 and R3 each designate an even-odd pair
of general registers and must designate an even-numbered register;
otherwise, a specification exception is recognized. [1, 2]
[1]: IBM ESA/390 Principles of Operation, SA22-7201-07, z900,
https://publibfp.dhe.ibm.com/epubs/pdf/dz9ar007.pdf
[2]: IBM z/Architecture Principles of Operation, SA22-7832-14, IBM z17,
https://www.ibm.com/docs/en/module_1678991624569/pdf/SA22-7832-14.pdf
opcodes/
* s390-opc.txt (clcle): Use RS_RERERD instruction format.
gas/testsuite/
* gas/s390/esa-g5.d (clcle): Operands R1 and R3 must designate
an even-odd register pair.
* gas/s390/esa-g5.s (clcle): Likewise.
Signed-off-by: Jens Remus <jremus@linux.ibm.com>
---
gas/testsuite/gas/s390/esa-g5.d | 2 +-
gas/testsuite/gas/s390/esa-g5.s | 2 +-
opcodes/s390-opc.txt | 2 +-
3 files changed, 3 insertions(+), 3 deletions(-)
@@ -121,7 +121,7 @@ Disassembly of section .text:
.*: 55 65 af ff [ ]*cl %r6,4095\(%r5,%r10\)
.*: d5 ff 5f ff af ff [ ]*clc 4095\(256,%r5\),4095\(%r10\)
.*: 0f 68 [ ]*clcl %r6,%r8
-.*: a9 69 5f ff [ ]*clcle %r6,%r9,4095\(%r5\)
+.*: a9 68 5f ff [ ]*clcle %r6,%r8,4095\(%r5\)
.*: 95 ff 5f ff [ ]*cli 4095\(%r5\),255
.*: bd 6a 5f ff [ ]*clm %r6,10,4095\(%r5\)
.*: 15 69 [ ]*clr %r6,%r9
@@ -115,7 +115,7 @@ foo:
cl %r6,4095(%r5,%r10)
clc 4095(256,%r5),4095(%r10)
clcl %r6,%r8
- clcle %r6,%r9,4095(%r5)
+ clcle %r6,%r8,4095(%r5)
cli 4095(%r5),255
clm %r6,10,4095(%r5)
clr %r6,%r9
@@ -256,7 +256,7 @@ a706 brct RI_RP "branch relative on count" g5 esa,zarch condjump
a706 jct RI_RP "branch relative on count" g5 esa,zarch condjump
b241 cksm RRE_RRE "checksum" g5 esa,zarch
a70e chi RI_RI "compare halfword immediate" g5 esa,zarch
-a9 clcle RS_RRRD "compare logical long extended" g5 esa,zarch
+a9 clcle RS_RERERD "compare logical long extended" g5 esa,zarch
a708 lhi RI_RI "load halfword immediate" g5 esa,zarch
a8 mvcle RS_RERERD "move long extended" g5 esa,zarch
a70c mhi RI_RI "multiply halfword immediate" g5 esa,zarch