diff mbox series

[03/20] s390: cksm operand R2 must be a register pair

Message ID 20260930081834.2948939-25-jremus@linux.ibm.com
State New
Headers
Series s390: Instruction cleanups |

Commit Message

Jens Remus Sept. 30, 2026, 8:18 a.m. UTC 
  cksm R1,R2 operand R2 designates an even-odd pair of general registers
and must designate an even-numbered register; otherwise, a specification
exception is recognized. [1, 2]

[1]: IBM ESA/390 Principles of Operation, SA22-7201-07, z900,
     https://publibfp.dhe.ibm.com/epubs/pdf/dz9ar007.pdf

[2]: IBM z/Architecture Principles of Operation, SA22-7832-14, IBM z17,
     https://www.ibm.com/docs/en/module_1678991624569/pdf/SA22-7832-14.pdf

opcodes/
	* s390-opc.c (INSTR_RRE_RRE, MASK_RRE_RRE): New instruction
	format RRE_RRE.
	* s390-opc.txt (cksm): Use RRE_RRE instruction format.

gas/testsuite/
	* gas/s390/esa-g5.d (cksm): Operand R2 must designate an
	even-odd register pair.
	* gas/s390/esa-g5.s (cksm): Likewise.

Signed-off-by: Jens Remus <jremus@linux.ibm.com>
---
 gas/testsuite/gas/s390/esa-g5.d | 2 +-
 gas/testsuite/gas/s390/esa-g5.s | 2 +-
 opcodes/s390-opc.c              | 2 ++
 opcodes/s390-opc.txt            | 2 +-
 4 files changed, 5 insertions(+), 3 deletions(-)
diff mbox series

Patch

diff --git a/gas/testsuite/gas/s390/esa-g5.d b/gas/testsuite/gas/s390/esa-g5.d
index 7766defd199e..7265da65180e 100644
--- a/gas/testsuite/gas/s390/esa-g5.d
+++ b/gas/testsuite/gas/s390/esa-g5.d
@@ -117,7 +117,7 @@  Disassembly of section .text:
 .*:	b3 ba 90 54 [	 ]*cfxr	%r5,9,%f4
 .*:	49 65 af ff [	 ]*ch	%r6,4095\(%r5,%r10\)
 .*:	a7 6e 80 01 [	 ]*chi	%r6,-32767
-.*:	b2 41 00 69 [	 ]*cksm	%r6,%r9
+.*:	b2 41 00 68 [	 ]*cksm	%r6,%r8
 .*:	55 65 af ff [	 ]*cl	%r6,4095\(%r5,%r10\)
 .*:	d5 ff 5f ff af ff [	 ]*clc	4095\(256,%r5\),4095\(%r10\)
 .*:	0f 69 [	 ]*clcl	%r6,%r9
diff --git a/gas/testsuite/gas/s390/esa-g5.s b/gas/testsuite/gas/s390/esa-g5.s
index 812d56e65dbf..5adb458ca27f 100644
--- a/gas/testsuite/gas/s390/esa-g5.s
+++ b/gas/testsuite/gas/s390/esa-g5.s
@@ -111,7 +111,7 @@  foo:
 	cfxr	%r5,9,%f4
 	ch	%r6,4095(%r5,%r10)
 	chi	%r6,-32767
-	cksm	%r6,%r9
+	cksm	%r6,%r8
 	cl	%r6,4095(%r5,%r10)
 	clc	4095(256,%r5),4095(%r10)
 	clcl	%r6,%r9
diff --git a/opcodes/s390-opc.c b/opcodes/s390-opc.c
index 1dfc8b08f04f..2cb36aacddb5 100644
--- a/opcodes/s390-opc.c
+++ b/opcodes/s390-opc.c
@@ -354,6 +354,7 @@  unused_s390_operands_static_asserts (void)
 #define INSTR_RRE_RF       4, { R_24,F_28,0,0,0,0 }              /* e.g. lgdr  */
 #define INSTR_RRE_RFE      4, { R_24,FE_28,0,0,0,0 }             /* e.g. csxtr */
 #define INSTR_RRE_RR       4, { R_24,R_28,0,0,0,0 }              /* e.g. lura  */
+#define INSTR_RRE_RRE      4, { R_24,RE_28,0,0,0,0 }             /* e.g. cksm  */
 #define INSTR_RRE_RER      4, { RE_24,R_28,0,0,0,0 }             /* e.g. tre   */
 #define INSTR_RRE_RERE     4, { RE_24,RE_28,0,0,0,0 }            /* e.g. cuse  */
 #define INSTR_RRE_FR       4, { F_24,R_28,0,0,0,0 }              /* e.g. ldgr  */
@@ -587,6 +588,7 @@  unused_s390_operands_static_asserts (void)
 #define MASK_RRE_RF       { 0xff, 0xff, 0xff, 0x00, 0x00, 0x00 }
 #define MASK_RRE_RFE      { 0xff, 0xff, 0xff, 0x00, 0x00, 0x00 }
 #define MASK_RRE_RR       { 0xff, 0xff, 0xff, 0x00, 0x00, 0x00 }
+#define MASK_RRE_RRE      { 0xff, 0xff, 0xff, 0x00, 0x00, 0x00 }
 #define MASK_RRE_RER      { 0xff, 0xff, 0xff, 0x00, 0x00, 0x00 }
 #define MASK_RRE_RERE     { 0xff, 0xff, 0xff, 0x00, 0x00, 0x00 }
 #define MASK_RRE_FR       { 0xff, 0xff, 0xff, 0x00, 0x00, 0x00 }
diff --git a/opcodes/s390-opc.txt b/opcodes/s390-opc.txt
index f0fce71ebf8c..c936df825e0c 100644
--- a/opcodes/s390-opc.txt
+++ b/opcodes/s390-opc.txt
@@ -254,7 +254,7 @@  a705 jas RI_RP "branch relative and save" g5 esa,zarch jumpsr
 a704 brc RI_UP "branch relative on condition" g5 esa,zarch condjump
 a706 brct RI_RP "branch relative on count" g5 esa,zarch condjump
 a706 jct RI_RP "branch relative on count" g5 esa,zarch condjump
-b241 cksm RRE_RR "checksum" g5 esa,zarch
+b241 cksm RRE_RRE "checksum" g5 esa,zarch
 a70e chi RI_RI "compare halfword immediate" g5 esa,zarch
 a9 clcle RS_RRRD "compare logical long extended" g5 esa,zarch
 a708 lhi RI_RI "load halfword immediate" g5 esa,zarch